BCH for NAND ECC

DISCUSSION Andrew E. Mileski 1 participant 1 message Jun 3, 2008 Memory technology devices (MTD)

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Andrew E. Mileski

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2008-06-03 22:52 UTC #0 lore raw

Is anyone looking at BCH for NAND ECC? If so, I'll let the experts have at it.

Otherwise...

I can't really find any examples for NAND usage, and am inching my way through the theory.

Am I correct in that BCH(2096, 2048, 9) would do for 4 correctable errors in a 256 byte block? Assuming I understand any of it, that would be 6 bytes of ECC per block.

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Andrew E. Mileski