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Parallel port reset

PATCH Superseded Hervé Poussineau 2 participants 3 messages Nov 22, 2008

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Hervé Poussineau

author
#0 lore raw

PATCH 1/1 Parallel port reset

Hi,

Attached patch adds a reset handler to parallel port, so it gets correct register values after a reset.

Please apply

Hervé

parallel.c +11 -5
Index: hw/parallel.c
===================================================================
@@ -419,8 +419,10 @@
     return ret;
 }
 
-static void parallel_reset(ParallelState *s, qemu_irq irq, CharDriverState *chr)
+static void parallel_reset(void *opaque)
 {
+    ParallelState *s = opaque;
+
     s->datar = ~0;
     s->dataw = ~0;
     s->status = PARA_STS_BUSY;

@@ -431,9 +433,7 @@
     s->control = PARA_CTR_SELECT;
     s->control |= PARA_CTR_INIT;
     s->control |= 0xc0;
-    s->irq = irq;
     s->irq_pending = 0;
-    s->chr = chr;
     s->hw_driver = 0;
     s->epp_timeout = 0;
     s->last_read_offset = ~0U;

@@ -448,7 +448,10 @@
     s = qemu_mallocz(sizeof(ParallelState));
     if (!s)
         return NULL;
-    parallel_reset(s, irq, chr);
+    s->irq = irq;
+    s->chr = chr;
+    parallel_reset(s);
+    qemu_register_reset(parallel_reset, s);
 
     if (qemu_chr_ioctl(chr, CHR_IOCTL_PP_READ_STATUS, &dummy) == 0) {
         s->hw_driver = 1;

@@ -539,9 +542,12 @@
     s = qemu_mallocz(sizeof(ParallelState));
     if (!s)
         return NULL;
-    parallel_reset(s, irq, chr);
+    s->irq = irq;
+    s->chr = chr;
     s->base = base;
     s->it_shift = it_shift;
+    parallel_reset(s);
+    qemu_register_reset(parallel_reset, s);
 
     io_sw = cpu_register_io_memory(0, parallel_mm_read_sw, parallel_mm_write_sw, s);
     cpu_register_physical_memory(base, 8 << it_shift, io_sw);
#1 lore raw
Quoted 5 lines · Hervé Poussineau

Hi,

Attached patch adds a reset handler to parallel port, so it gets correct register values after a reset.

Please apply

Could you please add a Signed-off-by?

Regards,

Anthony Liguori

Quoted 1 line

Hervé

author
#2 lore raw
Quoted 4 lines · Anthony Liguori
Quoted 1 line · Hervé Poussineau

Attached patch adds a reset handler to parallel port, so it gets correct register values after a reset.

Could you please add a Signed-off-by?

Attached patch adds a reset handler to parallel port, so it gets correct register values after a reset.

Signed-off-by Hervé Poussineau <[email protected]>
parallel.c +11 -5
Index: hw/parallel.c
===================================================================
@@ -419,8 +419,10 @@
     return ret;
 }
 
-static void parallel_reset(ParallelState *s, qemu_irq irq, CharDriverState *chr)
+static void parallel_reset(void *opaque)
 {
+    ParallelState *s = opaque;
+
     s->datar = ~0;
     s->dataw = ~0;
     s->status = PARA_STS_BUSY;

@@ -431,9 +433,7 @@
     s->control = PARA_CTR_SELECT;
     s->control |= PARA_CTR_INIT;
     s->control |= 0xc0;
-    s->irq = irq;
     s->irq_pending = 0;
-    s->chr = chr;
     s->hw_driver = 0;
     s->epp_timeout = 0;
     s->last_read_offset = ~0U;

@@ -448,7 +448,10 @@
     s = qemu_mallocz(sizeof(ParallelState));
     if (!s)
         return NULL;
-    parallel_reset(s, irq, chr);
+    s->irq = irq;
+    s->chr = chr;
+    parallel_reset(s);
+    qemu_register_reset(parallel_reset, s);
 
     if (qemu_chr_ioctl(chr, CHR_IOCTL_PP_READ_STATUS, &dummy) == 0) {
         s->hw_driver = 1;

@@ -539,9 +542,12 @@
     s = qemu_mallocz(sizeof(ParallelState));
     if (!s)
         return NULL;
-    parallel_reset(s, irq, chr);
+    s->irq = irq;
+    s->chr = chr;
     s->base = base;
     s->it_shift = it_shift;
+    parallel_reset(s);
+    qemu_register_reset(parallel_reset, s);
 
     io_sw = cpu_register_io_memory(0, parallel_mm_read_sw, parallel_mm_write_sw, s);
     cpu_register_physical_memory(base, 8 << it_shift, io_sw);