graphic device changes

diff -r 03e762ec04bc hw/blizzard.c
@@ -73,7 +73,6 @@
     uint8_t iformat;
     uint8_t source;
     DisplayState *state;
-    QEMUConsole *console;
     blizzard_fn_t *line_fn_tab[2];
     void *fb;
 

@@ -897,7 +896,7 @@
 
     if (s->x != ds_get_width(s->state) || s->y != ds_get_height(s->state)) {
         s->invalidate = 1;
-        qemu_console_resize(s->console, s->x, s->y);
+        qemu_console_resize(s->state, s->x, s->y);
     }
 
     if (s->invalidate) {

@@ -955,11 +954,10 @@
 #define DEPTH 32
 #include "blizzard_template.h"
 
-void *s1d13745_init(qemu_irq gpio_int, DisplayState *ds)
+void *s1d13745_init(qemu_irq gpio_int)
 {
     struct blizzard_s *s = (struct blizzard_s *) qemu_mallocz(sizeof(*s));
 
-    s->state = ds;
     s->fb = qemu_malloc(0x180000);
 
     switch (ds_get_bits_per_pixel(s->state)) {

@@ -994,9 +992,10 @@
 
     blizzard_reset(s);
 
-    s->console = graphic_console_init(s->state, blizzard_update_display,
-                                      blizzard_invalidate_display,
-                                      blizzard_screen_dump, NULL, s);
+    s->state = graphic_console_init(blizzard_update_display,
+                                 blizzard_invalidate_display,
+                                 blizzard_screen_dump, NULL, s);
+    register_displaystate(s->state);
 
     return s;
 }

diff -r 03e762ec04bc hw/cirrus_vga.c
@@ -770,7 +770,7 @@
 		      s->cirrus_blt_width, s->cirrus_blt_height);
 
     if (notify)
-	qemu_console_copy(s->console,
+	qemu_console_copy(s->ds,
 			  sx, sy, dx, dy,
 			  s->cirrus_blt_width / depth,
 			  s->cirrus_blt_height);

@@ -3282,7 +3282,7 @@
  *
  ***************************************/
 
-void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
+void isa_cirrus_vga_init(uint8_t *vga_ram_base,
                          ram_addr_t vga_ram_offset, int vga_ram_size)
 {
     CirrusVGAState *s;

@@ -3290,10 +3290,11 @@
     s = qemu_mallocz(sizeof(CirrusVGAState));
 
     vga_common_init((VGAState *)s,
-                    ds, vga_ram_base, vga_ram_offset, vga_ram_size);
+                    vga_ram_base, vga_ram_offset, vga_ram_size);
     cirrus_init_common(s, CIRRUS_ID_CLGD5430, 0);
-    s->console = graphic_console_init(s->ds, s->update, s->invalidate,
-                                      s->screen_dump, s->text_update, s);
+    s->ds = graphic_console_init(s->update, s->invalidate,
+                                 s->screen_dump, s->text_update, s);
+    register_displaystate(s->ds);
     /* XXX ISA-LFB support */
 }
 

@@ -3331,7 +3332,7 @@
 				 s->cirrus_mmio_io_addr);
 }
 
-void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
+void pci_cirrus_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
                          ram_addr_t vga_ram_offset, int vga_ram_size)
 {
     PCICirrusVGAState *d;

@@ -3358,11 +3359,12 @@
     /* setup VGA */
     s = &d->cirrus_vga;
     vga_common_init((VGAState *)s,
-                    ds, vga_ram_base, vga_ram_offset, vga_ram_size);
+                    vga_ram_base, vga_ram_offset, vga_ram_size);
     cirrus_init_common(s, device_id, 1);
 
-    s->console = graphic_console_init(s->ds, s->update, s->invalidate,
-                                      s->screen_dump, s->text_update, s);
+    s->ds = graphic_console_init(s->update, s->invalidate,
+                                 s->screen_dump, s->text_update, s);
+    register_displaystate(s->ds);
 
     s->pci_dev = (PCIDevice *)d;
 

diff -r 03e762ec04bc hw/devices.h
@@ -8,7 +8,7 @@
 
 /* ssd0323.c */
 int ssd0323_xfer_ssi(void *opaque, int data);
-void *ssd0323_init(DisplayState *ds, qemu_irq *cmd_p);
+void *ssd0323_init(qemu_irq *cmd_p);
 
 /* ads7846.c */
 struct ads7846_state_s;

@@ -37,7 +37,7 @@
 void stellaris_gamepad_init(int n, qemu_irq *irq, const int *keycode);
 
 /* blizzard.c */
-void *s1d13745_init(qemu_irq gpio_int, DisplayState *ds);
+void *s1d13745_init(qemu_irq gpio_int);
 void s1d13745_write(void *opaque, int dc, uint16_t value);
 void s1d13745_write_block(void *opaque, int dc,
                 void *buf, size_t len, int pitch);

@@ -67,13 +67,13 @@
 /* tc6393xb.c */
 struct tc6393xb_s;
 #define TC6393XB_RAM	0x110000 /* amount of ram for Video and USB */
-struct tc6393xb_s *tc6393xb_init(uint32_t base, qemu_irq irq, DisplayState *ds);
+struct tc6393xb_s *tc6393xb_init(uint32_t base, qemu_irq irq);
 void tc6393xb_gpio_out_set(struct tc6393xb_s *s, int line,
                     qemu_irq handler);
 qemu_irq *tc6393xb_gpio_in_get(struct tc6393xb_s *s);
 qemu_irq tc6393xb_l3v_get(struct tc6393xb_s *s);
 
 /* sm501.c */
-void sm501_init(DisplayState *ds, uint32_t base, unsigned long local_mem_base,
+void sm501_init(uint32_t base, unsigned long local_mem_base,
 		uint32_t local_mem_bytes, CharDriverState *chr);
 #endif

diff -r 03e762ec04bc hw/g364fb.c
@@ -33,7 +33,6 @@
     uint8_t palette[256][3];
     /* display refresh support */
     DisplayState *ds;
-    QEMUConsole *console;
     int graphic_mode;
     uint32_t scr_width, scr_height; /* in pixels */
 } G364State;

@@ -132,7 +131,7 @@
         full_update = 1;
     }
     if (s->scr_width != ds_get_width(s->ds) || s->scr_height != ds_get_height(s->ds)) {
-        qemu_console_resize(s->console, s->scr_width, s->scr_height);
+        qemu_console_resize(s->ds, s->scr_width, s->scr_height);
         full_update = 1;
     }
     switch(graphic_mode) {

@@ -357,8 +356,7 @@
     g364fb_mem_writel,
 };
 
-int g364fb_mm_init(DisplayState *ds,
-                   int vram_size, int it_shift,
+int g364fb_mm_init(int vram_size, int it_shift,
                    target_phys_addr_t vram_base, target_phys_addr_t ctrl_base)
 {
     G364State *s;

@@ -374,12 +372,12 @@
     qemu_register_reset(g364fb_reset, s);
     g364fb_reset(s);
 
-    s->ds = ds;
     s->vram_base = vram_base;
 
-    s->console = graphic_console_init(ds, g364fb_update_display,
-                                      g364fb_invalidate_display,
-                                      g364fb_screen_dump, NULL, s);
+    s->ds = graphic_console_init(g364fb_update_display,
+                                 g364fb_invalidate_display,
+                                 g364fb_screen_dump, NULL, s);
+    register_displaystate(s->ds);
 
     io_vram = cpu_register_io_memory(0, g364fb_mem_read, g364fb_mem_write, s);
     cpu_register_physical_memory(s->vram_base, vram_size, io_vram);

diff -r 03e762ec04bc hw/i2c.h
@@ -71,7 +71,7 @@
 void wm8750_set_bclk_in(void *opaque, int new_hz);
 
 /* ssd0303.c */
-void ssd0303_init(DisplayState *ds, i2c_bus *bus, int address);
+void ssd0303_init(i2c_bus *bus, int address);
 
 /* twl92230.c */
 i2c_slave *twl92230_init(i2c_bus *bus, qemu_irq irq);

diff -r 03e762ec04bc hw/jazz_led.c
@@ -37,7 +37,6 @@
     target_phys_addr_t base;
     uint8_t segments;
     DisplayState *ds;
-    QEMUConsole *console;
     screen_state_t state;
 } LedState;
 

@@ -292,7 +291,7 @@
     char buf[2];
 
     dpy_cursor(s->ds, -1, -1);
-    qemu_console_resize(s->console, 2, 1);
+    qemu_console_resize(s->ds, 2, 1);
 
     /* TODO: draw the segments */
     snprintf(buf, 2, "%02hhx\n", s->segments);

@@ -302,7 +301,7 @@
     dpy_update(s->ds, 0, 0, 2, 1);
 }
 
-void jazz_led_init(DisplayState *ds, target_phys_addr_t base)
+void jazz_led_init(target_phys_addr_t base)
 {
     LedState *s;
     int io;

@@ -312,15 +311,15 @@
         return;
 
     s->base = base;
-    s->ds = ds;
     s->state = REDRAW_SEGMENTS | REDRAW_BACKGROUND;
 
     io = cpu_register_io_memory(0, led_read, led_write, s);
     cpu_register_physical_memory(s->base, 1, io);
 
-    s->console = graphic_console_init(ds, jazz_led_update_display,
-                                     jazz_led_invalidate_display,
-                                     jazz_led_screen_dump,
-                                     jazz_led_text_update, s);
-    qemu_console_resize(s->console, 60, 80);
+    s->ds = graphic_console_init(jazz_led_update_display,
+                                 jazz_led_invalidate_display,
+                                 jazz_led_screen_dump,
+                                 jazz_led_text_update, s);
+    register_displaystate(s->ds);
+    qemu_console_resize(s->ds, 60, 80);
 }

diff -r 03e762ec04bc hw/mips.h
@@ -10,15 +10,14 @@
 void ds1225y_set_protection(void *opaque, int protection);
 
 /* g364fb.c */
-int g364fb_mm_init(DisplayState *ds,
-                   int vram_size, int it_shift,
+int g364fb_mm_init(int vram_size, int it_shift,
                    target_phys_addr_t vram_base, target_phys_addr_t ctrl_base);
 
 /* mipsnet.c */
 void mipsnet_init(int base, qemu_irq irq, NICInfo *nd);
 
 /* jazz_led.c */
-extern void jazz_led_init(DisplayState *ds, target_phys_addr_t base);
+extern void jazz_led_init(target_phys_addr_t base);
 
 /* mips_int.c */
 extern void cpu_mips_irq_init_cpu(CPUState *env);

diff -r 03e762ec04bc hw/musicpal.c
@@ -758,7 +758,6 @@
     int page;
     int page_off;
     DisplayState *ds;
-    QEMUConsole *console;
     uint8_t video_ram[128*64/8];
 } musicpal_lcd_state;
 

@@ -914,7 +913,7 @@
     musicpal_lcd_write
 };
 
-static void musicpal_lcd_init(DisplayState *ds, uint32_t base)
+static void musicpal_lcd_init(uint32_t base)
 {
     musicpal_lcd_state *s;
     int iomemtype;

@@ -923,14 +922,14 @@
     if (!s)
         return;
     s->base = base;
-    s->ds = ds;
     iomemtype = cpu_register_io_memory(0, musicpal_lcd_readfn,
                                        musicpal_lcd_writefn, s);
     cpu_register_physical_memory(base, MP_LCD_SIZE, iomemtype);
 
-    s->console = graphic_console_init(ds, lcd_refresh, lcd_invalidate,
-                                      NULL, NULL, s);
-    qemu_console_resize(s->console, 128*3, 64*3);
+    s->ds = graphic_console_init(lcd_refresh, lcd_invalidate,
+                                 NULL, NULL, s);
+    register_displaystate(s->ds);
+    qemu_console_resize(s->ds, 128*3, 64*3);
 }
 
 /* PIC register offsets */

diff -r 03e762ec04bc hw/omap.h
@@ -747,7 +747,7 @@
 struct omap_lcd_panel_s;
 void omap_lcdc_reset(struct omap_lcd_panel_s *s);
 struct omap_lcd_panel_s *omap_lcdc_init(target_phys_addr_t base, qemu_irq irq,
-                struct omap_dma_lcd_channel_s *dma, DisplayState *ds,
+                struct omap_dma_lcd_channel_s *dma,
                 ram_addr_t imif_base, ram_addr_t emiff_base, omap_clk clk);
 
 /* omap_dss.c */

@@ -760,7 +760,7 @@
 struct omap_dss_s;
 void omap_dss_reset(struct omap_dss_s *s);
 struct omap_dss_s *omap_dss_init(struct omap_target_agent_s *ta,
-                target_phys_addr_t l3_base, DisplayState *ds,
+                target_phys_addr_t l3_base,
                 qemu_irq irq, qemu_irq drq,
                 omap_clk fck1, omap_clk fck2, omap_clk ck54m,
                 omap_clk ick1, omap_clk ick2);

@@ -968,11 +968,11 @@
 
 /* omap1.c */
 struct omap_mpu_state_s *omap310_mpu_init(unsigned long sdram_size,
-                DisplayState *ds, const char *core);
+                const char *core);
 
 /* omap2.c */
 struct omap_mpu_state_s *omap2420_mpu_init(unsigned long sdram_size,
-                DisplayState *ds, const char *core);
+                const char *core);
 
 # if TARGET_PHYS_ADDR_BITS == 32
 #  define OMAP_FMT_plx "%#08x"

diff -r 03e762ec04bc hw/omap_dss.c
@@ -1046,7 +1046,7 @@
 };
 
 struct omap_dss_s *omap_dss_init(struct omap_target_agent_s *ta,
-                target_phys_addr_t l3_base, DisplayState *ds,
+                target_phys_addr_t l3_base,
                 qemu_irq irq, qemu_irq drq,
                 omap_clk fck1, omap_clk fck2, omap_clk ck54m,
                 omap_clk ick1, omap_clk ick2)

@@ -1057,7 +1057,6 @@
 
     s->irq = irq;
     s->drq = drq;
-    s->state = ds;
     omap_dss_reset(s);
 
     iomemtype[0] = l4_register_io_memory(0, omap_diss1_readfn,

@@ -1078,9 +1077,9 @@
     cpu_register_physical_memory(s->im3_base, 0x1000, iomemtype[4]);
 
 #if 0
-    if (ds)
-        graphic_console_init(ds, omap_update_display,
-                        omap_invalidate_display, omap_screen_dump, s);
+    s->state = graphic_console_init(omap_update_display,
+                                    omap_invalidate_display, omap_screen_dump, s);
+    register_displaystate(s->state);
 #endif
 
     return s;

diff -r 03e762ec04bc hw/omap_lcdc.c
@@ -26,7 +26,6 @@
     target_phys_addr_t base;
     qemu_irq irq;
     DisplayState *state;
-    QEMUConsole *console;
     ram_addr_t imif_base;
     ram_addr_t emiff_base;
 

@@ -176,7 +175,7 @@
     width = omap_lcd->width;
     if (width != ds_get_width(omap_lcd->state) ||
             omap_lcd->height != ds_get_height(omap_lcd->state)) {
-        qemu_console_resize(omap_lcd->console,
+        qemu_console_resize(omap_lcd->state,
                             omap_lcd->width, omap_lcd->height);
         omap_lcd->invalidate = 1;
     }

@@ -476,7 +475,7 @@
 }
 
 struct omap_lcd_panel_s *omap_lcdc_init(target_phys_addr_t base, qemu_irq irq,
-                struct omap_dma_lcd_channel_s *dma, DisplayState *ds,
+                struct omap_dma_lcd_channel_s *dma,
                 ram_addr_t imif_base, ram_addr_t emiff_base, omap_clk clk)
 {
     int iomemtype;

@@ -486,7 +485,6 @@
     s->irq = irq;
     s->dma = dma;
     s->base = base;
-    s->state = ds;
     s->imif_base = imif_base;
     s->emiff_base = emiff_base;
     omap_lcdc_reset(s);

@@ -495,9 +493,10 @@
                     omap_lcdc_writefn, s);
     cpu_register_physical_memory(s->base, 0x100, iomemtype);
 
-    s->console = graphic_console_init(ds, omap_update_display,
-                                      omap_invalidate_display,
-                                      omap_screen_dump, NULL, s);
+    s->state = graphic_console_init(omap_update_display,
+                                    omap_invalidate_display,
+                                    omap_screen_dump, NULL, s);
+    register_displaystate(s->state);
 
     return s;
 }

diff -r 03e762ec04bc hw/pc.h
@@ -122,20 +122,20 @@
 #define VGA_RAM_SIZE (9 * 1024 * 1024)
 #endif
 
-int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
+int isa_vga_init(uint8_t *vga_ram_base,
                  unsigned long vga_ram_offset, int vga_ram_size);
-int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
+int pci_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
                  unsigned long vga_ram_offset, int vga_ram_size,
                  unsigned long vga_bios_offset, int vga_bios_size);
-int isa_vga_mm_init(DisplayState *ds, uint8_t *vga_ram_base,
+int isa_vga_mm_init(uint8_t *vga_ram_base,
                     unsigned long vga_ram_offset, int vga_ram_size,
                     target_phys_addr_t vram_base, target_phys_addr_t ctrl_base,
                     int it_shift);
 
 /* cirrus_vga.c */
-void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
+void pci_cirrus_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
                          ram_addr_t vga_ram_offset, int vga_ram_size);
-void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
+void isa_cirrus_vga_init(uint8_t *vga_ram_base,
                          ram_addr_t vga_ram_offset, int vga_ram_size);
 
 /* ide.c */

diff -r 03e762ec04bc hw/pci.h
@@ -102,7 +102,7 @@
 void *lsi_scsi_init(PCIBus *bus, int devfn);
 
 /* vmware_vga.c */
-void pci_vmsvga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
+void pci_vmsvga_init(PCIBus *bus, uint8_t *vga_ram_base,
                      unsigned long vga_ram_offset, int vga_ram_size);
 
 /* usb-uhci.c */

diff -r 03e762ec04bc hw/pl110.c
@@ -30,7 +30,6 @@
 typedef struct {
     uint32_t base;
     DisplayState *ds;
-    QEMUConsole *console;
 
     /* The Versatile/PB uses a slightly modified PL110 controller.  */
     int versatile;

@@ -272,7 +271,7 @@
 {
     if (width != s->cols || height != s->rows) {
         if (pl110_enabled(s)) {
-            qemu_console_resize(s->console, width, height);
+            qemu_console_resize(s->ds, width, height);
         }
     }
     s->cols = width;

@@ -389,7 +388,7 @@
         s->cr = val;
         s->bpp = (val >> 1) & 7;
         if (pl110_enabled(s)) {
-            qemu_console_resize(s->console, s->cols, s->rows);
+            qemu_console_resize(s->ds, s->cols, s->rows);
         }
         break;
     case 10: /* LCDICR */

@@ -413,8 +412,7 @@
    pl110_write
 };
 
-void *pl110_init(DisplayState *ds, uint32_t base, qemu_irq irq,
-                 int versatile)
+void *pl110_init(uint32_t base, qemu_irq irq, int versatile)
 {
     pl110_state *s;
     int iomemtype;

@@ -424,12 +422,12 @@
                                        pl110_writefn, s);
     cpu_register_physical_memory(base, 0x00001000, iomemtype);
     s->base = base;
-    s->ds = ds;
     s->versatile = versatile;
     s->irq = irq;
-    s->console = graphic_console_init(ds, pl110_update_display,
-                                      pl110_invalidate_display,
-                                      NULL, NULL, s);
+    s->ds = graphic_console_init(pl110_update_display,
+                                 pl110_invalidate_display,
+                                 NULL, NULL, s);
+    register_displaystate(s->ds);
     /* ??? Save/restore.  */
     return s;
 }

diff -r 03e762ec04bc hw/primecell.h
@@ -9,7 +9,7 @@
 void pl031_init(uint32_t base, qemu_irq irq);
 
 /* pl110.c */
-void *pl110_init(DisplayState *ds, uint32_t base, qemu_irq irq, int);
+void *pl110_init(uint32_t base, qemu_irq irq, int);
 
 /* pl011.c */
 enum pl011_type {

diff -r 03e762ec04bc hw/pxa.h
@@ -89,7 +89,7 @@
 /* pxa2xx_lcd.c */
 struct pxa2xx_lcdc_s;
 struct pxa2xx_lcdc_s *pxa2xx_lcdc_init(target_phys_addr_t base,
-                qemu_irq irq, DisplayState *ds);
+                qemu_irq irq);
 void pxa2xx_lcd_vsync_notifier(struct pxa2xx_lcdc_s *s, qemu_irq handler);
 void pxa2xx_lcdc_oritentation(void *opaque, int angle);
 

@@ -216,9 +216,8 @@
 # define PA_FMT			"0x%08lx"
 # define REG_FMT		"0x" TARGET_FMT_plx
 
-struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size, DisplayState *ds,
-                const char *revision);
-struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size, DisplayState *ds);
+struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size, const char *revision);
+struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size);
 
 /* usb-ohci.c */
 void usb_ohci_init_pxa(target_phys_addr_t base, int num_ports, int devfn,

diff -r 03e762ec04bc hw/pxa2xx_lcd.c
@@ -23,7 +23,6 @@
 
     int invalidated;
     DisplayState *ds;
-    QEMUConsole *console;
     drawfn *line_fn[2];
     int dest_width;
     int xres, yres;

@@ -795,9 +794,9 @@
 
     if (width != s->xres || height != s->yres) {
         if (s->orientation)
-            qemu_console_resize(s->console, height, width);
+            qemu_console_resize(s->ds, height, width);
         else
-            qemu_console_resize(s->console, width, height);
+            qemu_console_resize(s->ds, width, height);
         s->invalidated = 1;
         s->xres = width;
         s->yres = height;

@@ -984,8 +983,7 @@
 #define BITS 32
 #include "pxa2xx_template.h"
 
-struct pxa2xx_lcdc_s *pxa2xx_lcdc_init(target_phys_addr_t base, qemu_irq irq,
-                DisplayState *ds)
+struct pxa2xx_lcdc_s *pxa2xx_lcdc_init(target_phys_addr_t base, qemu_irq irq)
 {
     int iomemtype;
     struct pxa2xx_lcdc_s *s;

@@ -994,7 +992,6 @@
     s->base = base;
     s->invalidated = 1;
     s->irq = irq;
-    s->ds = ds;
 
     pxa2xx_lcdc_orientation(s, graphic_rotate);
 

@@ -1002,9 +999,10 @@
                     pxa2xx_lcdc_writefn, s);
     cpu_register_physical_memory(base, 0x00100000, iomemtype);
 
-    s->console = graphic_console_init(ds, pxa2xx_update_display,
-                                      pxa2xx_invalidate_display,
-                                      pxa2xx_screen_dump, NULL, s);
+    s->ds = graphic_console_init(pxa2xx_update_display,
+                                 pxa2xx_invalidate_display,
+                                 pxa2xx_screen_dump, NULL, s);
+    register_displaystate(s->ds);
 
     switch (ds_get_bits_per_pixel(s->ds)) {
     case 0:

diff -r 03e762ec04bc hw/sm501.c
@@ -449,7 +449,6 @@
 typedef struct SM501State {
     /* graphic console status */
     DisplayState *ds;
-    QEMUConsole *console;
 
     /* status & internal resources */
     target_phys_addr_t base;

@@ -1009,7 +1008,7 @@
 
     /* adjust console size */
     if (s->last_width != width || s->last_height != height) {
-	qemu_console_resize(s->console, width, height);
+	qemu_console_resize(s->ds, width, height);
 	s->last_width = width;
 	s->last_height = height;
 	full_update = 1;

@@ -1066,7 +1065,7 @@
 	sm501_draw_crt(s);
 }
 
-void sm501_init(DisplayState *ds, uint32_t base, unsigned long local_mem_base,
+void sm501_init(uint32_t base, unsigned long local_mem_base,
 		uint32_t local_mem_bytes, CharDriverState *chr)
 {
     SM501State * s;

@@ -1085,7 +1084,6 @@
     s->misc_control = 0x00001000; /* assumes SH, active=low */
     s->dc_panel_control = 0x00010000;
     s->dc_crt_control = 0x00010000;
-    s->ds = ds;
 
     /* allocate local memory */
     s->local_mem = (uint8 *)phys_ram_base + local_mem_base;

@@ -1115,6 +1113,7 @@
 		       115200, chr, 1);
 
     /* create qemu graphic console */
-    s->console = graphic_console_init(s->ds, sm501_update_display, NULL,
-				      NULL, NULL, s);
+    s->ds = graphic_console_init(sm501_update_display, NULL,
+				 NULL, NULL, s);
+    register_displaystate(s->ds);
 }

diff -r 03e762ec04bc hw/ssd0303.c
@@ -45,7 +45,6 @@
 typedef struct {
     i2c_slave i2c;
     DisplayState *ds;
-    QEMUConsole *console;
     int row;
     int col;
     int start_line;

@@ -306,18 +305,18 @@
     return 0;
 }
 
-void ssd0303_init(DisplayState *ds, i2c_bus *bus, int address)
+void ssd0303_init(i2c_bus *bus, int address)
 {
     ssd0303_state *s;
 
     s = (ssd0303_state *)i2c_slave_init(bus, address, sizeof(ssd0303_state));
-    s->ds = ds;
     s->i2c.event = ssd0303_event;
     s->i2c.recv = ssd0303_recv;
     s->i2c.send = ssd0303_send;
-    s->console = graphic_console_init(ds, ssd0303_update_display,
-                                      ssd0303_invalidate_display,
-                                      NULL, NULL, s);
-    qemu_console_resize(s->console, 96 * MAGNIFY, 16 * MAGNIFY);
+    s->ds = graphic_console_init(ssd0303_update_display,
+                                 ssd0303_invalidate_display,
+                                 NULL, NULL, s);
+    register_displaystate(s->ds);
+    qemu_console_resize(s->ds, 96 * MAGNIFY, 16 * MAGNIFY);
     register_savevm("ssd0303_oled", -1, 1, ssd0303_save, ssd0303_load, s);
 }

diff -r 03e762ec04bc hw/ssd0323.c
@@ -44,7 +44,6 @@
 
 typedef struct {
     DisplayState *ds;
-    QEMUConsole *console;
 
     int cmd_len;
     int cmd;

@@ -322,7 +321,7 @@
     return 0;
 }
 
-void *ssd0323_init(DisplayState *ds, qemu_irq *cmd_p)
+void *ssd0323_init(qemu_irq *cmd_p)
 {
     ssd0323_state *s;
     qemu_irq *cmd;

@@ -330,11 +329,11 @@
     s = (ssd0323_state *)qemu_mallocz(sizeof(ssd0323_state));
     s->col_end = 63;
     s->row_end = 79;
-    s->ds = ds;
-    s->console = graphic_console_init(ds, ssd0323_update_display,
-                                      ssd0323_invalidate_display,
-                                      NULL, NULL, s);
-    qemu_console_resize(s->console, 128 * MAGNIFY, 64 * MAGNIFY);
+    s->ds = graphic_console_init(ssd0323_update_display,
+                                 ssd0323_invalidate_display,
+                                 NULL, NULL, s);
+    register_displaystate(s->ds);
+    qemu_console_resize(s->ds, 128 * MAGNIFY, 64 * MAGNIFY);
 
     cmd = qemu_allocate_irqs(ssd0323_cd, s, 1);
     *cmd_p = *cmd;

diff -r 03e762ec04bc hw/sun4m.h
@@ -22,7 +22,7 @@
 }
 
 /* tcx.c */
-void tcx_init(DisplayState *ds, target_phys_addr_t addr, uint8_t *vram_base,
+void tcx_init(target_phys_addr_t addr, uint8_t *vram_base,
               unsigned long vram_offset, int vram_size, int width, int height,
               int depth);
 

diff -r 03e762ec04bc hw/tc6393xb.c
@@ -123,7 +123,6 @@
     struct ecc_state_s ecc;
 
     DisplayState *ds;
-    QEMUConsole *console;
     ram_addr_t vram_addr;
     uint32_t scr_width, scr_height; /* in pixels */
     qemu_irq l3v;

@@ -486,7 +485,7 @@
         full_update = 1;
     }
     if (s->scr_width != ds_get_width(s->ds) || s->scr_height != ds_get_height(s->ds)) {
-        qemu_console_resize(s->console, s->scr_width, s->scr_height);
+        qemu_console_resize(s->ds, s->scr_width, s->scr_height);
         full_update = 1;
     }
     if (s->blanked)

@@ -566,7 +565,7 @@
     tc6393xb_writeb(opaque, addr + 3, value >> 24);
 }
 
-struct tc6393xb_s *tc6393xb_init(uint32_t base, qemu_irq irq, DisplayState *ds)
+struct tc6393xb_s *tc6393xb_init(uint32_t base, qemu_irq irq)
 {
     int iomemtype;
     struct tc6393xb_s *s;

@@ -597,19 +596,16 @@
                     tc6393xb_writefn, s);
     cpu_register_physical_memory(s->target_base, 0x10000, iomemtype);
 
-    if (ds) {
-        s->ds = ds;
-        s->vram_addr = qemu_ram_alloc(0x100000);
-        cpu_register_physical_memory(s->target_base + 0x100000, 0x100000, s->vram_addr);
-        s->scr_width = 480;
-        s->scr_height = 640;
-        s->console = graphic_console_init(ds,
-                tc6393xb_update_display,
-                NULL, /* invalidate */
-                NULL, /* screen_dump */
-                NULL, /* text_update */
-                s);
-    }
+    s->vram_addr = qemu_ram_alloc(0x100000);
+    cpu_register_physical_memory(s->target_base + 0x100000, 0x100000, s->vram_addr);
+    s->scr_width = 480;
+    s->scr_height = 640;
+    s->ds = graphic_console_init(tc6393xb_update_display,
+            NULL, /* invalidate */
+            NULL, /* screen_dump */
+            NULL, /* text_update */
+            s);
+    register_displaystate(s->ds);
 
     return s;
 }

diff -r 03e762ec04bc hw/tcx.c
@@ -36,7 +36,6 @@
 typedef struct TCXState {
     target_phys_addr_t addr;
     DisplayState *ds;
-    QEMUConsole *console;
     uint8_t *vram;
     uint32_t *vram24, *cplane;
     ram_addr_t vram_offset, vram24_offset, cplane_offset;

@@ -493,7 +492,7 @@
     tcx_dummy_writel,
 };
 
-void tcx_init(DisplayState *ds, target_phys_addr_t addr, uint8_t *vram_base,
+void tcx_init(target_phys_addr_t addr, uint8_t *vram_base,
               unsigned long vram_offset, int vram_size, int width, int height,
               int depth)
 {

@@ -504,7 +503,6 @@
     s = qemu_mallocz(sizeof(TCXState));
     if (!s)
         return;
-    s->ds = ds;
     s->addr = addr;
     s->vram_offset = vram_offset;
     s->width = width;

@@ -540,15 +538,17 @@
         s->cplane = (uint32_t *)vram_base;
         s->cplane_offset = vram_offset;
         cpu_register_physical_memory(addr + 0x0a000000ULL, size, vram_offset);
-        s->console = graphic_console_init(s->ds, tcx24_update_display,
-                                          tcx24_invalidate_display,
-                                          tcx24_screen_dump, NULL, s);
+        s->ds = graphic_console_init(tcx24_update_display,
+                                     tcx24_invalidate_display,
+                                     tcx24_screen_dump, NULL, s);
+        register_displaystate(s->ds);
     } else {
         cpu_register_physical_memory(addr + 0x00300000ULL, TCX_THC_NREGS_8,
                                      dummy_memory);
-        s->console = graphic_console_init(s->ds, tcx_update_display,
-                                          tcx_invalidate_display,
-                                          tcx_screen_dump, NULL, s);
+        s->ds = graphic_console_init(tcx_update_display,
+                                     tcx_invalidate_display,
+                                     tcx_screen_dump, NULL, s);
+        register_displaystate(s->ds);
     }
     // NetBSD writes here even with 8-bit display
     cpu_register_physical_memory(addr + 0x00301000ULL, TCX_THC_NREGS_24,

@@ -557,7 +557,7 @@
     register_savevm("tcx", addr, 4, tcx_save, tcx_load, s);
     qemu_register_reset(tcx_reset, s);
     tcx_reset(s);
-    qemu_console_resize(s->console, width, height);
+    qemu_console_resize(s->ds, width, height);
 }
 
 static void tcx_screen_dump(void *opaque, const char *filename)

diff -r 03e762ec04bc hw/vga.c
@@ -1293,7 +1293,7 @@
         cw != s->last_cw || cheight != s->last_ch || s->last_depth) {
         s->last_scr_width = width * cw;
         s->last_scr_height = height * cheight;
-        qemu_console_resize(s->console, s->last_scr_width, s->last_scr_height);
+        qemu_console_resize(s->ds, s->last_scr_width, s->last_scr_height);
         s->last_depth = 0;
         s->last_width = width;
         s->last_height = height;

@@ -1668,10 +1668,10 @@
                                                                s->vram_ptr + (s->start_addr * 4));
                 dpy_resize(s->ds);
             } else {
-                qemu_console_resize(s->console, disp_width, height);
+                qemu_console_resize(s->ds, disp_width, height);
             }
         } else {
-            qemu_console_resize(s->console, disp_width, height);
+            qemu_console_resize(s->ds, disp_width, height);
         }
         s->last_scr_width = disp_width;
         s->last_scr_height = height;

@@ -2177,7 +2177,7 @@
     vga_dirty_log_start(s);
 }
 
-void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
+void vga_common_init(VGAState *s, uint8_t *vga_ram_base,
                      ram_addr_t vga_ram_offset, int vga_ram_size)
 {
     int i, j, v, b;

@@ -2210,7 +2210,6 @@
     s->vram_ptr = vga_ram_base;
     s->vram_offset = vga_ram_offset;
     s->vram_size = vga_ram_size;
-    s->ds = ds;
     s->get_bpp = vga_get_bpp;
     s->get_offsets = vga_get_offsets;
     s->get_resolution = vga_get_resolution;

@@ -2359,7 +2358,7 @@
     cpu_register_physical_memory(vram_base + 0x000a0000, 0x20000, vga_io_memory);
 }
 
-int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
+int isa_vga_init(uint8_t *vga_ram_base,
                  unsigned long vga_ram_offset, int vga_ram_size)
 {
     VGAState *s;

@@ -2368,11 +2367,12 @@
     if (!s)
         return -1;
 
-    vga_common_init(s, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
+    vga_common_init(s, vga_ram_base, vga_ram_offset, vga_ram_size);
     vga_init(s);
 
-    s->console = graphic_console_init(s->ds, s->update, s->invalidate,
-                                      s->screen_dump, s->text_update, s);
+    s->ds = graphic_console_init(s->update, s->invalidate,
+                                 s->screen_dump, s->text_update, s);
+    register_displaystate(s->ds);
 
 #ifdef CONFIG_BOCHS_VBE
     /* XXX: use optimized standard vga accesses */

@@ -2382,7 +2382,7 @@
     return 0;
 }
 
-int isa_vga_mm_init(DisplayState *ds, uint8_t *vga_ram_base,
+int isa_vga_mm_init(uint8_t *vga_ram_base,
                     unsigned long vga_ram_offset, int vga_ram_size,
                     target_phys_addr_t vram_base, target_phys_addr_t ctrl_base,
                     int it_shift)

@@ -2393,11 +2393,12 @@
     if (!s)
         return -1;
 
-    vga_common_init(s, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
+    vga_common_init(s, vga_ram_base, vga_ram_offset, vga_ram_size);
     vga_mm_init(s, vram_base, ctrl_base, it_shift);
 
-    s->console = graphic_console_init(s->ds, s->update, s->invalidate,
-                                      s->screen_dump, s->text_update, s);
+    s->ds = graphic_console_init(s->update, s->invalidate,
+                                 s->screen_dump, s->text_update, s);
+    register_displaystate(s->ds);
 
 #ifdef CONFIG_BOCHS_VBE
     /* XXX: use optimized standard vga accesses */

@@ -2407,7 +2408,7 @@
     return 0;
 }
 
-int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
+int pci_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
                  unsigned long vga_ram_offset, int vga_ram_size,
                  unsigned long vga_bios_offset, int vga_bios_size)
 {

@@ -2422,11 +2423,12 @@
         return -1;
     s = &d->vga_state;
 
-    vga_common_init(s, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
+    vga_common_init(s, vga_ram_base, vga_ram_offset, vga_ram_size);
     vga_init(s);
 
-    s->console = graphic_console_init(s->ds, s->update, s->invalidate,
-                                      s->screen_dump, s->text_update, s);
+    s->ds = graphic_console_init(s->update, s->invalidate,
+                                 s->screen_dump, s->text_update, s);
+    register_displaystate(s->ds);
 
     s->pci_dev = &d->dev;
 

diff -r 03e762ec04bc hw/vga_int.h
@@ -146,7 +146,6 @@
     VGA_STATE_COMMON_BOCHS_VBE                                          \
     /* display refresh support */                                       \
     DisplayState *ds;                                                   \
-    QEMUConsole *console;                                               \
     uint32_t font_offsets[2];                                           \
     int graphic_mode;                                                   \
     uint8_t shift_control;                                              \

@@ -193,7 +192,7 @@
     return (v << 2) | (b << 1) | b;
 }
 
-void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
+void vga_common_init(VGAState *s, uint8_t *vga_ram_base,
                      ram_addr_t vga_ram_offset, int vga_ram_size);
 void vga_init(VGAState *s);
 

diff -r 03e762ec04bc hw/vmware_vga.c
@@ -57,7 +57,6 @@
 
 #ifndef EMBED_STDVGA
     DisplayState *ds;
-    QEMUConsole *console;
     int vram_size;
     ram_addr_t vram_offset;
 #endif

@@ -384,7 +383,7 @@
 
 # ifdef DIRECT_VRAM
     if (s->ds->dpy_copy)
-        qemu_console_copy(s->console, x0, y0, x1, y1, w, h);
+        qemu_console_copy(s->ds, x0, y0, x1, y1, w, h);
     else
 # endif
     {

@@ -877,7 +876,7 @@
     if (s->new_width != s->width || s->new_height != s->height) {
         s->width = s->new_width;
         s->height = s->new_height;
-        qemu_console_resize(s->console, s->width, s->height);
+        qemu_console_resize(s->ds, s->width, s->height);
         s->invalidated = 1;
     }
 }

@@ -915,7 +914,7 @@
     s->width = -1;
     s->height = -1;
     s->svgaid = SVGA_ID;
-    s->depth = ds_get_bits_per_pixel(s->ds) ? ds_get_bits_per_pixel(s->ds) : 24;
+    s->depth = 24;
     s->bypp = (s->depth + 7) >> 3;
     s->cursor.on = 0;
     s->redraw_fifo_first = 0;

@@ -1116,11 +1115,10 @@
     return 0;
 }
 
-static void vmsvga_init(struct vmsvga_state_s *s, DisplayState *ds,
+static void vmsvga_init(struct vmsvga_state_s *s,
                 uint8_t *vga_ram_base, unsigned long vga_ram_offset,
                 int vga_ram_size)
 {
-    s->ds = ds;
     s->vram = vga_ram_base;
     s->vram_size = vga_ram_size;
     s->vram_offset = vga_ram_offset;

@@ -1131,15 +1129,16 @@
     vmsvga_reset(s);
 
 #ifdef EMBED_STDVGA
-    vga_common_init((VGAState *) s, ds,
+    vga_common_init((VGAState *) s,
                     vga_ram_base, vga_ram_offset, vga_ram_size);
     vga_init((VGAState *) s);
 #endif
 
-    s->console = graphic_console_init(ds, vmsvga_update_display,
-                                      vmsvga_invalidate_display,
-                                      vmsvga_screen_dump,
-                                      vmsvga_text_update, s);
+    s->ds = graphic_console_init(vmsvga_update_display,
+                                 vmsvga_invalidate_display,
+                                 vmsvga_screen_dump,
+                                 vmsvga_text_update, s);
+    register_displaystate(s->ds);
 
 #ifdef CONFIG_BOCHS_VBE
     /* XXX: use optimized standard vga accesses */

@@ -1219,7 +1218,7 @@
 #define PCI_CLASS_SUB_VGA		0x00
 #define PCI_CLASS_HEADERTYPE_00h	0x00
 
-void pci_vmsvga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
+void pci_vmsvga_init(PCIBus *bus, uint8_t *vga_ram_base,
                      unsigned long vga_ram_offset, int vga_ram_size)
 {
     struct pci_vmsvga_state_s *s;

@@ -1249,7 +1248,7 @@
     pci_register_io_region(&s->card, 1, vga_ram_size,
                     PCI_ADDRESS_SPACE_MEM_PREFETCH, pci_vmsvga_map_mem);
 
-    vmsvga_init(&s->chip, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
+    vmsvga_init(&s->chip, vga_ram_base, vga_ram_offset, vga_ram_size);
 
     register_savevm("vmware_vga", 0, 0, pci_vmsvga_save, pci_vmsvga_load, s);
 }