RX problem in ibm_newemac driver

DISCUSSION Felix Radensky 3 participants 7 messages Mar 10, 2009 – Mar 13, 2009 1 message not in the archive

Subsystems (2)

Networking Network drivers

lore

Share & tools

lore

Felix Radensky

author

2009-03-10 19:51 UTC #0 lore raw

Hi,

I'm experiencing RX problem on custom board based on AMCC 405EXr processor. Channel 0 of EMAC is connected to 10/100 Micrel KSZ8041NL PHY in MII mode. Ethernet works fine in u-boot (version 2009.01). In Linux (2.6.27) Ethernet works fine as well if EMAC was initialized in u-boot. It is enough to send ping from u-boot (even to non-existing host) to make things work in linux. But if u-boot takes kernel and ramdisk images from flash and does not initialize EMAC only TX side works in linux.

I can see that TX counters are incremented when pinging from EMAC side, but RX counters remain zero. RX error counter in PHY is zero as well. I've enabled debugging in EMAC driver and verified that RX EOB interrupt is not triggered. FER register in RGMII bridge is properly configured for MII mode on channel 0. I've tried to dump EMAC registers using ethtool and got machine check exception.

I don't know what else could be done to identify the source of the problem. Any tips would be greatly appreciated.

Thanks.

Felix.

Benjamin Herrenschmidt

2009-03-10 20:50 UTC #1 lore raw

Quoted 10 lines · Felix Radensky

Hi,
I'm experiencing RX problem on custom board based on AMCC 405EXr processor. Channel 0 of EMAC is connected to 10/100 Micrel KSZ8041NL PHY in MII mode. Ethernet works fine in u-boot (version 2009.01). In Linux (2.6.27) Ethernet works fine as well if EMAC was initialized in u-boot. It is enough to send ping from u-boot (even to non-existing host) to make things work in linux. But if u-boot takes kernel and ramdisk images from flash and does not initialize EMAC only TX side works in linux.

You should CC linuxppc-dev where you are more likely to find people to help here.

Quoted 10 lines

I can see that TX counters are incremented when pinging from EMAC side, but RX counters remain zero. RX error counter in PHY is zero as well. I've enabled debugging in EMAC driver and verified that RX EOB interrupt is not triggered. FER register in RGMII bridge is properly configured for MII mode on channel 0. I've tried to dump EMAC registers using ethtool and got machine check exception.
I don't know what else could be done to identify the source of the problem. Any tips would be greatly appreciated.

I don't have a 405EXr here, but it smells like the old reset problem when the link is down. Maybe we are missing code to force clocks on 405EXr when there's no link ?

Ben.

Felix Radensky

author

2009-03-10 22:14 UTC #2 lore raw

Quoted 14 lines · Benjamin Herrenschmidt

Quoted 11 lines · Felix Radensky
Hi,
I'm experiencing RX problem on custom board based on AMCC 405EXr processor. Channel 0 of EMAC is connected to 10/100 Micrel KSZ8041NL PHY in MII mode. Ethernet works fine in u-boot (version 2009.01). In Linux (2.6.27) Ethernet works fine as well if EMAC was initialized in u-boot. It is enough to send ping from u-boot (even to non-existing host) to make things work in linux. But if u-boot takes kernel and ramdisk images from flash and does not initialize EMAC only TX side works in linux.

Quoted 4 lines

You should CC linuxppc-dev where you are more likely to find people to help here.

I've sent a message to linuxppc-dev yesterday, but didn't get any reply so far.

Quoted 8 lines

Quoted 8 lines
I can see that TX counters are incremented when pinging from EMAC side, but RX counters remain zero. RX error counter in PHY is zero as well. I've enabled debugging in EMAC driver and verified that RX EOB interrupt is not triggered. FER register in RGMII bridge is properly configured for MII mode on channel 0. I've tried to dump EMAC registers using ethtool and got machine check exception.

Quoted 8 lines

Quoted 3 lines
I don't know what else could be done to identify the source of the problem. Any tips would be greatly appreciated.
I don't have a 405EXr here, but it smells like the old reset problem when the link is down. Maybe we are missing code to force clocks on 405EXr when there's no link ?

Yes, seems logical. U-boot has code to enable and disable loopback clock for 440SPE, 440EPX,440GRX,405EX, 460EX and 460GT.

I can test patches on my board. Alternatively, I can try something myself if you can provide some guidance. I guess you are referring to the code using EMAC_FTR_440GX_PHY_CLK_FIX and EMAC_FTR_440EP_PHY_CLK_FIX.

Thanks.

Felix.

Benjamin Herrenschmidt

2009-03-10 22:57 UTC #3 lore raw

Quoted 7 lines · Felix Radensky

Yes, seems logical. U-boot has code to enable and disable loopback clock for 440SPE, 440EPX,440GRX,405EX, 460EX and 460GT.
I can test patches on my board. Alternatively, I can try something myself if you can provide some guidance. I guess you are referring to the code using
EMAC_FTR_440GX_PHY_CLK_FIX and EMAC_FTR_440EP_PHY_CLK_FIX.

It would be nice if you could try something as I don't have anything to test here.

And yes, it's probably one of those 2 fixes that need to be extended.

I'll have a look later today if I can find the 405EXr user manual and give you more precise guidance.

Cheers,
Ben.

Benjamin Herrenschmidt

2009-03-11 00:21 UTC #5 lore raw

In reply to a message not in the archive

Quoted 15 lines · Felix Radensky

Quoted 14 lines · Benjamin Herrenschmidt
Quoted 8 lines · Felix Radensky
Yes, seems logical. U-boot has code to enable and disable loopback clock for 440SPE, 440EPX,440GRX,405EX, 460EX and 460GT.
I can test patches on my board. Alternatively, I can try something myself if you can provide some guidance. I guess you are referring to the code using
EMAC_FTR_440GX_PHY_CLK_FIX and EMAC_FTR_440EP_PHY_CLK_FIX.
It would be nice if you could try something as I don't have anything to test here.

Quoted 6 lines

Quoted 4 lines
And yes, it's probably one of those 2 fixes that need to be extended.
I'll have a look later today if I can find the 405EXr user manual and give you more precise guidance.
From the doc, it looks like it needs the 440 type workaround (and the

405EX as well). Can you try this patch:

emac: Fix clock control for 405EX and 405EXr chips

The EMAC variant in the 405EX and 405EXr chips needs the "440EP" type clock control workaround to avoid lockups of the Rx side during reset.

Signed-off-by Benjamin Herrenschmidt <[email protected]>

---

drivers/net/ibm_newemac/core.c +3 -0

Index: linux-work/drivers/net/ibm_newemac/core.c
===================================================================
@@ -2594,6 +2594,9 @@ static int __devinit emac_init_config(st
 		if (of_device_is_compatible(np, "ibm,emac-460ex") ||
 		    of_device_is_compatible(np, "ibm,emac-460gt"))
 			dev->features |= EMAC_FTR_460EX_PHY_CLK_FIX;
+		if (of_device_is_compatible(np, "ibm,emac-405ex") ||
+		    of_device_is_compatible(np, "ibm,emac-405exr"))
+			dev->features |= EMAC_FTR_440EP_PHY_CLK_FIX;
 	} else if (of_device_is_compatible(np, "ibm,emac4")) {
 		dev->features |= EMAC_FTR_EMAC4;
 		if (of_device_is_compatible(np, "ibm,emac-440gx"))

Felix Radensky

author

2009-03-11 08:56 UTC #6 lore raw

Quoted 43 lines · Benjamin Herrenschmidt

Quoted 16 lines · Felix Radensky
Quoted 14 lines · Benjamin Herrenschmidt
Quoted 8 lines · Felix Radensky
Yes, seems logical. U-boot has code to enable and disable loopback clock for 440SPE, 440EPX,440GRX,405EX, 460EX and 460GT.
I can test patches on my board. Alternatively, I can try something myself if you can provide some guidance. I guess you are referring to the code using EMAC_FTR_440GX_PHY_CLK_FIX and EMAC_FTR_440EP_PHY_CLK_FIX.
It would be nice if you could try something as I don't have anything to test here.
Quoted 7 lines
Quoted 5 lines
And yes, it's probably one of those 2 fixes that need to be extended.
I'll have a look later today if I can find the 405EXr user manual and give you more precise guidance.
From the doc, it looks like it needs the 440 type workaround (and the
405EX as well). Can you try this patch:
emac: Fix clock control for 405EX and 405EXr chips
The EMAC variant in the 405EX and 405EXr chips needs the "440EP" type clock control workaround to avoid lockups of the Rx side during reset.
Signed-off-by Benjamin Herrenschmidt <[email protected]>
---
Index: linux-work/drivers/net/ibm_newemac/core.c
===================================================================

drivers/net/ibm_newemac/core.c static int __devinit emac_init_config(st · line 2602

Quoted 9 lines

drivers/net/ibm_newemac/core.c +3 -0

@@ -2594,6 +2594,9 @@ static int __devinit emac_init_config(st
 		if (of_device_is_compatible(np, "ibm,emac-460ex") ||
 		    of_device_is_compatible(np, "ibm,emac-460gt"))
 			dev->features |= EMAC_FTR_460EX_PHY_CLK_FIX;
+		if (of_device_is_compatible(np, "ibm,emac-405ex") ||
+		    of_device_is_compatible(np, "ibm,emac-405exr"))
+			dev->features |= EMAC_FTR_440EP_PHY_CLK_FIX;
 	} else if (of_device_is_compatible(np, "ibm,emac4")) {
 		dev->features |= EMAC_FTR_EMAC4;
 		if (of_device_is_compatible(np, "ibm,emac-440gx"))

Hi, Ben

This patch fixes a problem for me. Thank you very much for a quick fix.

Felix.

David Miller

maintainer

2009-03-13 20:49 UTC #7 lore raw

From: Felix Radensky <[email protected]>
Date: Wed, 11 Mar 2009 10:56:31 +0200

Quoted 7 lines

Quoted 6 lines · Benjamin Herrenschmidt
emac: Fix clock control for 405EX and 405EXr chips
The EMAC variant in the 405EX and 405EXr chips needs the "440EP" type clock control workaround to avoid lockups of the Rx side during reset.
Signed-off-by Benjamin Herrenschmidt <[email protected]>

...

Quoted 1 line

This patch fixes a problem for me. Thank you very much for a quick fix.

Patch applied, thanks everyone.