x86: use online_mask for x2apic target_cpus
PATCH 1/1 x86: use online_mask for x2apic target_cpus
found one system with x2apic report:
[ 302.859446] igbvf 0000:81:10.4: enabling device (0000 -> 0002) [ 302.874369] igbvf 0000:81:10.4: using 64bit DMA mask [ 302.879023] igbvf 0000:81:10.4: using 64bit consistent DMA mask [ 302.894386] igbvf 0000:81:10.4: enabling bus mastering [ 302.898171] igbvf 0000:81:10.4: setting latency timer to 64 [ 302.914050] reserve_memtype added 0xefb08000-0xefb0c000, track uncached-minus, req uncached-minus, ret uncached-minus [ 302.933839] reserve_memtype added 0xefb28000-0xefb29000, track uncached-minus, req uncached-minus, ret uncached-minus [ 302.940367] alloc irq_desc for 265 on node 4 [ 302.956874] alloc kstat_irqs on node 4 [ 302.959452] alloc irq_2_iommu on node 0 [ 302.974328] igbvf 0000:81:10.4: irq 265 for MSI/MSI-X [ 302.977778] alloc irq_desc for 266 on node 4 [ 302.980347] alloc kstat_irqs on node 4 [ 302.995312] free_memtype request 0xefb28000-0xefb29000 [ 302.998816] igbvf 0000:81:10.4: Failed to initialize MSI-X interrupts.
it turns out that when trying to enable msi-x. __assign_irq_vector(new, cfg_new, apic->target_cpus()) can not get vector because for x2apic target-cpus return cpumask_of(0)
update that to online_mask like xapic.
--- arch/x86/kernel/apic/x2apic_cluster.c | 8 +++++--- arch/x86/kernel/apic/x2apic_phys.c | 8 +++++--- 2 files changed, 10 insertions(+), 6 deletions(-)
arch/x86/kernel/apic/x2apic_cluster.c +5 -3
@@ -17,11 +17,13 @@ static int x2apic_acpi_madt_oem_check(chreturn x2apic_enabled (); } -/* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ - +/* +* need to use more than cpu 0, because we need more vectors when +* MSI-X are used. +*/ static const struct cpumask *x2apic_target_cpus (void ) { -return cpumask_of (0 ); +return cpu_online_mask; }/*
arch/x86/kernel/apic/x2apic_phys.c +5 -3
@@ -27,11 +27,13 @@ static int x2apic_acpi_madt_oem_check(chreturn 0 ; } -/* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ - +/* +* need to use more than cpu 0, because we need more vectors when +* MSI-X are used. +*/ static const struct cpumask *x2apic_target_cpus (void ) { -return cpumask_of (0 ); +return cpu_online_mask; }static void x2apic_vector_allocation_domain (int cpu,struct cpumask *retmask)
Quoted 17 lines · Yinghai Lu
found one system with x2apic report:
[ 302.859446] igbvf 0000:81:10.4: enabling device (0000 -> 0002) [ 302.874369] igbvf 0000:81:10.4: using 64bit DMA mask [ 302.879023] igbvf 0000:81:10.4: using 64bit consistent DMA mask [ 302.894386] igbvf 0000:81:10.4: enabling bus mastering [ 302.898171] igbvf 0000:81:10.4: setting latency timer to 64 [ 302.914050] reserve_memtype added 0xefb08000-0xefb0c000, track uncached-minus, req uncached-minus, ret uncached-minus [ 302.933839] reserve_memtype added 0xefb28000-0xefb29000, track uncached-minus, req uncached-minus, ret uncached-minus [ 302.940367] alloc irq_desc for 265 on node 4 [ 302.956874] alloc kstat_irqs on node 4 [ 302.959452] alloc irq_2_iommu on node 0 [ 302.974328] igbvf 0000:81:10.4: irq 265 for MSI/MSI-X [ 302.977778] alloc irq_desc for 266 on node 4 [ 302.980347] alloc kstat_irqs on node 4 [ 302.995312] free_memtype request 0xefb28000-0xefb29000 [ 302.998816] igbvf 0000:81:10.4: Failed to initialize MSI-X interrupts.
Quoted 7 lines
it turns out that when trying to enable msi-x.
__assign_irq_vector(new, cfg_new, apic->target_cpus())can not get vector because for x2apic target-cpus returncpumask_of(0)update that to
online_masklike xapic.Signed-off-by Yinghai Lu <[email protected]>
[tip:x86/urgent] x86: Fix MSI-X initialization by using online_mask for x2apic target_cpus
In reply to Yinghai LuCommit-ID: 087d7e56deffb611a098e7e257388a41edbeef1f Gitweb: http://git.kernel.org/tip/087d7e56deffb611a098e7e257388a41edbeef1f Author: Yinghai Lu <[email protected]> AuthorDate: Tue, 4 Aug 2009 08:59:59 -0700 Committer: Ingo Molnar <[email protected]> CommitDate: Sat, 8 Aug 2009 17:04:58 +0200
x86: Fix MSI-X initialization by using online_mask for x2apic target_cpus
found a system where x2apic reports an MSI-X irq initialization failure:
[ 302.859446] igbvf 0000:81:10.4: enabling device (0000 -> 0002) [ 302.874369] igbvf 0000:81:10.4: using 64bit DMA mask [ 302.879023] igbvf 0000:81:10.4: using 64bit consistent DMA mask [ 302.894386] igbvf 0000:81:10.4: enabling bus mastering [ 302.898171] igbvf 0000:81:10.4: setting latency timer to 64 [ 302.914050] reserve_memtype added 0xefb08000-0xefb0c000, track uncached-minus, req uncached-minus, ret uncached-minus [ 302.933839] reserve_memtype added 0xefb28000-0xefb29000, track uncached-minus, req uncached-minus, ret uncached-minus [ 302.940367] alloc irq_desc for 265 on node 4 [ 302.956874] alloc kstat_irqs on node 4 [ 302.959452] alloc irq_2_iommu on node 0 [ 302.974328] igbvf 0000:81:10.4: irq 265 for MSI/MSI-X [ 302.977778] alloc irq_desc for 266 on node 4 [ 302.980347] alloc kstat_irqs on node 4 [ 302.995312] free_memtype request 0xefb28000-0xefb29000 [ 302.998816] igbvf 0000:81:10.4: Failed to initialize MSI-X interrupts.
... it turns out that when trying to enable MSI-X, __assign_irq_vector(new, cfg_new, apic->target_cpus()) can not get vector because for x2apic target-cpus returns cpumask_of(0)
Update that to online_mask like xapic.
LKML-Reference: <[email protected]>
--- arch/x86/kernel/apic/x2apic_cluster.c | 8 +++++--- arch/x86/kernel/apic/x2apic_phys.c | 8 +++++--- 2 files changed, 10 insertions(+), 6 deletions(-)
arch/x86/kernel/apic/x2apic_cluster.c +5 -3
@@ -17,11 +17,13 @@ static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)return x2apic_enabled (); } -/* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ - +/* +* need to use more than cpu 0, because we need more vectors when +* MSI-X are used. +*/ static const struct cpumask *x2apic_target_cpus (void ) { -return cpumask_of (0 ); +return cpu_online_mask; }/*
arch/x86/kernel/apic/x2apic_phys.c +5 -3
@@ -27,11 +27,13 @@ static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)return 0 ; } -/* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ - +/* +* need to use more than cpu 0, because we need more vectors when +* MSI-X are used. +*/ static const struct cpumask *x2apic_target_cpus (void ) { -return cpumask_of (0 ); +return cpu_online_mask; }static void x2apic_vector_allocation_domain (int cpu,struct cpumask *retmask)