b43: LP-PHY: Update code for spec fixes, and fix a few typos

A few typos have been discovered both in the specs in and our code. This patch fixes them.

Also use lpphy_op_switch_channel consistently, and make all callers print its return value for easier debugging.

Signed-off-by Gábor Stefanik <[email protected]>

---
I think using a forward declaration is justified in this case; as avoiding the forward decl would require moving around huge blocks of code, completely breaking any logical ordering.

A few typos have been discovered both in the specs in and our code. This patch fixes them.

Also use lpphy_op_switch_channel consistently, and make all callers print its return value for easier debugging.

Signed-off-by Gábor Stefanik <[email protected]>

---
I think using a forward declaration is justified in this case; as avoiding the forward decl would require moving around huge blocks of code, completely breaking any logical ordering.

drivers/net/wireless/b43/phy_lp.c | 51
++++++++++++++++++++++++------------

1 files changed, 34 insertions(+), 17 deletions(-)

drivers/net/wireless/b43/phy_lp.c +21 -12

index e4a040b..a51da6e 100644
@@ -552,7 +552,7 @@ static void lpphy_2062_init(struct b43_wldev *dev)
    B43_WARN_ON(!(bus->chipco.capabilities & SSB_CHIPCO_CAP_PMU));
    B43_WARN_ON(crystalfreq == 0);
 
-    if (crystalfreq >= 30000000) {
+    if (crystalfreq <= 30000000) {
        lpphy->pdiv = 1;
        b43_radio_mask(dev, B2062_S_RFPLL_CTL1, 0xFFFB);
    } else {

@@ -560,14 +560,16 @@ static void lpphy_2062_init(struct b43_wldev *dev)
        b43_radio_set(dev, B2062_S_RFPLL_CTL1, 0x4);
    }
 
-    tmp = (800000000 * lpphy->pdiv + crystalfreq) /
-          (32000000 * lpphy->pdiv);
-    tmp = (tmp - 1) & 0xFF;
+    tmp = (((800000000 * lpphy->pdiv + crystalfreq) /
+          (2 * crystalfreq)) - 8) & 0xFF;
+    b43_radio_write(dev, B2062_S_RFPLL_CTL7, tmp);
+
+    tmp = (((100 * crystalfreq + 16000000 * lpphy->pdiv) /
+          (32000000 * lpphy->pdiv)) - 1) & 0xFF;
    b43_radio_write(dev, B2062_S_RFPLL_CTL18, tmp);
 
-    tmp = (2 * crystalfreq + 1000000 * lpphy->pdiv) /
-          (2000000 * lpphy->pdiv);
-    tmp = ((tmp & 0xFF) - 1) & 0xFFFF;
+    tmp = (((2 * crystalfreq + 1000000 * lpphy->pdiv) /
+          (2000000 * lpphy->pdiv)) - 1) & 0xFF;
    b43_radio_write(dev, B2062_S_RFPLL_CTL19, tmp);
 
    ref = (1000 * lpphy->pdiv + 2 * crystalfreq) / (2000 * lpphy->pdiv);

@@ -671,7 +673,7 @@ static void lpphy_radio_init(struct b43_wldev *dev)
    b43_phy_mask(dev, B43_LPPHY_FOURWIRE_CTL, 0xFFFD);
    udelay(1);
 
-    if (dev->phy.rev < 2) {
+    if (dev->phy.radio_ver == 0x2062) {
        lpphy_2062_init(dev);
    } else {
        lpphy_2063_init(dev);

@@ -688,11 +690,18 @@ struct lpphy_iq_est { u32 iq_prod, i_pwr, q_pwr; };
 
 static void lpphy_set_rc_cap(struct b43_wldev *dev)
 {
-    u8 rc_cap = dev->phy.lp->rc_cap;
+    struct b43_phy_lp *lpphy = dev->phy.lp;
 
-    b43_radio_write(dev, B2062_N_RXBB_CALIB2, max_t(u8, rc_cap-4, 0x80));
-    b43_radio_write(dev, B2062_N_TX_CTL_A, ((rc_cap & 0x1F) >> 1) | 0x80);
-    b43_radio_write(dev, B2062_S_RXG_CNT16, ((rc_cap & 0x1F) >> 2) |
 0x80);
+    u8 rc_cap = (lpphy->rc_cap & 0x1F) >> 1;
+   
+    if (dev->phy.rev == 1) //FIXME check channel 14!
+        rc_cap = max_t(u8, rc_cap + 5, 15);
+
+    b43_radio_write(dev, B2062_N_RXBB_CALIB2,
+            max_t(u8, lpphy->rc_cap - 4, 0x80));
+    b43_radio_write(dev, B2062_N_TX_CTL_A, rc_cap | 0x80);
+    b43_radio_write(dev, B2062_S_RXG_CNT16,
+            ((lpphy->rc_cap & 0x1F) >> 2) | 0x80);
 }
 

static u8 lpphy_get_bb_mult(struct b43_wldev *dev)

drivers/net/wireless/b43/phy_lp.c +3 -0

@@ -1101,6 +1110,9 @@ static void lpphy_set_tx_power_control(struct
 b43_wldev *dev,
    lpphy_write_tx_pctl_mode_to_hardware(dev);
 }
 
+static int b43_lpphy_op_switch_channel(struct b43_wldev *dev,
+                       unsigned int new_channel);
+
 static void lpphy_rev0_1_rc_calib(struct b43_wldev *dev)
 {

    struct b43_phy_lp *lpphy = dev->phy.lp;

drivers/net/wireless/b43/phy_lp.c +7 -2

@@ -1118,11 +1130,16 @@ static void lpphy_rev0_1_rc_calib(struct
 b43_wldev *dev)
        old_rf2_ovr, old_rf2_ovrval, old_phy_ctl;
    enum b43_lpphy_txpctl_mode old_txpctl;
    u32 normal_pwr, ideal_pwr, mean_sq_pwr, tmp = 0, mean_sq_pwr_min = 0;
-    int loopback, i, j, inner_sum;
+    int loopback, i, j, inner_sum, err;
 
    memset(&iq_est, 0, sizeof(iq_est));
 
-    b43_switch_channel(dev, 7);
+    err = b43_lpphy_op_switch_channel(dev, 7);
+    if (err) {
+        b43dbg(dev->wl,
+               "RC calib: Failed to switch to channel 7, error = %d",
+               err);
+    }
    old_txg_ovr = (b43_phy_read(dev, B43_LPPHY_AFE_CTL_OVR) >> 6) & 1;
    old_bbmult = lpphy_get_bb_mult(dev);

if (old_txg_ovr)

drivers/net/wireless/b43/phy_lp.c +0 -0

@@ -1881,14 +1898,14 @@ static int lpphy_b2062_tune(struct b43_wldev *dev,
 {
    struct b43_phy_lp *lpphy = dev->phy.lp;