Phy lib again
Subsystems (5)
Hi Ben,
I saw you have phy lib in your branch. What is the current state? Are there any problems? When do you want to add to mainline?
Thanks,
Michal
Signature · 4 lines
Michal Simek, Ing. (M.Eng) w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/ Microblaze U-BOOT custodian
Hi Michal,
Quoted 2 lines · On Tuesday 25 August 2009 09:02:14 Michal Simek wrote:
I saw you have phy lib in your branch. What is the current state? Are there any problems? When do you want to add to mainline?
IIRC, Jean-Christophe is also working on a PHY lib implementation (port from the Linux version).
Jean-Christophe, what's the current status of this work? I suggest you start sending ideas/patches for discussion soon, perhaps as RFC in the first stage.
Thanks.
Cheers,
Stefan
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: office at denx.de
Hi Stefan,
Quoted 11 lines · Stefan Roese
Hi Michal,
Quoted 2 lines · On Tuesday 25 August 2009 09:02:14 Michal Simek wrote:
I saw you have phy lib in your branch. What is the current state? Are there any problems? When do you want to add to mainline?
IIRC, Jean-Christophe is also working on a PHY lib implementation (port from the Linux version).
Jean-Christophe, what's the current status of this work? I suggest you start sending ideas/patches for discussion soon, perhaps as RFC in the first stage.
Ben has it at http://git.denx.de/?p=u-boot/u-boot-net.git;a=shortlog;h=refs/heads/phylib
Thanks,
Michal
Quoted 15 lines
Thanks.
Cheers,
Stefan--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: office at denx.de
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Signature · 4 lines
Michal Simek, Ing. (M.Eng) w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/ Microblaze U-BOOT custodian
Quoted 11 lines · Stefan Roese
Hi Michal,
Quoted 2 lines · On Tuesday 25 August 2009 09:02:14 Michal Simek wrote:
I saw you have phy lib in your branch. What is the current state? Are there any problems? When do you want to add to mainline?
IIRC, Jean-Christophe is also working on a PHY lib implementation (port from the Linux version).
Jean-Christophe, what's the current status of this work? I suggest you start sending ideas/patches for discussion soon, perhaps as RFC in the first stage.
as I've nearly finish but yes I can send an RFC
Best Regards,
J.
Hi Michal,
Quoted 11 lines · Michal Simek
Hi Stefan,
Quoted 7 lines · Stefan Roese
Hi Michal,
Quoted 3 lines · On Tuesday 25 August 2009 09:02:14 Michal Simek wrote:
I saw you have phy lib in your branch. What is the current state? Are there any problems? When do you want to add to mainline?
Quoted 10 lines
Quoted 6 lines
IIRC, Jean-Christophe is also working on a PHY lib implementation (port from the Linux version).
Jean-Christophe, what's the current status of this work? I suggest you start sending ideas/patches for discussion soon, perhaps as RFC in the first stage.
Ben has it at http://git.denx.de/?p=u-boot/u-boot-net.git;a=shortlog;h=refs/heads/phylib
A while ago I started porting the Linux PHY library to U-boot but got distracted. This branch contains the incomplete, untested work. I suspect JC is further along, so let's see what he comes up with. This is a complicated thing that requires a well-thought-out design, so I expect there will be much iteration.
regards,
Ben
Hi Ben,
Quoted 20 lines · Ben Warren
Hi Michal,
Quoted 17 lines · Michal Simek
Hi Stefan,
Quoted 13 lines · Stefan Roese
Hi Michal,
Quoted 3 lines · On Tuesday 25 August 2009 09:02:14 Michal Simek wrote:
I saw you have phy lib in your branch. What is the current state? Are there any problems? When do you want to add to mainline?
IIRC, Jean-Christophe is also working on a PHY lib implementation (port from the Linux version).
Jean-Christophe, what's the current status of this work? I suggest you start sending ideas/patches for discussion soon, perhaps as RFC in the first stage.
Quoted 8 lines
Quoted 3 lines
Ben has it at http://git.denx.de/?p=u-boot/u-boot-net.git;a=shortlog;h=refs/heads/phylib
A while ago I started porting the Linux PHY library to U-boot but got distracted. This branch contains the incomplete, untested work. I suspect JC is further along, so let's see what he comes up with. This is a complicated thing that requires a well-thought-out design, so I expect there will be much iteration.
Yes, I expect a lot of testing too.
Michal
Quoted 8 lines
regards,
Ben
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Signature · 4 lines
Michal Simek, Ing. (M.Eng) w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/ Microblaze U-BOOT custodian
RFC PATCH 1/3 net: rework the mii support
In reply to Michal Simekthis rework is done in order to add a phylib and reduce and simplify the implementation of multi net_device support for the same driver
precedently we pass the device name to the miiphy_read/write & co
now we pass the mii_device instance of the mii bus all network driver are switch to this way
we currently keep the old miiphy api by wrapping it to the new mii_device api until we have the phylib implementation and all the network driver using it
--- board/Marvell/rd6281a/rd6281a.c | 18 +- board/Marvell/sheevaplug/sheevaplug.c | 16 +- board/actux1/actux1.c | 15 +- board/actux2/actux2.c | 4 +- board/actux3/actux3.c | 9 +- board/actux4/actux4.c | 2 +- board/amcc/taishan/lcd.c | 52 +++-- board/atum8548/atum8548.c | 2 +- board/csb272/csb272.c | 10 +- board/csb472/csb472.c | 10 +- board/ep82xxm/ep82xxm.c | 2 +- board/esd/common/misc.c | 7 +- board/esd/pmc440/pmc440.c | 24 +- board/evb64260/eth.c | 48 ++-- board/freescale/mpc8260ads/mpc8260ads.c | 2 +- board/freescale/mpc8323erdb/mpc8323erdb.c | 2 +- board/freescale/mpc832xemds/mpc832xemds.c | 2 +- board/freescale/mpc8349emds/mpc8349emds.c | 2 +- board/freescale/mpc8349itx/mpc8349itx.c | 2 +- board/freescale/mpc8360emds/mpc8360emds.c | 2 +- board/freescale/mpc8360erdk/mpc8360erdk.c | 2 +- board/freescale/mpc8536ds/mpc8536ds.c | 2 +- board/freescale/mpc8544ds/mpc8544ds.c | 2 +- board/freescale/mpc8548cds/mpc8548cds.c | 23 +- board/freescale/mpc8560ads/mpc8560ads.c | 2 +- board/freescale/mpc8572ds/mpc8572ds.c | 2 +- board/freescale/p2020ds/p2020ds.c | 2 +- board/funkwerk/vovpn-gw/m88e6060.c | 2 +- board/funkwerk/vovpn-gw/vovpn-gw.c | 5 +- board/keymile/kmeter1/kmeter1.c | 2 +- board/motionpro/motionpro.c | 7 +- board/mpl/mip405/mip405.c | 8 +- board/netphone/netphone.c | 6 +- board/netta/netta.c | 6 +- board/netta2/netta2.c | 6 +- board/pm856/pm856.c | 2 +- board/prodrive/alpr/alpr.c | 12 +- board/prodrive/p3mx/mv_eth.c | 62 +++-- board/sbc8349/sbc8349.c | 2 +- board/sbc8548/sbc8548.c | 2 +- board/sbc8560/sbc8560.c | 2 +- board/stxgp3/stxgp3.c | 2 +- board/stxssa/stxssa.c | 2 +- board/stxxtc/stxxtc.c | 13 +- board/tqc/tqm834x/tqm834x.c | 2 +- board/tqc/tqm8xx/tqm8xx.c | 12 +- board/uc100/uc100.c | 2 +- board/zpc1900/zpc1900.c | 2 +- common/Makefile | 2 - common/cmd_mii.c | 28 +- cpu/arm920t/at91rm9200/ether.c | 29 ++- cpu/arm920t/at91rm9200/lxt972.c | 2 +- cpu/arm926ejs/davinci/lxt972.c | 2 +- cpu/ixp/npe/include/npe.h | 8 +- cpu/ixp/npe/miiphy.c | 25 +- cpu/ixp/npe/npe.c | 29 ++- cpu/mips/au1x00_eth.c | 29 ++- cpu/mpc8220/fec.c | 65 +++-- cpu/mpc8260/ether_fcc.c | 16 +- cpu/mpc85xx/ether_fcc.c | 16 +- cpu/mpc8xx/fec.c | 42 ++- cpu/ppc4xx/miiphy.c | 45 ++-- drivers/net/4xx_enet.c | 109 +++++--- drivers/net/bfin_mac.c | 39 ++- drivers/net/davinci_emac.c | 29 ++- drivers/net/dnet.c | 2 +- drivers/net/eepro100.c | 34 ++- drivers/net/fec_mxc.c | 55 +++-- drivers/net/fsl_mcdmafec.c | 23 ++- drivers/net/kirkwood_egiga.c | 36 ++- drivers/net/kirkwood_egiga.h | 1 + drivers/net/mcffec.c | 23 ++- drivers/net/mcfmii.c | 29 +- drivers/net/mpc512x_fec.c | 56 ++-- drivers/net/mpc5xxx_fec.c | 85 +++--- drivers/net/ns7520_eth.c | 36 +-- drivers/net/ns9750_eth.c | 2 +- drivers/net/phy/Makefile | 4 +- common/miiphyutil.c => drivers/net/phy/miidev.c | 352 ++++++++++------------- drivers/net/phy/miiphybb.c | 35 ++- drivers/net/phy/mv88e61xx.c | 123 ++++---- drivers/net/phy/mv88e61xx.h | 10 +- drivers/net/smc911x.c | 2 +- drivers/net/tsec.c | 46 ++-- drivers/net/uli526x.c | 2 +- drivers/qe/uec.c | 42 ++- drivers/qe/uec_phy.c | 10 +- include/linux/mii.h | 2 + include/miidev.h | 91 ++++++ include/miiphy.h | 36 --- include/ns7520_eth.h | 2 +- include/ns9750_eth.h | 2 +- net/eth.c | 6 +- net/net.c | 2 +- 94 files changed, 1198 insertions(+), 891 deletions(-) rename common/miiphyutil.c => drivers/net/phy/miidev.c (50%) create mode 100644 include/miidev.h
board/Marvell/rd6281a/rd6281a.c +10 -8
@@ -23,7 +23,7 @@*/ #include <common.h> -#include <miiphy.h> +#include <miidev.h> #include <netdev.h> #include <asm/arch/kirkwood.h> #include <asm/arch/mpp.h>
@@ -122,14 +122,16 @@ int dram_init(void)void mv_phy_88e1116_init (char *name) { +struct mii_device *dev;u16 reg;u16 devadr;if (miiphy_set_current_dev (name))return ; + dev =mii_get_current_dev ();/* command to read PHY dev address */ -if (miiphy_read (name,0xEE ,0xEE , (u16 *) &devadr)) { +if (miiphy_read (dev,0xEE ,0xEE , (u16 *) &devadr)) {printf ("Err..%s could not read PHY dev address\n" , __FUNCTION__);return ;
@@ -139,18 +141,18 @@ void mv_phy_88e1116_init(char *name)* Enable RGMII delay on Tx and Rx for CPU port * Ref: sec 4.7.2 of chip datasheet */ -miiphy_write (name, devadr,MV88E1116_PGADR_REG ,2 ); -miiphy_read (name, devadr,MV88E1116_MAC_CTRL_REG , ®); +miiphy_write (dev, devadr,MV88E1116_PGADR_REG ,2 ); +miiphy_read (dev, devadr,MV88E1116_MAC_CTRL_REG , ®); reg |= (MV88E1116_RGMII_RXTM_CTRL |MV88E1116_RGMII_TXTM_CTRL ); -miiphy_write (name, devadr,MV88E1116_MAC_CTRL_REG , reg); -miiphy_write (name, devadr,MV88E1116_PGADR_REG ,0 ); +miiphy_write (dev, devadr,MV88E1116_MAC_CTRL_REG , reg); +miiphy_write (dev, devadr,MV88E1116_PGADR_REG ,0 );/* reset the phy */ -if (miiphy_read (name, devadr,PHY_BMCR , ®) !=0 ) { +if (miiphy_read (dev, devadr,PHY_BMCR , ®) !=0 ) {printf ("Err..(%s) PHY status read failed\n" , __FUNCTION__);return ; } -if (miiphy_write (name, devadr,PHY_BMCR , reg |0x8000 ) !=0 ) { +if (miiphy_write (dev, devadr,PHY_BMCR , reg |0x8000 ) !=0 ) {printf ("Err..(%s) PHY reset failed\n" , __FUNCTION__);return ; }
board/Marvell/sheevaplug/sheevaplug.c +9 -7
@@ -23,7 +23,7 @@*/ #include <common.h> -#include <miiphy.h> +#include <miidev.h> #include <asm/arch/kirkwood.h> #include <asm/arch/mpp.h> #include "sheevaplug.h"
@@ -126,12 +126,14 @@ void reset_phy(void)u16 reg;u16 devadr;char *name ="egiga0" ; +struct mii_device *dev;if (miiphy_set_current_dev (name))return ; + dev =mii_get_current_dev ();/* command to read PHY dev address */ -if (miiphy_read (name,0xEE ,0xEE , (u16 *) &devadr)) { +if (miiphy_read (dev,0xEE ,0xEE , (u16 *) &devadr)) {printf ("Err..%s could not read PHY dev address\n" , __FUNCTION__);return ;
@@ -141,14 +143,14 @@ void reset_phy(void)* Enable RGMII delay on Tx and Rx for CPU port * Ref: sec 4.7.2 of chip datasheet */ -miiphy_write (name, devadr,MV88E1116_PGADR_REG ,2 ); -miiphy_read (name, devadr,MV88E1116_MAC_CTRL_REG , ®); +miiphy_write (dev, devadr,MV88E1116_PGADR_REG ,2 ); +miiphy_read (dev, devadr,MV88E1116_MAC_CTRL_REG , ®); reg |= (MV88E1116_RGMII_RXTM_CTRL |MV88E1116_RGMII_TXTM_CTRL ); -miiphy_write (name, devadr,MV88E1116_MAC_CTRL_REG , reg); -miiphy_write (name, devadr,MV88E1116_PGADR_REG ,0 ); +miiphy_write (dev, devadr,MV88E1116_MAC_CTRL_REG , reg); +miiphy_write (dev, devadr,MV88E1116_PGADR_REG ,0 );/* reset the phy */ -miiphy_reset (name, devadr); +miiphy_reset (dev, devadr);printf ("88E1116 Initialized on %s\n" , name); }
board/actux1/actux1.c +10 -5
@@ -36,7 +36,7 @@#include <malloc.h> #include <asm/arch/ixp425.h> #include <asm/io.h> -#include <miiphy.h> +#include <miidev.h> #include "actux1_hw.h"
@@ -136,12 +136,17 @@ void pci_init_board (void)void reset_phy (void ) {u16 id1, id2; +struct mii_device *dev; + + dev =mii_get_by_name ("NPE0" ); +if (!dev) +return ;/* initialize the PHY */ -miiphy_reset ("NPE0" ,CONFIG_PHY_ADDR ); +miiphy_reset (dev,CONFIG_PHY_ADDR ); -miiphy_read ("NPE0" ,CONFIG_PHY_ADDR ,PHY_PHYIDR1 , &id1); -miiphy_read ("NPE0" ,CONFIG_PHY_ADDR ,PHY_PHYIDR2 , &id2); +miiphy_read (dev,CONFIG_PHY_ADDR ,PHY_PHYIDR1 , &id1); +miiphy_read (dev,CONFIG_PHY_ADDR ,PHY_PHYIDR2 , &id2); id2 &=0xFFF0 ;/* mask out revision bits */
@@ -152,7 +157,7 @@ void reset_phy (void)* LED2 (unused) = LINK, * LED3(red) = Coll */ -miiphy_write ("NPE0" ,CONFIG_PHY_ADDR ,20 ,0xD432 ); +miiphy_write (dev,CONFIG_PHY_ADDR ,20 ,0xD432 ); }else if (id1 ==0x143 && id2 ==0xbc30 ) {/* BCM5241: default values are OK */ }else
board/actux2/actux2.c +2 -2
@@ -37,7 +37,7 @@#include <asm/arch/ixp425.h> #include <asm/io.h> -#include <miiphy.h> +#include <miidev.h> #include "actux2_hw.h"
@@ -132,5 +132,5 @@ u32 get_board_rev (void)void reset_phy (void ) {/* init IcPlus IP175C ethernet switch to native IP175C mode */ -miiphy_write ("NPE0" ,29 ,31 ,0x175C ); +miiphy_write (mii_get_by_name ("NPE0" ),29 ,31 ,0x175C ); }
board/actux3/actux3.c +5 -4
@@ -37,7 +37,7 @@#include <asm/arch/ixp425.h> #include <asm/io.h> -#include <miiphy.h> +#include <miidev.h> #include "actux3_hw.h"
@@ -147,18 +147,19 @@ int dram_init (void)void reset_phy (void ) {int i; +struct mii_device *dev =mii_get_by_name ("NPE0" );/* initialize the PHY */ -miiphy_reset ("NPE0" ,CONFIG_PHY_ADDR ); +miiphy_reset (dev,CONFIG_PHY_ADDR );/* all LED outputs = Link/Act */ -miiphy_write ("NPE0" ,CONFIG_PHY_ADDR ,0x16 ,0x0AAA ); +miiphy_write (dev,CONFIG_PHY_ADDR ,0x16 ,0x0AAA );/* * The Marvell 88E6060 switch comes up with all ports disabled. * set all ethernet switch ports to forwarding state */ for (i =1 ; i <=5 ; i++) -miiphy_write ("NPE0" ,CONFIG_PHY_ADDR +8 + i,0x04 ,0x03 ); +miiphy_write (dev,CONFIG_PHY_ADDR +8 + i,0x04 ,0x03 ); }
board/actux4/actux4.c +1 -1
@@ -36,7 +36,7 @@#include <malloc.h> #include <asm/arch/ixp425.h> -#include <miiphy.h> +#include <miidev.h> #include "actux4_hw.h"
board/amcc/taishan/lcd.c +33 -19
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board/atum8548/atum8548.c +1 -1
@@ -33,7 +33,7 @@#include <asm/io.h> #include <asm/mmu.h> #include <spd_sdram.h> -#include <miiphy.h> +#include <miidev.h> #include <libfdt.h> #include <fdt_support.h>
board/csb272/csb272.c +6 -4
@@ -24,7 +24,7 @@#include <common.h> #include <asm/processor.h> #include <i2c.h> -#include <miiphy.h> +#include <miidev.h> #include <ppc4xx_enet.h> void sdram_init (void );
@@ -172,15 +172,17 @@ phys_size_t initdram (int board_type)*/ int last_stage_init (void ) { +struct mii_device *dev =mii_get_by_name ("ppc_4xx_eth0" ); +/* initialize the PHY */ -miiphy_reset ("ppc_4xx_eth0" ,CONFIG_PHY_ADDR ); +miiphy_reset (dev,CONFIG_PHY_ADDR );/* AUTO neg */ -miiphy_write ("ppc_4xx_eth0" ,CONFIG_PHY_ADDR ,PHY_BMCR , +miiphy_write (dev,CONFIG_PHY_ADDR ,PHY_BMCR ,PHY_BMCR_AUTON |PHY_BMCR_RST_NEG );/* LEDs */ -miiphy_write ("ppc_4xx_eth0" ,CONFIG_PHY_ADDR ,PHY_FCSCR ,0x0d08 ); +miiphy_write (dev,CONFIG_PHY_ADDR ,PHY_FCSCR ,0x0d08 );return 0 ;/* success */
board/csb472/csb472.c +6 -4
@@ -24,7 +24,7 @@#include <common.h> #include <asm/processor.h> #include <i2c.h> -#include <miiphy.h> +#include <miidev.h> #include <ppc4xx_enet.h> void sdram_init (void );
@@ -140,15 +140,17 @@ phys_size_t initdram (int board_type)*/ int last_stage_init (void ) { +struct mii_device *dev =mii_get_by_name ("ppc_4xx_eth0" ); +/* initialize the PHY */ -miiphy_reset ("ppc_4xx_eth0" ,CONFIG_PHY_ADDR ); +miiphy_reset (dev,CONFIG_PHY_ADDR );/* AUTO neg */ -miiphy_write ("ppc_4xx_eth0" ,CONFIG_PHY_ADDR ,PHY_BMCR , +miiphy_write (dev,CONFIG_PHY_ADDR ,PHY_BMCR ,PHY_BMCR_AUTON |PHY_BMCR_RST_NEG );/* LEDs */ -miiphy_write ("ppc_4xx_eth0" ,CONFIG_PHY_ADDR ,PHY_FCSCR ,0x0d08 ); +miiphy_write (dev,CONFIG_PHY_ADDR ,PHY_FCSCR ,0x0d08 );return 0 ;/* success */ }
board/ep82xxm/ep82xxm.c +1 -1
@@ -30,7 +30,7 @@#ifdef CONFIG_PCI #include <pci.h> #endif -#include <miiphy.h> +#include <miidev.h> /* * I/O Port configuration table
board/esd/common/misc.c +4 -3
@@ -24,7 +24,7 @@#include <common.h> #ifdef CONFIG_LXT971_NO_SLEEP -#include <miiphy.h> +#include <miidev.h> #endif
@@ -32,9 +32,10 @@void lxt971_no_sleep (void ) {unsigned short reg; +struct mii_device *dev =mii_get_by_name ("ppc_4xx_eth0" ); -miiphy_read ("ppc_4xx_eth0" ,CONFIG_PHY_ADDR ,0x10 , ®); +miiphy_read (dev,CONFIG_PHY_ADDR ,0x10 , ®); reg &= ~0x0040 ;/* disable sleep mode */ -miiphy_write ("ppc_4xx_eth0" ,CONFIG_PHY_ADDR ,0x10 , reg); +miiphy_write (dev,CONFIG_PHY_ADDR ,0x10 , reg); }#endif /* CONFIG_LXT971_NO_SLEEP */
board/esd/pmc440/pmc440.c +13 -11
@@ -36,7 +36,7 @@#include <command.h> #include <i2c.h> #ifdef CONFIG_RESET_PHY_R -#include <miiphy.h> +#include <miidev.h> #endif #include <serial.h> #include "fpga.h"
@@ -757,6 +757,8 @@ void reset_phy(void) {char *s;unsigned short val_method, val_behavior; +struct mii_device *dev0 =mii_get_by_name ("ppc_4xx_eth0" ); +struct mii_device *dev1 =mii_get_by_name ("ppc_4xx_eth1" );/* special LED setup for NGCC/CANDES */ if ((s = getenv("bd_type")) &&
@@ -769,18 +771,18 @@ void reset_phy(void) val_behavior = 0x0cf0; } -if (miiphy_write ("ppc_4xx_eth0" ,CONFIG_PHY_ADDR ,0x1f ,0x0001 ) ==0 ) { -miiphy_write ("ppc_4xx_eth0" ,CONFIG_PHY_ADDR ,0x11 ,0x0010 ); -miiphy_write ("ppc_4xx_eth0" ,CONFIG_PHY_ADDR ,0x11 , val_behavior); -miiphy_write ("ppc_4xx_eth0" ,CONFIG_PHY_ADDR ,0x10 , val_method); -miiphy_write ("ppc_4xx_eth0" ,CONFIG_PHY_ADDR ,0x1f ,0x0000 ); +if (miiphy_write (dev0,CONFIG_PHY_ADDR ,0x1f ,0x0001 ) ==0 ) { +miiphy_write (dev0,CONFIG_PHY_ADDR ,0x11 ,0x0010 ); +miiphy_write (dev0,CONFIG_PHY_ADDR ,0x11 , val_behavior); +miiphy_write (dev0,CONFIG_PHY_ADDR ,0x10 , val_method); +miiphy_write (dev0,CONFIG_PHY_ADDR ,0x1f ,0x0000 ); } -if (miiphy_write ("ppc_4xx_eth1" ,CONFIG_PHY1_ADDR ,0x1f ,0x0001 ) ==0 ) { -miiphy_write ("ppc_4xx_eth1" ,CONFIG_PHY1_ADDR ,0x11 ,0x0010 ); -miiphy_write ("ppc_4xx_eth1" ,CONFIG_PHY1_ADDR ,0x11 , val_behavior); -miiphy_write ("ppc_4xx_eth1" ,CONFIG_PHY1_ADDR ,0x10 , val_method); -miiphy_write ("ppc_4xx_eth1" ,CONFIG_PHY1_ADDR ,0x1f ,0x0000 ); +if (miiphy_write (dev1,CONFIG_PHY1_ADDR ,0x1f ,0x0001 ) ==0 ) { +miiphy_write (dev1,CONFIG_PHY1_ADDR ,0x11 ,0x0010 ); +miiphy_write (dev1,CONFIG_PHY1_ADDR ,0x11 , val_behavior); +miiphy_write (dev1,CONFIG_PHY1_ADDR ,0x10 , val_method); +miiphy_write (dev1,CONFIG_PHY1_ADDR ,0x1f ,0x0000 ); } }#endif
board/evb64260/eth.c +29 -19
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board/freescale/mpc8260ads/mpc8260ads.c +1 -1
@@ -42,7 +42,7 @@#include <asm/m8260_pci.h> #include <i2c.h> #include <spd.h> -#include <miiphy.h> +#include <miidev.h> #ifdef CONFIG_PCI #include <pci.h> #endif
board/freescale/mpc8323erdb/mpc8323erdb.c +1 -1
@@ -13,7 +13,7 @@#include <ioports.h> #include <mpc83xx.h> #include <i2c.h> -#include <miiphy.h> +#include <miidev.h> #include <command.h> #include <libfdt.h> #if defined(CONFIG_PCI )
board/freescale/mpc832xemds/mpc832xemds.c +1 -1
@@ -16,7 +16,7 @@#include <ioports.h> #include <mpc83xx.h> #include <i2c.h> -#include <miiphy.h> +#include <miidev.h> #include <command.h> #if defined(CONFIG_PCI )#include <pci.h>
board/freescale/mpc8349emds/mpc8349emds.c +1 -1
@@ -28,7 +28,7 @@#include <asm/mpc8349_pci.h> #include <i2c.h> #include <spi.h> -#include <miiphy.h> +#include <miidev.h> #include <spd_sdram.h> #if defined(CONFIG_OF_LIBFDT )
board/freescale/mpc8349itx/mpc8349itx.c +1 -1
@@ -24,7 +24,7 @@#include <ioports.h> #include <mpc83xx.h> #include <i2c.h> -#include <miiphy.h> +#include <miidev.h> #include <vsc7385.h> #ifdef CONFIG_PCI #include <asm/mpc8349_pci.h>
board/freescale/mpc8360emds/mpc8360emds.c +1 -1
@@ -15,7 +15,7 @@#include <ioports.h> #include <mpc83xx.h> #include <i2c.h> -#include <miiphy.h> +#include <miidev.h> #if defined(CONFIG_PCI )#include <pci.h> #endif
board/freescale/mpc8360erdk/mpc8360erdk.c +1 -1
@@ -18,7 +18,7 @@#include <ioports.h> #include <mpc83xx.h> #include <i2c.h> -#include <miiphy.h> +#include <miidev.h> #include <asm/io.h> #include <asm/mmu.h> #include <pci.h>
board/freescale/mpc8536ds/mpc8536ds.c +1 -1
@@ -31,7 +31,7 @@#include <asm/fsl_ddr_sdram.h> #include <asm/io.h> #include <spd.h> -#include <miiphy.h> +#include <miidev.h> #include <libfdt.h> #include <spd_sdram.h> #include <fdt_support.h>
board/freescale/mpc8544ds/mpc8544ds.c +1 -1
@@ -29,7 +29,7 @@#include <asm/fsl_pci.h> #include <asm/fsl_ddr_sdram.h> #include <asm/io.h> -#include <miiphy.h> +#include <miidev.h> #include <libfdt.h> #include <fdt_support.h> #include <tsec.h>
board/freescale/mpc8548cds/mpc8548cds.c +12 -11
@@ -30,7 +30,7 @@#include <asm/fsl_pci.h> #include <asm/fsl_ddr_sdram.h> #include <spd_sdram.h> -#include <miiphy.h> +#include <miidev.h> #include <libfdt.h> #include <fdt_support.h>
@@ -427,24 +427,25 @@ int last_stage_init(void)/* This is needed to get the RGMII working for the 1.3+ * CDS cards */ if (get_board_version () ==0x13 ) { -miiphy_write (CONFIG_TSEC1_NAME , -TSEC1_PHY_ADDR ,29 ,18 ); +struct mii_device *dev; -miiphy_read (CONFIG_TSEC1_NAME , -TSEC1_PHY_ADDR ,30 , &temp); + dev =mii_get_by_name (CONFIG_TSEC1_NAME ); +if (!dev) +return ; + +miiphy_write (dev,TSEC1_PHY_ADDR ,29 ,18 ); + +miiphy_read (dev,TSEC1_PHY_ADDR ,30 , &temp); temp = (temp &0xf03f ); temp |=2 <<9 ;/* 36 ohm */ temp |=2 <<6 ;/* 39 ohm */ -miiphy_write (CONFIG_TSEC1_NAME , -TSEC1_PHY_ADDR ,30 , temp); +miiphy_write (dev,TSEC1_PHY_ADDR ,30 , temp); -miiphy_write (CONFIG_TSEC1_NAME , -TSEC1_PHY_ADDR ,29 ,3 ); +miiphy_write (dev,TSEC1_PHY_ADDR ,29 ,3 ); -miiphy_write (CONFIG_TSEC1_NAME , -TSEC1_PHY_ADDR ,30 ,0x8000 ); +miiphy_write (dev,TSEC1_PHY_ADDR ,30 ,0x8000 ); }return 0 ;
board/freescale/mpc8560ads/mpc8560ads.c +1 -1
@@ -33,7 +33,7 @@#include <asm/fsl_ddr_sdram.h> #include <ioports.h> #include <spd_sdram.h> -#include <miiphy.h> +#include <miidev.h> #include <libfdt.h> #include <fdt_support.h> #include <asm/fsl_lbc.h>
board/freescale/mpc8572ds/mpc8572ds.c +1 -1
@@ -30,7 +30,7 @@#include <asm/fsl_pci.h> #include <asm/fsl_ddr_sdram.h> #include <asm/io.h> -#include <miiphy.h> +#include <miidev.h> #include <libfdt.h> #include <fdt_support.h> #include <tsec.h>
board/freescale/p2020ds/p2020ds.c +1 -1
@@ -30,7 +30,7 @@#include <asm/fsl_pci.h> #include <asm/fsl_ddr_sdram.h> #include <asm/io.h> -#include <miiphy.h> +#include <miidev.h> #include <libfdt.h> #include <fdt_support.h> #include <tsec.h>
board/funkwerk/vovpn-gw/m88e6060.c +1 -1
@@ -27,7 +27,7 @@#include <mpc8260.h> #include <asm/m8260_pci.h> #include <net.h> -#include <miiphy.h> +#include <miidev.h> #include "m88e6060.h"
board/funkwerk/vovpn-gw/vovpn-gw.c +3 -2
@@ -24,7 +24,7 @@#include <ioports.h> #include <mpc8260.h> #include <asm/m8260_pci.h> -#include <miiphy.h> +#include <miidev.h> #include "m88e6060.h"
@@ -187,6 +187,7 @@ void reset_phy (void)#if defined(CONFIG_CMD_NET )int i;unsigned short val; +struct mii_device *dev =mii_get_by_name ("FCC1 ETHERNET" );#endif iop =ioport_addr ((immap_t *)CONFIG_SYS_IMMR ,0 );
@@ -198,7 +199,7 @@ void reset_phy (void) iop->pdat |=0x00080000 ;for (i=0 ; i<100 ; i++) {udelay (20000 ); -if (bb_miiphy_read ("FCC1 ETHERNET" ,CONFIG_SYS_PHY_ADDR ,2 ,&val ) ==0 ) { +if (bb_miiphy_read (dev,CONFIG_SYS_PHY_ADDR ,2 ,&val ) ==0 ) {break ; } }
board/keymile/kmeter1/kmeter1.c +1 -1
@@ -21,7 +21,7 @@#include <ioports.h> #include <mpc83xx.h> #include <i2c.h> -#include <miiphy.h> +#include <miidev.h> #include <asm/io.h> #include <asm/mmu.h> #include <asm/processor.h>
board/motionpro/motionpro.c +4 -3
@@ -28,7 +28,7 @@#include <common.h> #include <mpc5xxx.h> -#include <miiphy.h> +#include <miidev.h> #include <libfdt.h> #if defined(CONFIG_STATUS_LED )
@@ -89,9 +89,10 @@ int board_early_init_r(void)void reset_phy (void ) {unsigned short mode_control; +struct mii_device *dev =mii_get_by_name ("FEC ETHERNET" ); -miiphy_read ("FEC ETHERNET" ,CONFIG_PHY_ADDR ,0x15 , &mode_control); -miiphy_write ("FEC ETHERNET" ,CONFIG_PHY_ADDR ,0x15 , +miiphy_read (dev,CONFIG_PHY_ADDR ,0x15 , &mode_control); +miiphy_write (dev,CONFIG_PHY_ADDR ,0x15 , mode_control &0xfffe );return ; }
board/mpl/mip405/mip405.c +5 -3
@@ -66,7 +66,7 @@#include "mip405.h" #include <asm/processor.h> #include <4xx_i2c.h> -#include <miiphy.h> +#include <miidev.h> #include "../common/common_util.h" #include <stdio_dev.h> #include <i2c.h>
@@ -725,14 +725,16 @@ int last_stage_init (void)unsigned long stop;struct rtc_time newtm;char *s; +struct mii_device *dev =mii_get_by_name ("ppc_4xx_eth0" ); +mem_test_reloc ();/* write correct LED configuration */ -if (miiphy_write ("ppc_4xx_eth0" ,0x1 ,0x14 ,0x2402 ) !=0 ) { +if (miiphy_write (dev,0x1 ,0x14 ,0x2402 ) !=0 ) {printf ("Error writing to the PHY\n" ); }/* since LED/CFG2 is not connected on the -2, * write to correct capability information */ -if (miiphy_write ("ppc_4xx_eth0" ,0x1 ,0x4 ,0x01E1 ) !=0 ) { +if (miiphy_write (dev,0x1 ,0x4 ,0x01E1 ) !=0 ) {printf ("Error writing to the PHY\n" ); }print_mip405_rev ();
board/netphone/netphone.c +3 -3
@@ -28,7 +28,7 @@*/ #include <common.h> -#include <miiphy.h> +#include <miidev.h> #include <sed156x.h> #include <status_led.h>
@@ -38,9 +38,9 @@#include <watchdog.h> #endif -int fec8xx_miiphy_read (char *devname,unsigned char addr, +int fec8xx_miiphy_read (struct mii_device *dev,unsigned char addr,unsigned char reg,unsigned short *value); -int fec8xx_miiphy_write (char *devname,unsigned char addr, +int fec8xx_miiphy_write (struct mii_device *dev,unsigned char addr,unsigned char reg,unsigned short value);/****************************************************************/
board/netta/netta.c +3 -3
@@ -27,7 +27,7 @@*/ #include <common.h> -#include <miiphy.h> +#include <miidev.h> #include "mpc8xx.h"
@@ -35,9 +35,9 @@#include <watchdog.h> #endif -int fec8xx_miiphy_read (char *devname,unsigned char addr, +int fec8xx_miiphy_read (struct mii_device *dev,unsigned char addr,unsigned char reg,unsigned short *value); -int fec8xx_miiphy_write (char *devname,unsigned char addr, +int fec8xx_miiphy_write (struct mii_device *dev,unsigned char addr,unsigned char reg,unsigned short value);/****************************************************************/
board/netta2/netta2.c +3 -3
@@ -28,7 +28,7 @@*/ #include <common.h> -#include <miiphy.h> +#include <miidev.h> #include "mpc8xx.h"
@@ -36,9 +36,9 @@#include <watchdog.h> #endif -int fec8xx_miiphy_read (char *devname,unsigned char addr, +int fec8xx_miiphy_read (struct mii_device *dev,unsigned char addr,unsigned char reg,unsigned short *value); -int fec8xx_miiphy_write (char *devname,unsigned char addr, +int fec8xx_miiphy_write (struct mii_device *dev,unsigned char addr,unsigned char reg,unsigned short value);/****************************************************************/
board/pm856/pm856.c +1 -1
@@ -33,7 +33,7 @@#include <asm/fsl_ddr_sdram.h> #include <ioports.h> #include <spd_sdram.h> -#include <miiphy.h> +#include <miidev.h> #include <netdev.h> #if defined(CONFIG_DDR_ECC )
board/prodrive/alpr/alpr.c +7 -5
@@ -27,7 +27,7 @@#include <fdt_support.h> #include <spd_sdram.h> #include <ppc4xx_enet.h> -#include <miiphy.h> +#include <miidev.h> #include <asm/processor.h> DECLARE_GLOBAL_DATA_PTR ;
@@ -104,6 +104,8 @@ int board_early_init_f (void)int last_stage_init (void ) {unsigned short reg; +struct mii_device *dev_eth2 =mii_get_by_name ("ppc_4xx_eth2" ); +struct mii_device *dev_eth3 =mii_get_by_name ("ppc_4xx_eth3" );/* * Configure LED's of both Marvell 88E1111 PHY's
@@ -111,12 +113,12 @@ int last_stage_init(void)* This has to be done after the 4xx ethernet driver is loaded, * so "last_stage_init()" is the right place. */ -miiphy_read ("ppc_4xx_eth2" ,CONFIG_PHY2_ADDR ,0x18 , ®); +miiphy_read (dev_eth2,CONFIG_PHY2_ADDR ,0x18 , ®); reg |=0x0001 ; -miiphy_write ("ppc_4xx_eth2" ,CONFIG_PHY2_ADDR ,0x18 , reg); -miiphy_read ("ppc_4xx_eth3" ,CONFIG_PHY3_ADDR ,0x18 , ®); +miiphy_write (dev_eth2,CONFIG_PHY2_ADDR ,0x18 , reg); +miiphy_read (dev_eth3,CONFIG_PHY3_ADDR ,0x18 , ®); reg |=0x0001 ; -miiphy_write ("ppc_4xx_eth3" ,CONFIG_PHY3_ADDR ,0x18 , reg); +miiphy_write (dev_eth3,CONFIG_PHY3_ADDR ,0x18 , reg);return 0 ; }
board/prodrive/p3mx/mv_eth.c +34 -28
169 lines not on this page · raw message
board/sbc8349/sbc8349.c +1 -1
@@ -31,7 +31,7 @@#include <asm/mpc8349_pci.h> #include <i2c.h> #include <spd_sdram.h> -#include <miiphy.h> +#include <miidev.h> #if defined(CONFIG_OF_LIBFDT )#include <libfdt.h> #endif
board/sbc8548/sbc8548.c +1 -1
@@ -32,7 +32,7 @@#include <asm/fsl_pci.h> #include <asm/fsl_ddr_sdram.h> #include <spd_sdram.h> -#include <miiphy.h> +#include <miidev.h> #include <libfdt.h> #include <fdt_support.h>
board/sbc8560/sbc8560.c +1 -1
@@ -34,7 +34,7 @@#include <asm/fsl_ddr_sdram.h> #include <ioports.h> #include <spd_sdram.h> -#include <miiphy.h> +#include <miidev.h> #include <libfdt.h> #include <fdt_support.h>
board/stxgp3/stxgp3.c +1 -1
@@ -38,7 +38,7 @@#include <ioports.h> #include <asm/io.h> #include <spd_sdram.h> -#include <miiphy.h> +#include <miidev.h> long int fixed_sdram (void );
board/stxssa/stxssa.c +1 -1
@@ -38,7 +38,7 @@#include <ioports.h> #include <asm/io.h> #include <spd_sdram.h> -#include <miiphy.h> +#include <miidev.h> #include <netdev.h> long int fixed_sdram (void );
board/stxxtc/stxxtc.c +9 -4
@@ -30,7 +30,7 @@*/ #include <common.h> -#include <miiphy.h> +#include <miidev.h> #include "mpc8xx.h"
@@ -475,18 +475,23 @@ void reset_phys(void) {int phyno;unsigned short v; +struct mii_device *dev;udelay (10000 );/* reset the damn phys */ mii_init (); + dev =mii_get_by_name ("FEC ETHERNET" ); +if (!dev) +return ; +for (phyno =0 ; phyno <32 ; ++phyno) { -miiphy_read ("FEC ETHERNET" , phyno,PHY_PHYIDR1 , &v); +miiphy_read (dev, phyno,PHY_PHYIDR1 , &v);if (v ==0xFFFF )continue ; -miiphy_write ("FEC ETHERNET" , phyno,PHY_BMCR ,PHY_BMCR_POWD ); +miiphy_write (dev, phyno,PHY_BMCR ,PHY_BMCR_POWD );udelay (10000 ); -miiphy_write ("FEC ETHERNET" , phyno,PHY_BMCR ,PHY_BMCR_RESET |PHY_BMCR_AUTON ); +miiphy_write (dev, phyno,PHY_BMCR ,PHY_BMCR_RESET |PHY_BMCR_AUTON );udelay (10000 ); } }
board/tqc/tqm834x/tqm834x.c +1 -1
@@ -27,7 +27,7 @@#include <mpc83xx.h> #include <asm/mpc8349_pci.h> #include <i2c.h> -#include <miiphy.h> +#include <miidev.h> #include <asm-ppc/mmu.h> #include <pci.h>
board/tqc/tqm8xx/tqm8xx.c +9 -3
@@ -603,15 +603,21 @@ void lcd_show_board_info(void)/* TK885D specific initializaion */ /* ---------------------------------------------------------------------------- */ #ifdef CONFIG_TK885D -#include <miiphy.h> +#include <miidev.h> int last_stage_init (void ) {const unsigned char phy[] = {CONFIG_FEC1_PHY ,CONFIG_FEC2_PHY };unsigned short reg;int ret, i =100 ;char *s; +struct mii_device *dev;mii_init (); + + dev =mii_get_by_name ("FEC ETHERNET" ); +if (!dev) +return ; +/* Without this delay 0xff is read from the UART buffer later in * abortboot() and autoboot is aborted */ udelay (10000 );
@@ -626,13 +632,13 @@ int last_stage_init(void)return 0 ;for (i =0 ; i <2 ; i++) { - ret =miiphy_read ("FEC ETHERNET" , phy[i],PHY_BMCR , ®); + ret =miiphy_read (dev, phy[i],PHY_BMCR , ®);if (ret) {printf ("Cannot read BMCR on PHY %d\n" , phy[i]);return 0 ; }/* Auto-negotiation off, hard set full duplex, 100Mbps */ - ret =miiphy_write ("FEC ETHERNET" , phy[i], + ret =miiphy_write (dev, phy[i],PHY_BMCR , (reg |PHY_BMCR_100MB |PHY_BMCR_DPLX ) & ~PHY_BMCR_AUTON );if (ret) {
board/uc100/uc100.c +1 -1
@@ -28,7 +28,7 @@#include <common.h> #include <mpc8xx.h> #include <i2c.h> -#include <miiphy.h> +#include <miidev.h> int fec8xx_miiphy_write (char *devname,unsigned char addr,unsigned char reg,unsigned short value);
board/zpc1900/zpc1900.c +1 -1
@@ -27,7 +27,7 @@#include <common.h> #include <ioports.h> #include <mpc8260.h> -#include <miiphy.h> +#include <miidev.h> /* * I/O Port configuration table
common/Makefile +0 -2
@@ -109,8 +109,6 @@ COBJS-$(CONFIG_ID_EEPROM) += cmd_mac.o COBJS-$(CONFIG_CMD_MEMORY) += cmd_mem.o COBJS-$(CONFIG_CMD_MFSL) += cmd_mfsl.o COBJS-$(CONFIG_CMD_MG_DISK) += cmd_mgdisk.o -COBJS-$(CONFIG_MII) += miiphyutil.o -COBJS-$(CONFIG_CMD_MII) += miiphyutil.o COBJS-$(CONFIG_CMD_MII) += cmd_mii.o COBJS-$(CONFIG_CMD_MISC) += cmd_misc.o COBJS-$(CONFIG_CMD_MMC) += cmd_mmc.o
common/cmd_mii.c +14 -14
@@ -27,7 +27,7 @@#include <common.h> #include <command.h> -#include <miiphy.h> +#include <miidev.h> typedef struct _MII_reg_desc_t { ushort regno;
@@ -221,14 +221,14 @@ static int special_field( ushort regval) {if ((regno ==0 ) && (pdesc->lo ==6 )) { -ushort speed_bits = regval &PHY_BMCR_SPEED_MASK ; +ushort speed_bits = regval &BMCR_SPEED_MASK ;printf ("%2u,%2u = b%u%u speed selection = %s Mbps" ,6 ,13 , (regval >>6 ) &1 , (regval >>13 ) &1 , - speed_bits ==PHY_BMCR_1000_MBPS ?"1000" : - speed_bits ==PHY_BMCR_100_MBPS ?"100" : - speed_bits ==PHY_BMCR_10_MBPS ?"10" : + speed_bits ==BMCR_SPEED1000 ?"1000" : + speed_bits ==BMCR_SPEED100 ?"100" : + speed_bits ==BMCR_SPEED10 ?"10" :"???" );return 1 ; }
@@ -299,7 +299,7 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])unsigned char addr, reg;unsigned short data;int rcode =0 ; -char *devname; +struct mii_device *dev;if (argc <2 ) {cmd_usage (cmdtp);
@@ -338,7 +338,7 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) }/* use current device */ - devname =miiphy_get_current_dev (); + dev =mii_get_current_dev ();/* * check info/read/write.
@@ -359,17 +359,17 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) }for (j = start; j <= end; j++) { -if (miiphy_info (devname, j, &oui, &model, &rev) ==0 ) { +if (miiphy_info (dev, j, &oui, &model, &rev) ==0 ) {printf ("PHY 0x%02X: " "OUI = 0x%04X, " "Model = 0x%02X, " "Rev = 0x%02X, " "%3dbase%s, %s\n" , j, oui, model, rev, -miiphy_speed (devname, j), -miiphy_is_1000base_x (devname, j) +miiphy_speed (dev, j), +miiphy_is_1000base_x (dev, j) ?"X" :"T" , - (miiphy_duplex (devname, j) ==FULL ) + (miiphy_duplex (dev, j) ==FULL ) ?"FDX" :"HDX" ); } }
@@ -377,7 +377,7 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])for (addr = addrlo; addr <= addrhi; addr++) {for (reg = reglo; reg <= reghi; reg++) { data =0xffff ; -if (miiphy_read (devname, addr, reg, &data) !=0 ) { +if (miiphy_read (dev, addr, reg, &data) !=0 ) {printf ("Error reading from the PHY addr=%02x reg=%02x\n" , addr, reg);
@@ -395,7 +395,7 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) }else if (op[0 ] =='w' ) {for (addr = addrlo; addr <= addrhi; addr++) {for (reg = reglo; reg <= reghi; reg++) { -if (miiphy_write (devname, addr, reg, data) !=0 ) { +if (miiphy_write (dev, addr, reg, data) !=0 ) {printf ("Error writing to the PHY addr=%02x reg=%02x\n" , addr, reg); rcode =1 ;
@@ -413,7 +413,7 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) }for (addr = addrlo; addr <= addrhi; addr++) {for (reg = reglo; reg < reghi +1 ; reg++) { -if (miiphy_read (devname, addr, reg, ®s[reg]) !=0 ) { +if (miiphy_read (dev, addr, reg, ®s[reg]) !=0 ) { ok =0 ; printf( "Error reading from the PHY addr=%02x reg=%02x\n",
cpu/arm920t/at91rm9200/ether.c +20 -9
@@ -23,7 +23,8 @@#include <at91rm9200_net.h> #include <net.h> -#include <miiphy.h> +#include <miidev.h> +#include <malloc.h> #include <asm/mach-types.h> /* ----- Ethernet Buffer definitions ----- */
@@ -283,30 +284,40 @@ void eth_halt (void) };#if defined(CONFIG_MII ) || defined(CONFIG_CMD_MII ) -int at91rm9200_miiphy_read (char *devname,unsigned char addr, -unsigned char reg,unsigned short * value) +int at91rm9200_miiphy_read (struct mii_device *dev,int addr,int reg) { +unsigned short value; +at91rm9200_EmacEnableMDIO (p_mac); -at91rm9200_EmacReadPhy (p_mac, reg, value); +at91rm9200_EmacReadPhy (p_mac, reg, &value);at91rm9200_EmacDisableMDIO (p_mac); -return 0 ; + +return value; } -int at91rm9200_miiphy_write (char *devname,unsigned char addr, -unsigned char reg,unsigned short value) +int at91rm9200_miiphy_write (struct mii_device *dev,int addr,int reg,int val) { +unsigned short value = val; +at91rm9200_EmacEnableMDIO (p_mac);at91rm9200_EmacWritePhy (p_mac, reg, &value);at91rm9200_EmacDisableMDIO (p_mac);return 0 ; } -#endif int at91rm9200_miiphy_initialize (bd_t *bis) {#if defined(CONFIG_MII ) || defined(CONFIG_CMD_MII ) -miiphy_register ("at91rm9200phy" , at91rm9200_miiphy_read, at91rm9200_miiphy_write); +struct mii_device *mii_dev; + + mii_dev =calloc (1 ,sizeof (struct mii_device )); + + mii_dev->name ="at91rm9200phy" ; + mii_dev->read = at91rm9200_miiphy_read; + mii_dev->write = at91rm9200_miiphy_write; + +mii_register (mii_dev);#endif return 0 ; }
cpu/arm920t/at91rm9200/lxt972.c +1 -1
@@ -29,7 +29,7 @@#include <common.h> #include <at91rm9200_net.h> #include <net.h> -#include <miiphy.h> +#include <miidev.h> #include <lxt971a.h> #ifdef CONFIG_DRIVER_ETHER
cpu/arm926ejs/davinci/lxt972.c +1 -1
@@ -27,7 +27,7 @@#include <common.h> #include <net.h> -#include <miiphy.h> +#include <miidev.h> #include <lxt971a.h> #include <asm/arch/emac_defs.h>
cpu/ixp/npe/include/npe.h +4 -4
@@ -24,6 +24,8 @@#ifndef NPE_H #define NPE_H +#include <miidev.h> +/* * defines... */
@@ -82,9 +84,7 @@ struct npe {/* * prototypes... */ -extern int npe_miiphy_read (char *devname,unsigned char addr, -unsigned char reg,unsigned short *value); -extern int npe_miiphy_write (char *devname,unsigned char addr, -unsigned char reg,unsigned short value); +extern int npe_miiphy_read (struct mii_device *dev,int addr,int reg); +extern int npe_miiphy_write (struct mii_device *dev,int addr,int reg,int value);#endif /* ifndef NPE_H */
cpu/ixp/npe/miiphy.c +11 -14
@@ -45,7 +45,7 @@+-----------------------------------------------------------------------------*/ #include <common.h> -#include <miiphy.h> +#include <miidev.h> #include "IxOsal.h" #include "IxEthAcc.h" #include "IxEthAcc_p.h"
@@ -56,14 +56,14 @@/* Dump out to the screen PHY regs */ /***********************************************************/ -void miiphy_dump (char *devname,unsigned char addr) +void miiphy_dump (struct mii_device *dev,unsigned char addr) {unsigned long i;unsigned short data;for (i =0 ; i <0x1A ; i++) { -if (miiphy_read (devname, addr, i, &data)) { +if (miiphy_read (dev, addr, i, &data)) {printf ("read error for reg %lx\n" , i);return ; }
@@ -80,40 +80,37 @@ void miiphy_dump (char *devname, unsigned char addr)/***********************************************************/ /* (Re)start autonegotiation */ /***********************************************************/ -int phy_setup_aneg (char *devname,unsigned char addr) +int phy_setup_aneg (struct mii_device *dev,unsigned char addr) {unsigned short ctl, adv;/* Setup standard advertise */ -miiphy_read (devname, addr,PHY_ANAR , &adv); +miiphy_read (dev, addr,PHY_ANAR , &adv); adv |= (PHY_ANLPAR_ACK |PHY_ANLPAR_RF |PHY_ANLPAR_T4 |PHY_ANLPAR_TXFD |PHY_ANLPAR_TX |PHY_ANLPAR_10FD |PHY_ANLPAR_10 ); -miiphy_write (devname, addr,PHY_ANAR , adv); +miiphy_write (dev, addr,PHY_ANAR , adv);/* Start/Restart aneg */ -miiphy_read (devname, addr,PHY_BMCR , &ctl); +miiphy_read (dev, addr,PHY_BMCR , &ctl); ctl |= (PHY_BMCR_AUTON |PHY_BMCR_RST_NEG ); -miiphy_write (devname, addr,PHY_BMCR , ctl); +miiphy_write (dev, addr,PHY_BMCR , ctl);return 0 ; } -int npe_miiphy_read (char *devname,unsigned char addr, -unsigned char reg,unsigned short *value) +int npe_miiphy_read (struct mii_device *dev,int addr,int reg) {u16 val;ixEthAccMiiReadRtn (addr, reg, &val); - *value = val; -return 0 ; +return val; }/* phy_read */ -int npe_miiphy_write (char *devname,unsigned char addr, -unsigned char reg,unsigned short value) +int npe_miiphy_write (struct mii_device *dev,int addr,int reg,int value) {ixEthAccMiiWriteRtn (addr, reg, value);return 0 ;
cpu/ixp/npe/npe.c +23 -6
@@ -28,7 +28,7 @@#include <config.h> #include <common.h> #include <net.h> -#include <miiphy.h> +#include <miidev.h> #include <malloc.h> #include <asm/processor.h> #include <asm/arch-ixp/ixp425.h>
@@ -356,10 +356,11 @@ static int npe_init(struct eth_device *dev, bd_t * bis)u16 reg_short;int speed;int duplex; +struct mii_device *mii_dev =mii_get_by_name (dev->name);debug ("%s: 1\n" , __FUNCTION__); -miiphy_read (dev->name, p_npe->phy_no,PHY_BMSR , ®_short); +miiphy_read (mii_dev, p_npe->phy_no,PHY_BMSR , ®_short);/* * Wait if PHY is capable of autonegotiation and autonegotiation is not complete
@@ -378,7 +379,7 @@ static int npe_init(struct eth_device *dev, bd_t * bis)if ((i++ %1000 ) ==0 ) {putc ('.' ); -miiphy_read (dev->name, p_npe->phy_no,PHY_BMSR , ®_short); +miiphy_read (mii_dev, p_npe->phy_no,PHY_BMSR , ®_short); }udelay (1000 );/* 1 ms */ }
@@ -386,8 +387,8 @@ static int npe_init(struct eth_device *dev, bd_t * bis)udelay (500000 );/* another 500 ms (results in faster booting) */ } - speed =miiphy_speed (dev->name, p_npe->phy_no); - duplex =miiphy_duplex (dev->name, p_npe->phy_no); + speed =miiphy_speed (mii_dev, p_npe->phy_no); + duplex =miiphy_duplex (mii_dev, p_npe->phy_no);if (p_npe->print_speed) { p_npe->print_speed =0 ;
@@ -563,6 +564,9 @@ int npe_initialize(bd_t * bis) {static int virgin =0 ;struct eth_device *dev; +#if defined(CONFIG_MII ) || defined(CONFIG_CMD_MII ) +struct mii_device *mii_dev; +#endif int eth_num =0 ;struct npe *p_npe =NULL ;uchar enetaddr[6 ];
@@ -587,6 +591,16 @@ int npe_initialize(bd_t * bis) }memset (dev,0 ,sizeof (*dev)); +#if defined(CONFIG_MII ) || defined(CONFIG_CMD_MII ) +/* Allocate device structure */ + mii_dev = (struct mii_device *)malloc (sizeof (*mii_dev)); +if (mii_dev ==NULL ) { +printf ("%s: Cannot allocate mii_device %d\n" , __FUNCTION__, eth_num); +return -1 ; + } +memset (mii_dev,0 ,sizeof (*mii_dev)); +#endif +/* Allocate our private use data */ p_npe = (struct npe *)malloc (sizeof (struct npe ));if (p_npe ==NULL ) {
@@ -667,7 +681,10 @@ int npe_initialize(bd_t * bis)eth_register (dev);#if defined(CONFIG_MII ) || defined(CONFIG_CMD_MII ) -miiphy_register (dev->name, npe_miiphy_read, npe_miiphy_write); + mii_dev->name = dev->name; + mii_dev->read = npe_miiphy_read; + mii_dev->write = npe_miiphy_write; +mii_register (mii_dev);#endif }/* end for each supported device */
cpu/mips/au1x00_eth.c +20 -9
@@ -62,7 +62,7 @@#include <asm/au1x00.h> #if defined(CONFIG_CMD_MII ) -#include <miiphy.h> +#include <miidev.h> #endif /* Ethernet Transmit and Receive Buffers */
@@ -89,8 +89,7 @@ mac_fifo_t mac_fifo[NO_OF_FIFOS];#define MAX_WAIT 1000#if defined(CONFIG_CMD_MII ) -int au1x00_miiphy_read (char *devname,unsigned char addr, -unsigned char reg,unsigned short * value) +int au1x00_miiphy_read (struct mii_device *dev,int addr,int reg) {volatile u32 *mii_control_reg = (volatile u32 *)(ETH0_BASE +MAC_MII_CNTRL );volatile u32 *mii_data_reg = (volatile u32 *)(ETH0_BASE +MAC_MII_DATA );
@@ -118,12 +117,10 @@ int au1x00_miiphy_read(char *devname, unsigned char addr,return -1 ; } } - *value = *mii_data_reg; -return 0 ; +return *mii_data_reg; } -int au1x00_miiphy_write (char *devname,unsigned char addr, -unsigned char reg,unsigned short value) +int au1x00_miiphy_write (struct mii_device *dev,int addr,int reg,int value) {volatile u32 *mii_control_reg = (volatile u32 *)(ETH0_BASE +MAC_MII_CNTRL );volatile u32 *mii_data_reg = (volatile u32 *)(ETH0_BASE +MAC_MII_DATA );
@@ -284,6 +281,9 @@ static void au1x00_halt(struct eth_device* dev){int au1x00_enet_initialize (bd_t *bis){struct eth_device * dev; +#if defined(CONFIG_CMD_MII ) +struct mii_device * mii_dev; +#endif if ((dev = (struct eth_device *)malloc (sizeof *dev)) ==NULL ) {puts ("malloc failed\n" );
@@ -292,6 +292,15 @@ int au1x00_enet_initialize(bd_t *bis){memset (dev,0 ,sizeof *dev); +#if defined(CONFIG_CMD_MII ) +if ((mii_dev = (struct mii_device *)malloc (sizeof *mii_dev)) ==NULL ) { +puts ("malloc failed\n" ); +return -1 ; + } + +memset (mii_dev,0 ,sizeof *mii_dev); +#endif +sprintf (dev->name,"Au1X00 ethernet" ); dev->iobase =0 ; dev->priv =0 ;
@@ -303,8 +312,10 @@ int au1x00_enet_initialize(bd_t *bis){eth_register (dev);#if defined(CONFIG_CMD_MII ) -miiphy_register (dev->name, - au1x00_miiphy_read, au1x00_miiphy_write); + mii_dev->name = dev->name; + mii_dev->read = au1x00_miiphy_read; + mii_dev->write = au1x00_miiphy_write; +mii_register (mii_dev);#endif return 1 ;
cpu/mpc8220/fec.c +35 -30
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cpu/mpc8260/ether_fcc.c +13 -3
@@ -48,7 +48,7 @@#include <net.h> #if defined(CONFIG_MII ) || defined(CONFIG_CMD_MII ) -#include <miiphy.h> +#include <miidev.h> #endif DECLARE_GLOBAL_DATA_PTR ;
@@ -376,6 +376,10 @@ static void fec_halt(struct eth_device* dev)int fec_initialize (bd_t *bis) {struct eth_device * dev; +#if (defined(CONFIG_MII ) || defined(CONFIG_CMD_MII )) \ + && defined(CONFIG_BITBANGMII ) +struct mii_device * mii_dev; +#endif int i;for (i =0 ; i <sizeof (ether_fcc_info) /sizeof (ether_fcc_info[0 ]); i++)
@@ -395,8 +399,14 @@ int fec_initialize(bd_t *bis)#if (defined(CONFIG_MII ) || defined(CONFIG_CMD_MII )) \ && defined(CONFIG_BITBANGMII ) -miiphy_register (dev->name, - bb_miiphy_read, bb_miiphy_write); + mii_dev = (struct mii_device *)malloc (sizeof *mii_dev); +memset (mii_dev,0 ,sizeof *mii_dev); + + mii_dev->name = dev->name; + mii_dev->read = mii_bitbang_read; + mii_dev->write = mii_bitbang_write; + +mii_register (mii_dev);#endif }
cpu/mpc85xx/ether_fcc.c +13 -3
@@ -49,7 +49,7 @@#include <net.h> #if defined(CONFIG_MII ) || defined(CONFIG_CMD_MII ) -#include <miiphy.h> +#include <miidev.h> #endif #if defined(CONFIG_CPM2 )
@@ -441,6 +441,10 @@ static void fec_halt(struct eth_device* dev)int fec_initialize (bd_t *bis) {struct eth_device * dev; +#if (defined(CONFIG_MII ) || defined(CONFIG_CMD_MII )) \ + && defined(CONFIG_BITBANGMII ) +struct mii__device * mii_dev; +#endif int i;for (i =0 ; i <sizeof (ether_fcc_info) /sizeof (ether_fcc_info[0 ]); i++)
@@ -460,8 +464,14 @@ int fec_initialize(bd_t *bis)#if (defined(CONFIG_MII ) || defined(CONFIG_CMD_MII )) \ && defined(CONFIG_BITBANGMII ) -miiphy_register (dev->name, - bb_miiphy_read, bb_miiphy_write); + mii_dev = (struct mii_device *)malloc (sizeof *mii_dev); +memset (mii_dev,0 ,sizeof *mii_dev); + + mii_dev->name = dev->name; + mii_dev->read = mii_bitbang_read; + mii_dev->write = mii_bitbang_write; + +mii_register (mii_dev);#endif }
cpu/mpc8xx/fec.c +26 -16
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cpu/ppc4xx/miiphy.c +21 -24
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drivers/net/4xx_enet.c +65 -44
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drivers/net/bfin_mac.c +28 -11
@@ -12,7 +12,7 @@#include <netdev.h> #include <command.h> #include <malloc.h> -#include <miiphy.h> +#include <miidev.h> #include <linux/mii.h> #include <asm/blackfin.h>
@@ -70,18 +70,17 @@ static int bfin_miiphy_wait(void)return 0 ; } -static int bfin_miiphy_read (char *devname,uchar addr,uchar reg,ushort *val) +static int bfin_miiphy_read (struct mii_device *dev,int addr,int reg) {if (bfin_miiphy_wait ()) -return 1 ; +return -1 ;bfin_write_EMAC_STAADD (SET_PHYAD (addr) |SET_REGAD (reg) |STABUSY );if (bfin_miiphy_wait ()) -return 1 ; - *val =bfin_read_EMAC_STADAT (); -return 0 ; +return -1 ; +return bfin_read_EMAC_STADAT (); } -static int bfin_miiphy_write (char *devname,uchar addr,uchar reg,ushort val) +static int bfin_miiphy_write (struct mii_device *dev,int addr,int reg,int val) {if (bfin_miiphy_wait ())return 1 ;
@@ -93,11 +92,24 @@ static int bfin_miiphy_write(char *devname, uchar addr, uchar reg, ushort val)int bfin_EMAC_initialize (bd_t *bis) {struct eth_device *dev; +#if defined(CONFIG_MII ) || defined(CONFIG_CMD_MII ) +struct mii_device *mii_dev; +#endif + dev =malloc (sizeof (*dev));if (dev ==NULL )hang ();memset (dev,0 ,sizeof (*dev)); + +#if defined(CONFIG_MII ) || defined(CONFIG_CMD_MII ) + mii_dev =malloc (sizeof (*mii_dev)); +if (mii_dev ==NULL ) +hang (); + +memset (mii_dev,0 ,sizeof (*mii_dev)); +#endif +sprintf (dev->name,"Blackfin EMAC" ); dev->iobase =0 ;
@@ -110,7 +122,11 @@ int bfin_EMAC_initialize(bd_t *bis)eth_register (dev);#if defined(CONFIG_MII ) || defined(CONFIG_CMD_MII ) -miiphy_register (dev->name, bfin_miiphy_read, bfin_miiphy_write); + mii_dev->name = dev->name; + mii_dev->read = bfin_miiphy_read; + mii_dev->write = bfin_miiphy_write; + +mii_register (mii_dev);#endif return 0 ;
@@ -213,6 +229,7 @@ static int bfin_miiphy_init(struct eth_device *dev, int *opmode) {u16 phydat;size_t count; +struct mii_device *mii_dev =mii_get_by_name (name);/* Enable PHY output */ *pVR_CTL |=CLKBUFOE ;
@@ -260,11 +277,11 @@ static int bfin_miiphy_init(struct eth_device *dev, int *opmode)bfin_write_EMAC_SYSCTL (RXDWA |RXCKS |SET_MDCDIV (MDC_FREQ_TO_DIV (CONFIG_PHY_CLOCK_FREQ )));/* turn on auto-negotiation and wait for link to come up */ -bfin_miiphy_write (dev->name,CONFIG_PHY_ADDR ,MII_BMCR ,BMCR_ANENABLE ); +bfin_miiphy_write (mii_dev,CONFIG_PHY_ADDR ,MII_BMCR ,BMCR_ANENABLE ); count =0 ;while (1 ) { ++count; -if (bfin_miiphy_read (dev->name,CONFIG_PHY_ADDR ,MII_BMSR , &phydat)) +if (bfin_miiphy_read (mii_dev,CONFIG_PHY_ADDR ,MII_BMSR , &phydat))return -1 ;if (phydat &BMSR_LSTATUS )break ;
@@ -276,7 +293,7 @@ static int bfin_miiphy_init(struct eth_device *dev, int *opmode) }/* see what kind of link we have */ -if (bfin_miiphy_read (dev->name,CONFIG_PHY_ADDR ,MII_LPA , &phydat)) +if (bfin_miiphy_read (mii_dev,CONFIG_PHY_ADDR ,MII_LPA , &phydat))return -1 ;if (phydat &LPA_DUPLEX ) *opmode =FDMODE ;
drivers/net/davinci_emac.c +23 -6
@@ -39,7 +39,7 @@#include <common.h> #include <command.h> #include <net.h> -#include <miiphy.h> +#include <miidev.h> #include <malloc.h> #include <asm/arch/emac_defs.h>
@@ -236,16 +236,20 @@ static int gen_auto_negotiate(int phy_addr)#if defined(CONFIG_MII ) || defined(CONFIG_CMD_MII ) -static int davinci_mii_phy_read (char *devname,unsigned char addr,unsigned char reg,unsigned short *value) +static int davinci_mii_phy_read (struct mii_device *dev,int addr,int reg) { -return (davinci_eth_phy_read (addr, reg, value) ?0 :1 ); +unsigned short value; + +davinci_eth_phy_read (addr, reg, &value); + +return value; } -static int davinci_mii_phy_write (char *devname,unsigned char addr,unsigned char reg,unsigned short value) +static int davinci_mii_phy_write (struct mii_device *dev,int addr,int reg, +int value) {return (davinci_eth_phy_write (addr, reg, value) ?0 :1 ); } -#endif
@@ -547,6 +551,7 @@ int davinci_emac_initialize(void)u_int16_t tmp;int i;struct eth_device *dev; +struct mii_device *mii_dev; dev =malloc (sizeof *dev);
@@ -555,6 +560,13 @@ int davinci_emac_initialize(void)memset (dev,0 ,sizeof *dev); + mii_dev =malloc (sizeof *mii_dev); + +if (mii_dev ==NULL ) +return -1 ; + +memset (mii_dev,0 ,sizeof *mii_dev); + dev->iobase =0 ; dev->init = davinci_eth_open; dev->halt = davinci_eth_close;
@@ -620,6 +632,11 @@ int davinci_emac_initialize(void)printf ("Ethernet PHY: %s\n" , phy.name); -miiphy_register (phy.name, davinci_mii_phy_read, davinci_mii_phy_write); + mii_dev->name = phy.name; + mii_dev->read = davinci_mii_phy_read; + mii_dev->write = davinci_mii_phy_write; + +mii_register (mii_dev); +return (1 ); }
drivers/net/dnet.c +1 -1
@@ -18,7 +18,7 @@#include <malloc.h> #include <linux/mii.h> -#include <miiphy.h> +#include <miidev.h> #include <asm/io.h> #include "dnet.h"
drivers/net/eepro100.c +21 -13
@@ -27,7 +27,7 @@#include <netdev.h> #include <asm/io.h> #include <pci.h> -#include <miiphy.h> +#include <miidev.h> #undef DEBUG
@@ -350,34 +350,34 @@ static struct eth_device* verify_phyaddr (char *devname, unsigned char addr)return dev; } -static int eepro100_miiphy_read (char *devname,unsigned char addr, -unsigned char reg,unsigned short *value) +static int eepro100_miiphy_read (struct mii_device *mii_dev,int addr,int reg) {struct eth_device *dev; +unsigned short value; - dev =verify_phyaddr (devname, addr); + dev =verify_phyaddr (mii_dev->name, addr);if (dev ==NULL )return -1 ; -if (get_phyreg (dev, addr, reg, value) !=0 ) { -printf ("%s: mii read timeout!\n" , devname); +if (get_phyreg (dev, addr, reg, &value) !=0 ) { +printf ("%s: mii read timeout!\n" , dev->name);return -1 ; } -return 0 ; +return value; } -static int eepro100_miiphy_write (char *devname,unsigned char addr, -unsigned char reg,unsigned short value) +static int eepro100_miiphy_write (struct mii_device *mii_dev,int addr,int reg, +int value) {struct eth_device *dev; - dev =verify_phyaddr (devname, addr); + dev =verify_phyaddr (mii_dev->name, addr);if (dev ==NULL )return -1 ;if (set_phyreg (dev, addr, reg, value) !=0 ) { -printf ("%s: mii write timeout!\n" , devname); +printf ("%s: mii write timeout!\n" , dev->name);return -1 ; }
@@ -413,6 +413,9 @@ int eepro100_initialize (bd_t * bis)pci_dev_t devno;int card_number =0 ;struct eth_device *dev; +#if defined (CONFIG_MII ) || defined(CONFIG_CMD_MII ) +struct mii_device *mii_dev; +#endif u32 iobase, status;int idx =0 ;
@@ -461,9 +464,14 @@ int eepro100_initialize (bd_t * bis)eth_register (dev);#if defined (CONFIG_MII ) || defined(CONFIG_CMD_MII ) + mii_dev = (struct mii_device *)malloc (sizeof *mii_dev); + + mii_dev->name = dev->name; + mii_dev->read = eepro100_miiphy_read; + mii_dev->write = eepro100_miiphy_write; +/* register mii command access routines */ -miiphy_register (dev->name, - eepro100_miiphy_read, eepro100_miiphy_write); +mii_register (mii_dev);#endif card_number++;
drivers/net/fec_mxc.c +33 -22
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drivers/net/fsl_mcdmafec.c +19 -4
@@ -29,7 +29,7 @@#include <command.h> #include <config.h> #include <net.h> -#include <miiphy.h> +#include <miidev.h> #undef ET_DEBUG#undef MII_DEBUG
@@ -197,10 +197,11 @@ static void set_fec_duplex_speed(volatile fecdma_t * fecp, bd_t * bd,static int fec_send (struct eth_device *dev,volatile void *packet,int length) {struct fec_info_dma *info = dev->priv; +struct mii_device *mii_dev =mii_get_by_name (dev->name);cbd_t *pTbd, *pUsedTbd;u16 phyStatus; -miiphy_read (dev->name, info->phy_addr,PHY_BMSR , &phyStatus); +miiphy_read (mii_dev, info->phy_addr,PHY_BMSR , &phyStatus);/* process all the consumed TBDs */ while (info->cleanTbdNum <CONFIG_SYS_TX_ETH_BUFFER ) {
@@ -516,6 +517,9 @@ static void fec_halt(struct eth_device *dev)int mcdmafec_initialize (bd_t * bis) {struct eth_device *dev; +#if defined(CONFIG_MII ) || defined(CONFIG_CMD_MII ) +struct mii_device *mii_dev; +#endif int i;#ifdef CONFIG_SYS_DMA_USE_INTSRAM u32 tmp =CONFIG_SYS_INTSRAM +0x2000 ;
@@ -572,8 +576,19 @@ int mcdmafec_initialize(bd_t * bis)eth_register (dev);#if defined(CONFIG_MII ) || defined(CONFIG_CMD_MII ) -miiphy_register (dev->name, - mcffec_miiphy_read, mcffec_miiphy_write); + mii_dev = + (struct mii_device *)memalign (CONFIG_SYS_CACHELINE_SIZE , +sizeof *mii_dev); +if (mii_dev ==NULL ) +hang (); + +memset (mii_dev,0 ,sizeof (*mii_dev)); + + mii_dev->name = dev->name; + mii_dev->read = mcffec_miiphy_read; + mii_dev->write = mcffec_miiphy_write; + +mii_register (mii_dev);#endif if (i >0 )
drivers/net/kirkwood_egiga.c +25 -11
@@ -31,7 +31,7 @@#include <common.h> #include <net.h> #include <malloc.h> -#include <miiphy.h> +#include <miidev.h> #include <asm/errno.h> #include <asm/types.h> #include <asm/byteorder.h>
@@ -45,19 +45,20 @@* * Returns 16bit phy register value, or 0xffff on error */ -static int smi_reg_read (char *devname,u8 phy_adr,u8 reg_ofs,u16 * data) +static int smi_reg_read (struct mii_device *mii_dev,int phy_adr,int reg_ofs) { -struct eth_device *dev =eth_get_dev_by_name (devname); +struct eth_device *dev =eth_get_dev_by_name (mii_dev->name);struct kwgbe_device *dkwgbe =to_dkwgbe (dev);struct kwgbe_registers *regs = dkwgbe->regs;u32 smi_reg;u32 timeout; +int data;/* Phyadr read request */ if (phy_adr ==KIRKWOOD_PHY_ADR_REQUEST && reg_ofs ==KIRKWOOD_PHY_ADR_REQUEST ) {/* */ - *data = (u16) (KWGBEREG_RD (regs->phyadr) &PHYADR_MASK ); + data = (KWGBEREG_RD (regs->phyadr) &PHYADR_MASK );return 0 ; }/* check parameters */
@@ -107,12 +108,12 @@ static int smi_reg_read(char *devname, u8 phy_adr, u8 reg_ofs, u16 * data)/* Wait for the data to update in the SMI register */ for (timeout =0 ; timeout <KWGBE_PHY_SMI_TIMEOUT ; timeout++) ; - *data = (u16) (KWGBEREG_RD (regs->smi) &KWGBE_PHY_SMI_DATA_MASK ); + data = (KWGBEREG_RD (regs->smi) &KWGBE_PHY_SMI_DATA_MASK );debug ("%s:(adr %d, off %d) value= %04x\n" , __FUNCTION__, phy_adr, reg_ofs, *data); -return 0 ; +return data; }/*
@@ -121,9 +122,10 @@ static int smi_reg_read(char *devname, u8 phy_adr, u8 reg_ofs, u16 * data)* Returns 0 if write succeed, -EINVAL on bad parameters * -ETIME on timeout */ -static int smi_reg_write (char *devname,u8 phy_adr,u8 reg_ofs,u16 data) +static int smi_reg_write (struct mii_device *mii_dev,int phy_adr,int reg_ofs, +int data) { -struct eth_device *dev =eth_get_dev_by_name (devname); +struct eth_device *dev =eth_get_dev_by_name (mii_dev->name);struct kwgbe_device *dkwgbe =to_dkwgbe (dev);struct kwgbe_registers *regs = dkwgbe->regs;u32 smi_reg;
@@ -401,6 +403,10 @@ static int kwgbe_init(struct eth_device *dev)struct kwgbe_device *dkwgbe =to_dkwgbe (dev);struct kwgbe_registers *regs = dkwgbe->regs;int i; +#if (defined (CONFIG_MII ) || defined (CONFIG_CMD_MII )) \ + && defined (CONFIG_SYS_FAULT_ECHO_LINK_DOWN ) +struct mii_device *mii_dev = &dkwgbe->mii_dev; +#endif /* setup RX rings */ kwgbe_init_rx_desc_ring (dkwgbe);
@@ -452,7 +458,7 @@ static int kwgbe_init(struct eth_device *dev)for (i =0 ; i <5 ; i++) {u16 phyadr; -miiphy_read (dev->name,KIRKWOOD_PHY_ADR_REQUEST , +miiphy_read (mii_dev,KIRKWOOD_PHY_ADR_REQUEST ,KIRKWOOD_PHY_ADR_REQUEST , &phyadr);/* Return if we get link up */ if (miiphy_link (dev->name, phyadr))
@@ -612,6 +618,9 @@ int kirkwood_egiga_initialize(bd_t * bis) {struct kwgbe_device *dkwgbe;struct eth_device *dev; +#if defined(CONFIG_MII ) || defined(CONFIG_CMD_MII ) +struct mii_device *mii_dev; +#endif int devnum;char *s;u8 used_ports[MAX_KWGBE_DEVS ] =CONFIG_KIRKWOOD_EGIGA_PORTS ;
@@ -694,9 +703,14 @@ int kirkwood_egiga_initialize(bd_t * bis)eth_register (dev);#if defined(CONFIG_MII ) || defined(CONFIG_CMD_MII ) -miiphy_register (dev->name, smi_reg_read, smi_reg_write); + mii_dev = &dkwgbe->mii_dev; + mii_dev->name = dev->name; + mii_dev->read = smi_reg_read; + mii_dev->write = smi_reg_write; + +mii_register (mii_dev);/* Set phy address of the port */ -miiphy_write (dev->name,KIRKWOOD_PHY_ADR_REQUEST , +miiphy_write (mii_dev,KIRKWOOD_PHY_ADR_REQUEST ,KIRKWOOD_PHY_ADR_REQUEST ,PHY_BASE_ADR + devnum);#endif }
drivers/net/kirkwood_egiga.h +1 -0
@@ -494,6 +494,7 @@ struct kwgbe_txdesc {/* port device data struct */ struct kwgbe_device {struct eth_device dev; +struct mii_device mii_dev;struct kwgbe_registers *regs;struct kwgbe_txdesc *p_txdesc;struct kwgbe_rxdesc *p_rxdesc;
drivers/net/mcffec.c +19 -4
@@ -30,7 +30,7 @@#include <command.h> #include <net.h> #include <netdev.h> -#include <miiphy.h> +#include <miidev.h> #include <asm/fec.h> #include <asm/immap.h>
@@ -138,10 +138,11 @@ int fec_send(struct eth_device *dev, volatile void *packet, int length) {struct fec_info_s *info = dev->priv;volatile fec_t *fecp = (fec_t *) (info->iobase); +struct mii_device * mii_dev =mii_get_by_name (dev->name);int j, rc;u16 phyStatus; -miiphy_read (dev->name, info->phy_addr,PHY_BMSR , &phyStatus); +miiphy_read (mii_dev, info->phy_addr,PHY_BMSR , &phyStatus);/* section 16.9.23.3 * Wait for ready
@@ -559,6 +560,9 @@ int mcffec_initialize(bd_t * bis)#ifdef CONFIG_SYS_FEC_BUF_USE_SRAM u32 tmp =CONFIG_SYS_INIT_RAM_ADDR +0x1000 ;#endif +#if defined(CONFIG_MII ) || defined(CONFIG_CMD_MII ) +struct mii_device *mii_dev; +#endif for (i =0 ; i <sizeof (fec_info) /sizeof (fec_info[0 ]); i++) {
@@ -611,8 +615,19 @@ int mcffec_initialize(bd_t * bis)eth_register (dev);#if defined(CONFIG_MII ) || defined(CONFIG_CMD_MII ) -miiphy_register (dev->name, - mcffec_miiphy_read, mcffec_miiphy_write); + mii_dev = + (struct mii_device *)memalign (CONFIG_SYS_CACHELINE_SIZE , +sizeof *mii_dev); +if (mii_dev ==NULL ) +hang (); + +memset (mii_dev,0 ,sizeof (*mii_dev)); + + mii_dev->name = dev->name; + mii_dev->read = mcffec_miiphy_read; + mii_dev->write = mcffec_miiphy_write; + +mii_register (mii_dev);#endif if (i >0 ) fec_info[i -1 ].next = &fec_info[i];
drivers/net/mcfmii.c +13 -16
@@ -42,7 +42,7 @@ DECLARE_GLOBAL_DATA_PTR;/*extern int fecpin_setclear(struct eth_device *dev, int setclear);*/ #if defined(CONFIG_SYS_DISCOVER_PHY ) || defined(CONFIG_CMD_MII ) -#include <miiphy.h> +#include <miidev.h> /* Make MII read/write commands for the FEC. */ #define mk_mii_read (ADDR ,REG ) (0x60020000 | ((ADDR << 23) | \
@@ -225,12 +225,14 @@ void __mii_init(void)FEC_INFO_T *info;volatile FEC_T *fecp;struct eth_device *dev; +struct mii_device *mii_dev;int miispd =0 , i =0 ;u16 status =0 ;u16 linkgood =0 ;/* retrieve from register structure */ dev =eth_get_dev (); + mii_dev =mii_get_by_name (dev->name); info = dev->priv; fecp = (FEC_T *) info->miibase;
@@ -255,7 +257,7 @@ void __mii_init(void) status =0 ; i++;/* Read PHY control register */ -miiphy_read (dev->name, info->phy_addr,PHY_BMCR , &status); +miiphy_read (mii_dev, info->phy_addr,PHY_BMCR , &status);/* If phy set to autonegotiate, wait for autonegotiation done, * if phy is not autonegotiating, just wait for link up.
@@ -266,7 +268,7 @@ void __mii_init(void) linkgood =PHY_BMSR_LS ; }/* Read PHY status register */ -miiphy_read (dev->name, info->phy_addr,PHY_BMSR , &status); +miiphy_read (mii_dev, info->phy_addr,PHY_BMSR , &status);if ((status & linkgood) == linkgood)break ;
@@ -277,42 +279,37 @@ void __mii_init(void) }/* adapt to the duplex and speed settings of the phy */ - info->dup_spd =miiphy_duplex (dev->name, info->phy_addr) <<16 ; - info->dup_spd |=miiphy_speed (dev->name, info->phy_addr); + info->dup_spd =miiphy_duplex (mii_dev, info->phy_addr) <<16 ; + info->dup_spd |=miiphy_speed (mii_dev, info->phy_addr); }/* * Read and write a MII PHY register, routines used by MII Utilities * -* FIXME: These routines are expected to return 0 on success, but mii_send -* does _not_ return an error code. Maybe 0xFFFF means error, i.e. -* no PHY connected... -* For now always return 0. * FIXME: These routines only work after calling eth_init() at least once! * Otherwise they hang in mii_send() !!! Sorry! */ -int mcffec_miiphy_read (char *devname,unsigned char addr,unsigned char reg, -unsigned short *value) +int mcffec_miiphy_read (struct mii_device *dev,int addr,int reg) {short rdreg;/* register working value */ +int value;#ifdef MII_DEBUG printf ("miiphy_read(0x%x) @ 0x%x = " , reg, addr);#endif rdreg =mii_send (mk_mii_read (addr, reg)); - *value = rdreg;
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drivers/net/mpc512x_fec.c +32 -24
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drivers/net/mpc5xxx_fec.c +48 -37
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drivers/net/phy/miidev.c renamed from common/miiphyutil.c +150 -202
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drivers/net/phy/mv88e61xx.c +62 -61
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drivers/net/tsec.c +29 -17
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drivers/qe/uec.c +30 -12
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include/miidev.h new file +91 -0
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Signature · 1 line
1.6.3.1
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RFC PATCH 2/3 net: add phylib implementation
the current implementation will allow you to probe, instance and mananage one phy_device per mii_device
this implementation is based on the linux implementation done by Andy Fleming
--- drivers/net/phy/Makefile | 1 + drivers/net/phy/phylib.c | 535 ++++++++++++++++++++++++++++++++++++++++++++++ include/linux/ethtool.h | 172 +++++++++++++++ include/linux/mii.h | 392 ++++++++++++++++++++-------------- include/miidev.h | 1 + include/phydev.h | 119 ++++++++++ 6 files changed, 1060 insertions(+), 160 deletions(-) create mode 100644 drivers/net/phy/phylib.c create mode 100644 include/linux/ethtool.h rewrite include/linux/mii.h (67%) create mode 100644 include/phydev.h
drivers/net/phy/Makefile +1 -0
@@ -29,6 +29,7 @@ COBJS-$(CONFIG_BITBANGMII) += miiphybb.o COBJS-$(CONFIG_MV88E61XX_SWITCH) += mv88e61xx.o COBJS-$(CONFIG_MII) += miidev.o COBJS-$(CONFIG_CMD_MII) += miidev.o +COBJS-$(CONFIG_NET_PHYLIB) += phylib.o COBJS := $(sort $(COBJS-y)) SRCS := $(COBJS:.o=.c)
drivers/net/phy/phylib.c new file +535 -0
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include/linux/ethtool.h new file +172 -0
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include/linux/mii.h +232 -160
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include/miidev.h +1 -0
@@ -37,6 +37,7 @@ struct mii_device {int (*read) (struct mii_device *dev,int addr,int reg);int (*write) (struct mii_device *dev,int addr,int reg,int value); +struct phy_device *phydev;void *priv;struct list_head list; };
include/phydev.h new file +119 -0
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Signature · 1 line
1.6.3.1
RFC PATCH 3/3 phylib: add generic phy driver
this driver must be the last one registered to be the last one probed
--- drivers/net/phy/Makefile | 1 + drivers/net/phy/generic.c | 35 +++++++++++++++++++++++++++++++++++ drivers/net/phy/phylib.c | 8 ++++++++ include/phydev.h | 5 +++++ 4 files changed, 49 insertions(+), 0 deletions(-) create mode 100644 drivers/net/phy/generic.c
drivers/net/phy/Makefile +1 -0
@@ -25,6 +25,7 @@ include $(TOPDIR)/config.mk LIB := $(obj)libphy.a +COBJS-$(CONFIG_PHY_GENERIC) += generic.o COBJS-$(CONFIG_BITBANGMII) += miiphybb.o COBJS-$(CONFIG_MV88E61XX_SWITCH) += mv88e61xx.o COBJS-$(CONFIG_MII) += miidev.o
drivers/net/phy/generic.c new file +35 -0
@@ -0,0 +1,35 @@ +/* +* Copyright (c) 2009 Jean-Christophe PLAGNIOL-VILLARD <[email protected]> +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License as +* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, +* MA 02111-1307 USA +* +*/ + +#include <common.h> +#include <phydev.h> + +void generic_phy_register (void ) +{ +struct phy_driver generic_phy = { + .name ="Generic PHY" , + .phy_id =0xffffffff , + .phy_id_mask =0xffffffff , + .features =0 , + .config_init = generic_phy_init, + }; + +phy_driver_register (&generic_phy); +}
drivers/net/phy/phylib.c +8 -0
@@ -52,6 +52,14 @@ int phy_init(void)/* Initialize the list */ INIT_LIST_HEAD (&phy_drvs.list); +/* +* this generic phy driver must be the last one registered to be +* the last one probed +*/ +#ifdef CONFIG_PHY_GENERIC +generic_phy_register (); +#endif +return 0 ; }
include/phydev.h +5 -0
@@ -116,4 +116,9 @@ int genphy_restart_aneg(struct phy_device *phydev);int genphy_setup_forced (struct phy_device *phydev);int genphy_update_link (struct phy_device *phydev); +/* +* Phy register functions +*/ +void generic_phy_register (void ); +#endif /* __PHYDEV_H__ */
Signature · 1 line
1.6.3.1
RFC PATCH 1/3 net: rework the mii support
In reply to Jean-Christophe PLAGNIOL-VILLARDQuoted 2 lines · On Wednesday 26 August 2009 16:13:01 Jean-Christophe PLAGNIOL-VILLARD wrote:
this rework is done in order to add a phylib and reduce and simplify the implementation of multi
net_devicesupport for the same driver
i think you mean multi phy ...
Quoted 1 line
precedently we pass the device name to the miiphy_read/write & co
while the first word could be used, i think you mean "presently"
Quoted 2 lines
now we pass the
mii_deviceinstance of the mii bus all network driver are switch to this way
if you're going to avoid punctuation in your commits, then separate sentences really need separate paragraphs
and the second sentence probably should be "drivers are converted to this method"
Quoted 3 lines
we currently keep the old miiphy api by wrapping it to the new
mii_deviceapi until we have the phylib implementation and all the network driver using it
if the old method and header is deprecated, then you could add a #warning to the old header telling people to change
the changes to the Blackfin MAC driver looks sane to me, thanks
-mike
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RFC PATCH 2/3 net: add phylib implementation
In reply to Jean-Christophe PLAGNIOL-VILLARDQuoted 2 lines · On Wednesday 26 August 2009 16:13:02 Jean-Christophe PLAGNIOL-VILLARD wrote:
the current implementation will allow you to probe, instance and mananage one
phy_devicepermii_device
"instance" -> "instantiate"
"mananage" -> "manage"
drivers/net/phy/phylib.c line 2
Quoted 5 lines
drivers/net/phy/phylib.c new file +2
-0@@ -0,0 +1,535 @@ +/* +* drivers/net/phy/phy_device.c
needs updating
drivers/net/phy/phylib.c line 29
Quoted 1 line
drivers/net/phy/phylib.c new file +1
-0+static int genphy_config_init (struct phy_device *phydev);
why does _init() have a static def in this C file but the other genhy_config_* funcs have a non-static def in the H file
drivers/net/phy/phylib.c line 33
Quoted 3 lines
drivers/net/phy/phylib.c new file +3
-0+int phy_driver_register (struct phy_driver *phydrv) +{ +if (!phydrv)
missing space
drivers/net/phy/phylib.c line 53
Quoted 4 lines
drivers/net/phy/phylib.c new file +4
-0+int phy_init (void ) +{ +/* Initialize the list */ +INIT_LIST_HEAD (&phy_drvs.list);
does it really need to be dynamic ? arent there static initializers so this can be done in .data ?
drivers/net/phy/phylib.c line 68
Quoted 1 line
drivers/net/phy/phylib.c new file +1
-0+ phydev =calloc (1 ,sizeof (struct phy_device ));
this is odd style. why dont we stop jerkin around in all our code and introduce zalloc() already. the first patch in this series has malloc/memset usage too.
drivers/net/phy/phylib.c line 87
Quoted 3 lines
drivers/net/phy/phylib.c new file +3
-0+static int phy_connect (struct mii_device *miidev,int phy_addr) +{ +unsigned int phyaddr = (phy_addr +1u ) %32u ;
what's this business all about ? why wrap the phy addr ?
drivers/net/phy/phylib.c line 101
Quoted 1 line
drivers/net/phy/phylib.c new file +1
-0+printf ("%s found at 0x%x\n" , phydev->phydrv->name, phyaddr);
"0x%x" -> "%#x"
drivers/net/phy/phylib.c line 120
Quoted 1 line
drivers/net/phy/phylib.c new file +1
-0+for (i =0 ; i <32 ; i++) {
i'd stick a comment here about mii bus being limited to 7 bits as not everyone knows it
drivers/net/phy/phylib.c line 143
Quoted 2 lines
drivers/net/phy/phylib.c new file +2
-0+if (!phy_connect (miidev, phy_addr)) +if (phydrv->config_init)
missing space after the "if"
drivers/net/phy/phylib.c line 155
Quoted 2 lines
drivers/net/phy/phylib.c new file +2
-0+printf ("%dMbps %s duplex link detected\n" , phydev->speed, + phydev->duplex?"full" :"half" );
need space before the "?"
drivers/net/phy/phylib.c line 162
Quoted 5 lines
drivers/net/phy/phylib.c new file +5
-0+ }else { +printf ("*Warning* no link detected\n" ); + } + +return 0 ;
should "no link" really return success ?
drivers/net/phy/phylib.c line 374
Quoted 1 line
drivers/net/phy/phylib.c new file +1
-0+if (phydev->duplex ==DUPLEX_FULL ){
need space before that "{"
drivers/net/phy/phylib.c line 466
Quoted 4 lines
drivers/net/phy/phylib.c new file +4
-0+ result =genphy_config_advert (phydev); + +if (result <0 )/* error */ +return result;
the error comment seems kind of useless
drivers/net/phy/phylib.c line 481
Quoted 2 lines
drivers/net/phy/phylib.c new file +2
-0+/* Only restart aneg if we are advertising something different +* than we were before. */
embedded tab at the end of the comment doesnt belong
drivers/net/phy/phylib.c line 513
Quoted 2 lines
drivers/net/phy/phylib.c new file +2
-0+ now =get_timer (0 ); +while (get_timer (now) <PHY_AN_TIMEOUT ) {
kind of useless to check the timer right away. please convert to a do {...} while rather than a while {...}.
drivers/net/phy/phylib.c line 522
Quoted 3 lines
drivers/net/phy/phylib.c new file +3
-0+puts ("PHY remote fault detected\n" ); +/* Restart auto-negotiation */ +puts ("PHY restarting auto-negotiation\n" );
combine the puts()
drivers/net/phy/phylib.c line 38
Quoted 1 line
drivers/net/phy/phylib.c new file +1
-0+#define ETHTOOL_GSET 0x00000001/* Get settings. */
i dont think we need all this ETHTOOL_xxx junk
drivers/net/phy/phylib.c line 41
Quoted 3 lines
drivers/net/phy/phylib.c new file +3
-0+/* compatibility with older code */ +#define SPARC_ETH_GSET ETHTOOL_GSET +#define SPARC_ETH_SSET ETHTOOL_SSET
or this
drivers/net/phy/phylib.c line 49
Quoted 8 lines
drivers/net/phy/phylib.c new file +8
-0+/* Wake-On-Lan options. */ +#define WAKE_PHY (1 << 0) +#define WAKE_UCAST (1 << 1) +#define WAKE_MCAST (1 << 2) +#define WAKE_BCAST (1 << 3) +#define WAKE_ARP (1 << 4) +#define WAKE_MAGIC (1 << 5) +#define WAKE_MAGICSECURE (1 << 6)/* only meaningful if WAKE_MAGIC */
does WOL really make sense in u-boot ?
-mike
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RFC PATCH 3/3 phylib: add generic phy driver
In reply to Jean-Christophe PLAGNIOL-VILLARDdrivers/net/phy/generic.c line 34
Quoted 11 lines · On Wednesday 26 August 2009 16:13:03 Jean-Christophe PLAGNIOL-VILLARD wrote:
drivers/net/phy/generic.c new file +11
-0+void generic_phy_register (void ) +{ +struct phy_driver generic_phy = { + .name ="Generic PHY" , + .phy_id =0xffffffff , + .phy_id_mask =0xffffffff , + .features =0 , + .config_init = generic_phy_init, + }; + +phy_driver_register (&generic_phy);
you cant register a driver you declared on the stack
-mike
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RFC PATCH 2/3 net: add phylib implementation
In reply to Mike FrysingerQuoted 7 lines · On Thursday 27 August 2009 03:55:57 Mike Frysinger wrote:
drivers/net/phy/phylib.c line 53
Quoted 4 lines
drivers/net/phy/phylib.c new file +4
-0+int phy_init (void ) +{ +/* Initialize the list */ +INIT_LIST_HEAD (&phy_drvs.list);does it really need to be dynamic ? arent there static initializers so this can be done in .data ?
Using static initializers fails on PPC because of the somewhat broken relocation. So this dynamic implementation is the preferred version, at least for PPC people.
Cheers,
Stefan
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RFC PATCH 2/3 net: add phylib implementation
Quoted 9 lines · On Thursday 27 August 2009 01:11:32 Stefan Roese wrote:
Quoted 7 lines · On Thursday 27 August 2009 03:55:57 Mike Frysinger wrote:
drivers/net/phy/phylib.c line 53
Quoted 4 lines
drivers/net/phy/phylib.c new file +4
-0+int phy_init (void ) +{ +/* Initialize the list */ +INIT_LIST_HEAD (&phy_drvs.list);does it really need to be dynamic ? arent there static initializers so this can be done in .data ?
Quoted 3 lines
Using static initializers fails on PPC because of the somewhat broken relocation. So this dynamic implementation is the preferred version, at least for PPC people.
so the ppc port cant use the .data section at all ? that doesnt sound correct to me.
-mike
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RFC PATCH 2/3 net: add phylib implementation
Quoted 10 lines · Mike Frysinger
Quoted 9 lines · On Thursday 27 August 2009 01:11:32 Stefan Roese wrote:
Quoted 7 lines · On Thursday 27 August 2009 03:55:57 Mike Frysinger wrote:
drivers/net/phy/phylib.c line 53
Quoted 4 lines
drivers/net/phy/phylib.c new file +4
-0+int phy_init (void ) +{ +/* Initialize the list */ +INIT_LIST_HEAD (&phy_drvs.list);does it really need to be dynamic ? arent there static initializers so this can be done in .data ?
Quoted 6 lines
Quoted 3 lines
Using static initializers fails on PPC because of the somewhat broken relocation. So this dynamic implementation is the preferred version, at least for PPC people.
so the ppc port cant use the .data section at all ? that doesnt sound correct to me.
We can't have initialized pointers in .data without manual runtime fixup. Only .text has relocation information.
Someone tried to get proper relocation working a while ago, but ran into toolchain bugs. Maybe current toolchains are better...
-Scott
RFC PATCH 1/3 net: rework the mii support
In reply to Jean-Christophe PLAGNIOL-VILLARDQuoted 7 lines · Jean-Christophe PLAGNIOL-VILLARD
this rework is done in order to add a phylib and reduce and simplify the implementation of multi
net_devicesupport for the same driver precedently we pass the device name to the miiphy_read/write & co now we pass themii_deviceinstance of the mii bus all network driver are switch to this way we currently keep the old miiphy api by wrapping it to the newmii_deviceapi until we have the phylib implementation and all the network driver using it Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD ---
I'm not going to be able to give this stuff a thorough review for a few days. Please don't interpret silence as either ACK or NAK. Initial glance looks promising though...
Definitely please clean up the grammar as Mike suggests.
regards,
Ben
RFC PATCH 2/3 net: add phylib implementation
In reply to Scott WoodQuoted 15 lines · Scott Wood
Quoted 14 lines · Mike Frysinger
Quoted 12 lines · On Thursday 27 August 2009 01:11:32 Stefan Roese wrote:
Quoted 7 lines · On Thursday 27 August 2009 03:55:57 Mike Frysinger wrote:
drivers/net/phy/phylib.c line 53
Quoted 4 lines
drivers/net/phy/phylib.c new file +4
-0+int phy_init (void ) +{ +/* Initialize the list */ +INIT_LIST_HEAD (&phy_drvs.list);does it really need to be dynamic ? arent there static initializers so this can be done in .data ?
Using static initializers fails on PPC because of the somewhat broken relocation. So this dynamic implementation is the preferred version, at least for PPC people.
Quoted 8 lines
Quoted 2 lines
so the ppc port cant use the .data section at all ? that doesnt sound correct to me.
We can't have initialized pointers in .data without manual runtime fixup. Only .text has relocation information.
Someone tried to get proper relocation working a while ago, but ran into toolchain bugs. Maybe current toolchains are better...
X-ES's board's in U-Boot fully relocate to SDRAM with the CONFIG_RELOC_FIXUP_WORKS define and -mrelocatable compiler flag. This feature has worked with gcc-4.3.1/binutils-2.18.90 and gcc-4.2.2/binutils-2.17.50.
Does anyone have a specific example of a toolchain that doesn't work? It'd be great to get the issue figured out and get rid of all those gd->reloc_off references that currently litter the code...
Peter
[U-Boot] PowerPC -mrelocatable
Quoted 4 lines · Peter Tyser
Quoted 2 lines · Scott Wood
Someone tried to get proper relocation working a while ago, but ran into toolchain bugs. Maybe current toolchains are better...
Quoted 8 lines
X-ES's board's in U-Boot fully relocate to SDRAM with the
CONFIG_RELOC_FIXUP_WORKSdefine and -mrelocatable compiler flag. This feature has worked with gcc-4.3.1/binutils-2.18.90 and gcc-4.2.2/binutils-2.17.50.Does anyone have a specific example of a toolchain that doesn't work? It'd be great to get the issue figured out and get rid of all those
gd->reloc_offreferences that currently litter the code...
According to these e-mails:
http://lists.denx.de/pipermail/u-boot/2007-October/025937.html
http://lists.denx.de/pipermail/u-boot/2007-October/025941.html
it worked in (at least some) 4.0, but not (at least some) 3.x or 4.1.
If we're now at the point where current GCC works, and has for several releases, we should probably consider revisiting those patches.
-Scott
RFC PATCH 2/3 net: add phylib implementation
In reply to Scott WoodQuoted 15 lines · On Thursday 27 August 2009 11:38:07 Scott Wood wrote:
Quoted 14 lines · Mike Frysinger
Quoted 12 lines · On Thursday 27 August 2009 01:11:32 Stefan Roese wrote:
Quoted 7 lines · On Thursday 27 August 2009 03:55:57 Mike Frysinger wrote:
drivers/net/phy/phylib.c line 53
Quoted 4 lines
drivers/net/phy/phylib.c new file +4
-0+int phy_init (void ) +{ +/* Initialize the list */ +INIT_LIST_HEAD (&phy_drvs.list);does it really need to be dynamic ? arent there static initializers so this can be done in .data ?
Using static initializers fails on PPC because of the somewhat broken relocation. So this dynamic implementation is the preferred version, at least for PPC people.
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so the ppc port cant use the .data section at all ? that doesnt sound correct to me.
We can't have initialized pointers in .data without manual runtime fixup. Only .text has relocation information.
we're talking about a list structure and its initialized state, it isnt pointing to anything.
-mike
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RFC PATCH 2/3 net: add phylib implementation
Quoted 13 lines · Mike Frysinger
Quoted 12 lines · On Thursday 27 August 2009 11:38:07 Scott Wood wrote:
Quoted 11 lines · Mike Frysinger
Quoted 10 lines · On Thursday 27 August 2009 01:11:32 Stefan Roese wrote:
Quoted 6 lines · On Thursday 27 August 2009 03:55:57 Mike Frysinger wrote:
drivers/net/phy/phylib.c line 53
Quoted 4 lines
drivers/net/phy/phylib.c new file +4
-0+int phy_init (void ) +{ +/* Initialize the list */ +INIT_LIST_HEAD (&phy_drvs.list);does it really need to be dynamic ? arent there static initializers so this can be done in .data ?
Using static initializers fails on PPC because of the somewhat broken relocation. So this dynamic implementation is the preferred version, at least for PPC people.
Quoted 7 lines
Quoted 4 lines
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so the ppc port cant use the .data section at all ? that doesnt sound correct to me.
We can't have initialized pointers in .data without manual runtime fixup. Only .text has relocation information.
we're talking about a list structure and its initialized state, it isnt pointing to anything.
It's pointing to itself.
-Scott
[U-Boot] PowerPC -mrelocatable
In reply to Scott WoodQuoted 6 lines
Quoted 4 lines · Peter Tyser
Quoted 2 lines · Scott Wood
Someone tried to get proper relocation working a while ago, but ran into toolchain bugs. Maybe current toolchains are better...
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X-ES's board's in U-Boot fully relocate to SDRAM with the
CONFIG_RELOC_FIXUP_WORKSdefine and -mrelocatable compiler flag. This feature has worked with gcc-4.3.1/binutils-2.18.90 and gcc-4.2.2/binutils-2.17.50.Does anyone have a specific example of a toolchain that doesn't work? It'd be great to get the issue figured out and get rid of all those
gd->reloc_offreferences that currently litter the code...
Yes, and not just nullify reloc_off. It should be removed when compiling with -mrelocatable to cut size down too.
Quoted 9 lines
According to these e-mails:
http://lists.denx.de/pipermail/u-boot/2007-October/025937.html
http://lists.denx.de/pipermail/u-boot/2007-October/025941.htmlit worked in (at least some) 4.0, but not (at least some) 3.x or 4.1.
If we're now at the point where current GCC works, and has for several releases, we should probably consider revisiting those patches.
gcc 3.4.6 and ld 2.16.1 worked fine on ppc last time I tried it.
[U-Boot] PowerPC -mrelocatable
In reply to Scott WoodQuoted 14 lines · Scott Wood
Quoted 4 lines · Peter Tyser
Quoted 2 lines · Scott Wood
Someone tried to get proper relocation working a while ago, but ran into toolchain bugs. Maybe current toolchains are better...
Quoted 8 lines
X-ES's board's in U-Boot fully relocate to SDRAM with the
CONFIG_RELOC_FIXUP_WORKSdefine and -mrelocatable compiler flag. This feature has worked with gcc-4.3.1/binutils-2.18.90 and gcc-4.2.2/binutils-2.17.50.Does anyone have a specific example of a toolchain that doesn't work? It'd be great to get the issue figured out and get rid of all those
gd->reloc_offreferences that currently litter the code...
Quoted 5 lines
According to these e-mails:
http://lists.denx.de/pipermail/u-boot/2007-October/025937.html
http://lists.denx.de/pipermail/u-boot/2007-October/025941.htmlit worked in (at least some) 4.0, but not (at least some) 3.x or 4.1.
Going over the emails and my own testing, it looks the following versions worked:
gcc 4.0.0
gcc 4.0.2
gcc 4.1.1, binutils 2.16 (I've verified this)
gcc 4.2.2, binutils 2.17 (I've verified this)
gcc 4.3.1, binutils 2.17 (I've verified this)
And the following didn't:
gcc 3.4.3, glibc 2.3.4, binutils 2.15.94
gcc 4.1.2, glibc 2.5, binutils 2.17 ***
gcc 4.1.78 ***
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If we're now at the point where current GCC works, and has for several releases, we should probably consider revisiting those patches.
I did some debug on gcc 3.4.3/binutils2.3.4/glibc2.15 which was a known non-working setup on an MPC8548-based board. I'm 98% sure the the reason it fails because it doesn't properly generate .fixup sections. No .fixup sections are present in any of the compiled objects or u-boot. This results in the link script variable '__fixup_entries' equalling 0, so no relocation fixups are performed on bootup (eg see line 943 in cpu/mpc85xx/start.S).
It looks like this was a gcc bug that has been fixed:
http://gcc.gnu.org/ml/gcc-cvs/2004-12/msg00057.html
gcc 4.1.2 and 4.1.78 have the gcc relocation fix in it, so that isn't the issue for them. I tried gcc 4.1.2/binutils 2.17 from one of Freescale's BSPs (looks to be very similar to the one described here:
http://www.freescale.com/files/soft_dev_tools/doc/support_info/BSPMPC5121EADSRN.txt?fsrch=1)
and it actually worked!
I'm guessing that the "broken" versions of gcc 4.1.2 and 4.1.78 are actually the same Freescale-provided compiler. The toolchain Freescale provided is really version 4.1.2, but the path of the compiler contains "gcc-4.1.78-eglibc-2.5.78-dp-1". gcc 4.1.78 doesn't exist, so I'm guessing someone in the threads above was using Freescale's gcc 4.1.2, but made the mistake of calling it 4.1.78 based on its misleading install path.
So in summary, there appears to be a bug in gcc for version 3.4.3 which prevents relocation from working, and I was unable to find any issues with 4.1.2. The fact that all 4.0.0, 4.1.1, 4.2.2, 4.3.1 worked also would lead me to believe 4.1.2 should also work.
Does anyone out there by chance have a failure case for gcc > 4.0.0, because I can't seem to reproduce the issues others had in the past.
My vote would be to find out which version of gcc contains the relocation bug and spit out an error if gcc < than that version is used. We could also try and get fancy and dynamically turn on/off relocation support at compile time based on gcc's version if other's wanted to maintain support for older compilers. These changes would only be for ppc@this point btw.
Let me know if others have any input.
Best,
Peter
[U-Boot] PowerPC -mrelocatable
Quoted 11 lines · On Tuesday 08 September 2009 12:16:13 Peter Tyser wrote:
I did some debug on gcc 3.4.3/binutils2.3.4/glibc2.15 which was a known non-working setup on an MPC8548-based board. I'm 98% sure the the reason it fails because it doesn't properly generate .fixup sections. No .fixup sections are present in any of the compiled objects or u-boot. This results in the link script variable '
__fixup_entries' equalling 0, so no relocation fixups are performed on bootup (eg see line 943 incpu/mpc85xx/start.S).It looks like this was a gcc bug that has been fixed:
http://gcc.gnu.org/ml/gcc-cvs/2004-12/msg00057.html
Quoted 8 lines
...
My vote would be to find out which version of gcc contains the relocation bug and spit out an error if gcc < than that version is used. We could also try and get fancy and dynamically turn on/off relocation support at compile time based on gcc's version if other's wanted to maintain support for older compilers. These changes would only be for ppc at this point btw.
or run readelf on the objects that are known to not generate fixup stuff and error out if they're missing in the objects ?
-mike
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[U-Boot] PowerPC -mrelocatable
In reply to Peter TyserDear Peter,
Quoted 3 lines · In message <[email protected]> you wrote:
Going over the emails and my own testing, it looks the following versions worked:
...
Thanks for the detailed analysis.
I remember that gcc-3.4.x has always been marked as "suspicious" in our tests, so for example we avoided basing an ELDK release on it.
Quoted 2 lines
Does anyone out there by chance have a failure case for gcc > 4.0.0, because I can't seem to reproduce the issues others had in the past.
Do you have an up-to-date patch that can be used for such testing?
Quoted 2 lines
My vote would be to find out which version of gcc contains the relocation bug and spit out an error if gcc < than that version is used.
Agreed.
Quoted 4 lines
We could also try and get fancy and dynamically turn on/off relocation support at compile time based on gcc's version if other's wanted to maintain support for older compilers. These changes would only be for ppc at this point btw.
I think there would be not much lost if we dropped support for versions before gcc-4.x
Best regards,
Wolfgang Denk
Signature · 6 lines
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- L. Wall & R. L. Schwartz, _Programming Perl_[U-Boot] PowerPC -mrelocatable
Quoted 24 lines
Dear Peter,
Quoted 3 lines · In message <[email protected]> you wrote:
Going over the emails and my own testing, it looks the following versions worked:
...
Thanks for the detailed analysis.
I remember that gcc-3.4.x has always been marked as "suspicious" in our tests, so for example we avoided basing an ELDK release on it.
Quoted 2 lines
Does anyone out there by chance have a failure case for gcc > 4.0.0, because I can't seem to reproduce the issues others had in the past.
Do you have an up-to-date patch that can be used for such testing?
Quoted 2 lines
My vote would be to find out which version of gcc contains the relocation bug and spit out an error if gcc < than that version is used.
Agreed.
Quoted 7 lines
Quoted 4 lines
We could also try and get fancy and dynamically turn on/off relocation support at compile time based on gcc's version if other's wanted to maintain support for older compilers. These changes would only be for ppc at this point btw.
I think there would be not much lost if we dropped support for versions before gcc-4.x
Please don't. I still use gcc 3.4.6 and it has no issues. I suggest dropping support for gcc < 3.4.6 instead.
Jocke
[U-Boot] PowerPC -mrelocatable
In reply to Wolfgang DenkHi Wolfgang,
Quoted 4 lines
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Does anyone out there by chance have a failure case for gcc > 4.0.0, because I can't seem to reproduce the issues others had in the past.
Do you have an up-to-date patch that can be used for such testing?
I just sent an example patch (ppc: Relocation test patch) that others can use (or quickly adapt) to test their board using relocation proper. It'd be great if others could give any feedback on what impact this patch has on their board.
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My vote would be to find out which version of gcc contains the relocation bug and spit out an error if gcc < than that version is used.
Agreed.
Quoted 7 lines
Quoted 4 lines
We could also try and get fancy and dynamically turn on/off relocation support at compile time based on gcc's version if other's wanted to maintain support for older compilers. These changes would only be for ppc at this point btw.
I think there would be not much lost if we dropped support for versions before gcc-4.x
I agree. I believe 3.4.5 or 3.4.6 and later should work, but haven't tested this hypothesis to any great degree.
I can generate a proper patch if the example patch doesn't break things badly.
Best,
Peter