USB: Add USB HCD for Octeon SOCs.

The subject line kind of says it all.

Some members of the Cavium Networks Octeon family of SOCs contain the Synopsys DWC-OTG USB controller. This patch set adds the corresponding driver.

The first patch adds between zero and two Octeon platform devices. The second is the driver.

I have done a little bit of clean-up on the driver code, but undoubtedly the careful scrutiny of the USB maintainers will uncover more opportunities for improvement. I look foreword to seeing any suggestions for how the code might be changed so that it could be merged.

I will reply with the two patches.

David Daney (2):
MIPS: Octeon: Add USB platform device.
USB: Add HCD for Octeon SOC

 arch/mips/cavium-octeon/octeon-platform.c      |  105 +
 arch/mips/include/asm/octeon/cvmx-usbcx-defs.h | 1199 ++++++++++
 arch/mips/include/asm/octeon/cvmx-usbnx-defs.h |  760 +++++++
 drivers/usb/host/Kconfig                       |    8 +
 drivers/usb/host/Makefile                      |    1 +
 drivers/usb/host/dwc_otg/Kbuild                |   16 +
 drivers/usb/host/dwc_otg/dwc_otg_attr.c        |  854 +++++++
 drivers/usb/host/dwc_otg/dwc_otg_attr.h        |   63 +
 drivers/usb/host/dwc_otg/dwc_otg_cil.c         | 2887 
++++++++++++++++++++++++
 drivers/usb/host/dwc_otg/dwc_otg_cil.h         |  866 +++++++
 drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c    |  689 ++++++
 drivers/usb/host/dwc_otg/dwc_otg_driver.h      |   63 +
 drivers/usb/host/dwc_otg/dwc_otg_hcd.c         | 2878 
+++++++++++++++++++++++
 drivers/usb/host/dwc_otg/dwc_otg_hcd.h         |  661 ++++++
 drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c    | 1890 ++++++++++++++++
 drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c   |  695 ++++++
 drivers/usb/host/dwc_otg/dwc_otg_octeon.c      | 1078 +++++++++
 drivers/usb/host/dwc_otg/dwc_otg_plat.h        |  236 ++
 drivers/usb/host/dwc_otg/dwc_otg_regs.h        | 2355 +++++++++++++++++++
 19 files changed, 17304 insertions(+), 0 deletions(-)
 create mode 100644 arch/mips/include/asm/octeon/cvmx-usbcx-defs.h
 create mode 100644 arch/mips/include/asm/octeon/cvmx-usbnx-defs.h
 create mode 100644 drivers/usb/host/dwc_otg/Kbuild
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_attr.c
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_attr.h
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_cil.c
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_cil.h
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_driver.h
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_hcd.c
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_hcd.h
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_octeon.c
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_plat.h
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_regs.h

---
 arch/mips/cavium-octeon/octeon-platform.c      |  105 ++
 arch/mips/include/asm/octeon/cvmx-usbcx-defs.h | 1199 ++++++++++++++++++++++++
 arch/mips/include/asm/octeon/cvmx-usbnx-defs.h |  760 +++++++++++++++
 3 files changed, 2064 insertions(+), 0 deletions(-)
 create mode 100644 arch/mips/include/asm/octeon/cvmx-usbcx-defs.h
 create mode 100644 arch/mips/include/asm/octeon/cvmx-usbnx-defs.h

index cfdb4c2..20698a6 100644
@@ -7,13 +7,19 @@
  * Copyright (C) 2008 Wind River Systems
  */
 
+#include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/irq.h>
+#include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
 
+#include <asm/time.h>
+
 #include <asm/octeon/octeon.h>
 #include <asm/octeon/cvmx-rnm-defs.h>
+#include <asm/octeon/cvmx-usbnx-defs.h>
+#include <asm/octeon/cvmx-usbcx-defs.h>
 
 static struct octeon_cf_data octeon_cf_data;
 

@@ -247,6 +253,105 @@ out:
 }
 device_initcall(octeon_mgmt_device_init);
 
+/* Octeon USB. */
+static int __init octeon_usb_device_init(void)
+{
+	int p_rtype_ref_clk = 2;
+	int number_usb_ports;
+	int usb_port;
+	int ret = 0;
+
+	if (OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN58XX)) {
+		number_usb_ports = 0;
+	} else if (OCTEON_IS_MODEL(OCTEON_CN52XX)) {
+		number_usb_ports = 2;
+		/* CN52XX encodes this field differently */
+		p_rtype_ref_clk = 1;
+	} else {
+		number_usb_ports = 1;
+	}
+
+	for (usb_port = 0; usb_port < number_usb_ports; usb_port++) {
+		int divisor;
+		union cvmx_usbnx_clk_ctl usbn_clk_ctl;
+		struct platform_device *pdev;
+		struct resource usb_resource[2];
+
+		/*
+		 * Divide the core clock down such that USB is as
+		 * close as possible to 125Mhz.
+		 */
+		divisor = DIV_ROUND_UP(mips_hpt_frequency, 125000000);
+		/* Lower than 4 doesn't seem to work properly */
+		if (divisor < 4)
+			divisor = 4;
+
+		/* Fetch the value of the Register, and de-assert POR */
+		usbn_clk_ctl.u64 = cvmx_read_csr(CVMX_USBNX_CLK_CTL(usb_port));
+		usbn_clk_ctl.s.por = 0;
+		if (OCTEON_IS_MODEL(OCTEON_CN3XXX)) {
+			usbn_clk_ctl.cn31xx.p_rclk = 1;
+			usbn_clk_ctl.cn31xx.p_xenbn = 0;
+		} else {
+			if (cvmx_sysinfo_get()->board_type !=
+			    CVMX_BOARD_TYPE_BBGW_REF)
+				usbn_clk_ctl.cn56xx.p_rtype = p_rtype_ref_clk;
+			else
+				usbn_clk_ctl.cn56xx.p_rtype = 0;
+		}
+		usbn_clk_ctl.s.divide = divisor;
+		usbn_clk_ctl.s.divide2 = 0;
+		cvmx_write_csr(CVMX_USBNX_CLK_CTL(usb_port), usbn_clk_ctl.u64);
+
+		/* Wait for POR */
+		udelay(850);
+
+		usbn_clk_ctl.u64 = cvmx_read_csr(CVMX_USBNX_CLK_CTL(usb_port));
+		usbn_clk_ctl.s.por = 0;
+		if (OCTEON_IS_MODEL(OCTEON_CN3XXX)) {
+			usbn_clk_ctl.cn31xx.p_rclk = 1;
+			usbn_clk_ctl.cn31xx.p_xenbn = 0;
+		} else {
+			if (cvmx_sysinfo_get()->board_type !=
+			    CVMX_BOARD_TYPE_BBGW_REF)
+				usbn_clk_ctl.cn56xx.p_rtype = p_rtype_ref_clk;
+			else
+				usbn_clk_ctl.cn56xx.p_rtype = 0;
+		}
+		usbn_clk_ctl.s.prst = 1;
+		cvmx_write_csr(CVMX_USBNX_CLK_CTL(usb_port), usbn_clk_ctl.u64);
+
+		udelay(1);
+
+		usbn_clk_ctl.s.hrst = 1;
+		cvmx_write_csr(CVMX_USBNX_CLK_CTL(usb_port), usbn_clk_ctl.u64);
+		udelay(1);
+
+		memset(usb_resource, 0, sizeof(usb_resource));
+		usb_resource[0].start =
+			XKPHYS_TO_PHYS(CVMX_USBCX_GOTGCTL(usb_port));
+		usb_resource[0].end = usb_resource[0].start + 0x10000;
+		usb_resource[0].flags = IORESOURCE_MEM;
+
+		usb_resource[1].start = (usb_port == 0) ?
+			OCTEON_IRQ_USB0 : OCTEON_IRQ_USB1;
+		usb_resource[1].end = usb_resource[1].start;
+		usb_resource[1].flags = IORESOURCE_IRQ;
+
+		pdev = platform_device_register_simple("dwc_otg",
+						       usb_port,
+						       usb_resource, 2);
+		if (!pdev) {
+			pr_err("dwc_otg: Failed to allocate platform device "
+			       "for USB%d\n", usb_port);
+			ret = -ENOMEM;
+		}
+	}
+
+	return ret;
+}
+device_initcall(octeon_usb_device_init);
+
 MODULE_AUTHOR("David Daney <[email protected]>");
 MODULE_LICENSE("GPL");
 MODULE_DESCRIPTION("Platform driver for Octeon SOC");

1.6.0.6

This particular patch just adds platform devices for the Octeon SOC.

The main patch (Patch 2/2) can be seen here:

http://marc.info/?l=linux-mips&m=125502126531841&w=2

For some reason it hasn't come out on linux-usb yet.

If you look at '[PATCH 2/2] USB: Add HCD for Octeon SOC', you will see that it has the hcd support. I have omitted pcd support from this set, as I am working towards getting hcd mergable first.

As for endian issues, the current Octeon support in the kernel is for big-endian only, so since the usb hardware is on the same chip as the CPU, endian safety is not currently an issue. I have heard rumors that some ralink and PPC variants have the same controller, but I have no way of confirming this or even testing the code as I don't have that hardware.

Indeed.

David Daney

[...]

I can only refer you to '[PATCH 2/2] USB: Add HCD for Octeon SOC' (unfortunately eaten by linux-usb but available in the linux-mips archives), The target specific code is all in dwc_otg_octeon.c. The rest should be target independent. My expectation is that, much as the ohci and ehci drivers have target specific code spilt out, we would do the same with dwc_otg.

It has this annotation:

"2.40a 10-APR-2006"

We have made local bug fixes though.

---
 drivers/usb/host/Kconfig                     |    8 +
 drivers/usb/host/Makefile                    |    1 +
 drivers/usb/host/dwc_otg/Kbuild              |   16 +
 drivers/usb/host/dwc_otg/dwc_otg_attr.c      |  854 ++++++++
 drivers/usb/host/dwc_otg/dwc_otg_attr.h      |   63 +
 drivers/usb/host/dwc_otg/dwc_otg_cil.c       | 2887 ++++++++++++++++++++++++++
 drivers/usb/host/dwc_otg/dwc_otg_cil.h       |  866 ++++++++
 drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c  |  689 ++++++
 drivers/usb/host/dwc_otg/dwc_otg_driver.h    |   63 +
 drivers/usb/host/dwc_otg/dwc_otg_hcd.c       | 2878 +++++++++++++++++++++++++
 drivers/usb/host/dwc_otg/dwc_otg_hcd.h       |  661 ++++++
 drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c  | 1890 +++++++++++++++++
 drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c |  695 +++++++
 drivers/usb/host/dwc_otg/dwc_otg_octeon.c    | 1078 ++++++++++
 drivers/usb/host/dwc_otg/dwc_otg_plat.h      |  236 +++
 drivers/usb/host/dwc_otg/dwc_otg_regs.h      | 2355 +++++++++++++++++++++
 16 files changed, 15240 insertions(+), 0 deletions(-)
 create mode 100644 drivers/usb/host/dwc_otg/Kbuild
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_attr.c
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_attr.h
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_cil.c
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_cil.h
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_driver.h
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_hcd.c
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_hcd.h
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_octeon.c
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_plat.h
 create mode 100644 drivers/usb/host/dwc_otg/dwc_otg_regs.h

index 9b43b22..342dc54 100644
@@ -381,3 +381,11 @@ config USB_HWA_HCD
 
 	  To compile this driver a module, choose M here: the module
 	  will be called "hwa-hc".
+
+config USB_DWC_OTG
+	tristate "Cavium Octeon USB"
+	depends on USB && CPU_CAVIUM_OCTEON
+	---help---
+	  The Cavium Octeon on-chip USB controller.  To compile this
+	  driver as a module, choose M here: the module will be called
+	  "dwc_otg".

index f58b249..76faf12 100644
@@ -15,6 +15,7 @@ endif
 xhci-objs := xhci-hcd.o xhci-mem.o xhci-pci.o xhci-ring.o xhci-hub.o xhci-dbg.o
 
 obj-$(CONFIG_USB_WHCI_HCD)	+= whci/
+obj-$(CONFIG_USB_DWC_OTG)	+= dwc_otg/
 
 obj-$(CONFIG_PCI)		+= pci-quirks.o
 

new file mode 100644
index 0000000..cb32638
@@ -0,0 +1,16 @@
+#
+# Makefile for DWC_otg Highspeed USB controller driver
+#
+
+# Use one of the following flags to compile the software in host-only or
+# device-only mode.
+#EXTRA_CFLAGS   += -DDWC_HOST_ONLY
+#EXTRA_CFLAGS	+= -DDWC_DEVICE_ONLY
+
+EXTRA_CFLAGS   += -DDWC_HOST_ONLY
+obj-$(CONFIG_USB_DWC_OTG)	+= dwc_otg.o
+
+dwc_otg-y := dwc_otg_octeon.o dwc_otg_attr.o
+dwc_otg-y	+= dwc_otg_cil.o dwc_otg_cil_intr.o
+dwc_otg-y	+= dwc_otg_hcd.o dwc_otg_hcd_intr.o dwc_otg_hcd_queue.o
+

1.6.0.6

Part of the diff is not shown here. View the raw message.

I did in fact reply with the two patches. However some spam filtering seems to have stopped '[PATCH 2/2] USB: Add HCD for Octeon SOC' from making it to the lists.

Ralf has released it to [email protected], but [email protected] seems to have eaten it.

It had a Message-Id: <[email protected]>

I won't send it again as it seems likely that it would get eaten again, but if the list controllers for linux-usb could release it, that would be nice.

David Daney

Here's the archived version.

http://www.linux-mips.org/archives/linux-mips/2009-10/msg00064.html

There's a link on that page to get a mbox format version of that mail.

Ralf

The message is probably gone into the ether, sorry.

I got it though.

Are you looking for this to go through the usb tree? Or the mips tree?

thanks,

greg k-h

I don't have a preference.

However at this point, I think a more important issue would be to get the driver into a form that could be merged. Any suggestions you have that could help me move towards that goal would be most welcome.

David Daney

Since a while lmo's spamfilter which is trying to find stuff like "via.ra" has figured out that this might be spam in disguise and unfortunately there is plenty of that sort of stuff in C code so occasionally posted patches go to neverland. Unfortunately that's far more likely to happen than I'd like to - this USB driver caused about a dozen hits.

Suspected spam postings will be re-routed to a moderator queue. The volume of spam that ends up in the moderator queue has become so high that I don't normally follow it because that's another like 4,000 emails per month ... If a patch doesn't make it to the list then drop me a note best within < 24h of the initial posting; after 24h postings are dropped from the moderator queue so I can't approve them anymore.

Ralf