sh: sh7785lcr: add possibility of using 128MB pci window
PATCH 1/1 sh: sh7785lcr: add possibility of using 128MB pci window
Only pci may start now from 0xC0000000-phys:0xb8000000-virtual. All other mapping is the same as without using PMB.
--- arch/sh/boot/Makefile | 4 ++++ arch/sh/drivers/pci/fixups-r7780rp.c | 5 +++++ arch/sh/drivers/pci/pci-sh7780.c | 15 +++++++++++++-- arch/sh/drivers/pci/pci-sh7780.h | 9 ++++++++- arch/sh/include/asm/addrspace.h | 2 +- arch/sh/include/asm/io.h | 6 ++++++ arch/sh/include/asm/page.h | 3 +++ arch/sh/kernel/vmlinux.lds.S | 2 ++ arch/sh/mm/Kconfig | 10 ++++++++++ arch/sh/mm/Makefile | 1 + arch/sh/mm/pmb.c | 22 ++++++++++++++++++++++ 11 files changed, 75 insertions(+), 4 deletions(-)
arch/sh/boot/Makefile +4 -0
@@ -51,6 +51,10 @@ ifeq ($(CONFIG_29BIT),y) KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \ $$[$(CONFIG_MEMORY_START)]') endif +ifeq ($(CONFIG_PMB_PCI128),y) +KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \ + $$[$(CONFIG_MEMORY_START) & 0x1fffffff]') +endif KERNEL_LOAD := $(shell /bin/bash -c 'printf "0x%08x" \ $$[$(CONFIG_PAGE_OFFSET) + \
arch/sh/drivers/pci/fixups-r7780rp.c +5 -0
@@ -29,8 +29,13 @@ int pci_fixup_pcic(struct pci_channel *chan)pci_write_reg (chan,0x00000000 ,SH7780_PCIIBAR );pci_write_reg (chan,0x08000000 ,SH7780_PCICSCR0 );pci_write_reg (chan,0x0000001b ,SH7780_PCICSAR0 ); +#ifdef CONFIG_PMB_PCI128 +pci_write_reg (chan,0xc0000000 ,SH7780_PCICSCR1 ); +pci_write_reg (chan,0x0000001b ,SH7780_PCICSAR1 ); +#else pci_write_reg (chan,0xfd000000 ,SH7780_PCICSCR1 );pci_write_reg (chan,0x0000000f ,SH7780_PCICSAR1 ); +#endif return 0 ; }
arch/sh/drivers/pci/pci-sh7780.c +13 -2
@@ -22,12 +22,21 @@ static struct resource sh7785_io_resource = { .flags = IORESOURCE_IO }; +#ifdef CONFIG_PMB_PCI128 +static struct resource sh7785_mem_resource = { + .name ="SH7785_mem" , + .start =SH7780_PCI128_MEMORY_BASE , + .end =SH7780_PCI128_MEMORY_BASE +SH7780_PCI128_MEM_SIZE -1 , + .flags =IORESOURCE_MEM +}; +#else static struct resource sh7785_mem_resource = { .name ="SH7785_mem" , .start =SH7780_PCI_MEMORY_BASE , .end =SH7780_PCI_MEMORY_BASE +SH7780_PCI_MEM_SIZE -1 , .flags =IORESOURCE_MEM }; +#endif static struct pci_channel sh7780_pci_controller = { .pci_ops = &sh4_pci_ops,
@@ -40,7 +49,7 @@ static struct pci_channel sh7780_pci_controller = {static struct sh4_pci_address_map sh7780_pci_map = { .window0 = { -#if defined(CONFIG_32BIT) +#if defined(CONFIG_32BIT) && !defined(CONFIG_PMB_PCI128) .base =SH7780_32BIT_DDR_BASE_ADDR , .size =0x40000000 , #else
@@ -123,9 +132,11 @@ static int __init sh7780_pci_init(void)pci_write_reg (chan,0xfd000000 ,SH7780_PCIMBR0 );pci_write_reg (chan,0x00fc0000 ,SH7780_PCIMBMR0 ); +pci_write_reg (chan,0x10000000 ,SH7780_PCIMBR2 ); +pci_write_reg (chan,0x03fc0000 ,SH7780_PCIMBMR2 );/* ???64 MB */ #ifdef CONFIG_32BIT pci_write_reg (chan,0xc0000000 ,SH7780_PCIMBR2 ); -pci_write_reg (chan,0x20000000 -SH7780_PCI_IO_SIZE ,SH7780_PCIMBMR2 ); +pci_write_reg (chan,0x07fc0000 ,SH7780_PCIMBMR2 );/* 128 MB */ #endif /* Set IOBR for windows containing area specified in pci.h */
arch/sh/drivers/pci/pci-sh7780.h +8 -1
@@ -27,9 +27,14 @@#define SH7780_PCI_CONFIG_BASE 0xFD000000/* Config space base addr */ #define SH7780_PCI_CONFIG_SIZE 0x01000000/* Config space size */ -#define SH7780_PCI_MEMORY_BASE 0xFD000000/* Memory space base addr */ +#define SH7780_PCI_MEMORY_BASE 0xfd000000/* Memory space base addr */ #define SH7780_PCI_MEM_SIZE 0x01000000/* Size of Memory window */ +#ifdef CONFIG_PMB_PCI128 +#define SH7780_PCI128_MEMORY_BASE 0xC0000000/* 128MB Memory space base addr */ +#define SH7780_PCI128_MEM_SIZE 0x08000000/* 128MB Size of Memory window */ +#endif +#define SH7780_PCI_IO_BASE 0xFE200000/* IO space base address */ #define SH7780_PCI_IO_SIZE 0x00400000/* Size of IO window */
@@ -78,6 +83,8 @@#define SH7780_PCIMBR0 0x1E0#define SH7780_PCIMBMR0 0x1E4 +#define SH7780_PCIMBR1 0x1E8 +#define SH7780_PCIMBMR1 0x1EC#define SH7780_PCIMBR2 0x1F0#define SH7780_PCIMBMR2 0x1F4#define SH7780_PCIIOBR 0x1F8
arch/sh/include/asm/addrspace.h +1 -1
@@ -31,7 +31,7 @@/* Returns the physical address of a PnSEG (n=1,2) address */ #define PHYSADDR (a) (((unsigned long)(a)) & 0x1fffffff) -#if defined(CONFIG_29BIT ) || defined(CONFIG_PMB_FIXED ) +#if defined(CONFIG_29BIT ) || defined(CONFIG_PMB_FIXED ) || defined(CONFIG_PMB_PCI128 )/* * Map an address to a certain privileged segment */
arch/sh/include/asm/io.h +6 -0
@@ -251,6 +251,12 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)#endif void __iomem *ret; +#if defined(CONFIG_PMB_PCI128 ) +if (likely (offset >=P3SEG ) &&likely (offset <P3_ADDR_MAX )) { +printk ("%s: offset = %lx -> addr = %lx \n" , __FUNCTION__, offset, (PA_AREA6_IO + (0x07ffffff & offset))); +return (void __iomem *)(PA_AREA6_IO + (0x07ffffff & offset)); + } +#endif ret =__ioremap_trapped (offset, size);if (ret)return ret;
arch/sh/include/asm/page.h +3 -0
@@ -132,6 +132,9 @@ typedef struct page *pgtable_t;#define PMB_OFFSET (PAGE_OFFSET - PXSEG(__MEMORY_START))#define __pa (x) ((unsigned long)(x) - PMB_OFFSET)#define __va (x) ((void *)((unsigned long)(x) + PMB_OFFSET)) +#elif defined(CONFIG_PMB_PCI128 ) +#define __pa (x) ((unsigned long)(x)-PAGE_OFFSET) +#define __va (x) ((void *)((unsigned long)(x)+PAGE_OFFSET))#elif defined(CONFIG_32BIT )#define __pa (x) ((unsigned long)(x)-PAGE_OFFSET+__MEMORY_START)#define __va (x) ((void *)((unsigned long)(x)+PAGE_OFFSET-__MEMORY_START))
arch/sh/kernel/vmlinux.lds.S +2 -0
@@ -20,6 +20,8 @@ SECTIONS #ifdef CONFIG_PMB_FIXED . = CONFIG_PAGE_OFFSET + (CONFIG_MEMORY_START & 0x1fffffff) + CONFIG_ZERO_PAGE_OFFSET; +#elif defined(CONFIG_PMB_PCI128) + . = CONFIG_PAGE_OFFSET + CONFIG_MEMORY_START + CONFIG_ZERO_PAGE_OFFSET; #elif defined(CONFIG_32BIT) . = CONFIG_PAGE_OFFSET + CONFIG_ZERO_PAGE_OFFSET; #else
arch/sh/mm/Kconfig +10 -0
@@ -116,6 +116,16 @@ config PMB_FIXED management. This is the closest to legacy 29-bit physical mode, and allows systems to support up to 512MiB of system memory. +config PMB_PCI128 + bool "pci 128MB PMB" + depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7780 || \ + CPU_SUBTYPE_SH7785) + select 32BIT + help + If this option is enabled, PMB mappings are appeared + This is the closest to legacy 29-bit physical mode, + and allows systems to support up to 128MiB of pci memory. + endchoice config X2TLB
arch/sh/mm/Makefile +1 -0
@@ -34,6 +34,7 @@ endif obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o obj-$(CONFIG_PMB) += pmb.o +obj-$(CONFIG_PMB_PCI128) += pmb.o obj-$(CONFIG_PMB_FIXED) += pmb-fixed.o obj-$(CONFIG_NUMA) += numa.o
arch/sh/mm/pmb.c +22 -0
@@ -36,6 +36,27 @@static struct kmem_cache *pmb_cache;static unsigned long pmb_map; +#ifdef CONFIG_PMB_PCI128 +static struct pmb_entry pmb_init_map[] = { +/* vpn ppn flags (ub/sz/c/wt) */ + +/* P1 Section Mappings */ + {0x80000000 ,0x00000000 ,PMB_SZ_64M |PMB_C , }, + {0x84000000 ,0x04000000 ,PMB_SZ_64M |PMB_C , }, + {0x88000000 ,0x08000000 ,PMB_SZ_128M |PMB_C , }, + {0x90000000 ,0x10000000 ,PMB_SZ_64M |PMB_C , }, + {0x94000000 ,0x14000000 ,PMB_SZ_64M |PMB_C , }, + {0x98000000 ,0x18000000 ,PMB_SZ_64M |PMB_C , }, + +/* P2 Section Mappings */ + {0xa0000000 ,0x00000000 ,PMB_UB |PMB_SZ_64M |PMB_WT , }, + {0xa4000000 ,0x04000000 ,PMB_UB |PMB_SZ_64M |PMB_WT , }, + {0xa8000000 ,0x08000000 ,PMB_UB |PMB_SZ_128M |PMB_WT , }, + {0xb0000000 ,0x10000000 ,PMB_UB |PMB_SZ_64M |PMB_WT , }, + {0xb4000000 ,0x14000000 ,PMB_UB |PMB_SZ_64M |PMB_WT , }, + {0xb8000000 ,0xc0000000 ,PMB_UB |PMB_SZ_128M , }, +}; +#else static struct pmb_entry pmb_init_map[] = { /* vpn ppn flags (ub/sz/c/wt) */
@@ -55,6 +76,7 @@ static struct pmb_entry pmb_init_map[] = { { 0xb4000000, 0x14000000, PMB_UB | PMB_SZ_64M | PMB_WT, }, { 0xb8000000, 0x18000000, PMB_UB | PMB_SZ_64M | PMB_WT, }, }; +#endif static inline unsigned long mk_pmb_entry(unsigned int entry) {
-- 1.6.3.3
Re: [PATCH] sh: sh7785lcr: add possibility of using 128MB pci window on sh7785lcr by using PMB
Quoted 4 lines · Valentin R Sitsikov
Only pci may start now from 0xC0000000-phys:0xb8000000-virtual. All other mapping is the same as without using PMB.
Signed-off-by Valentin Sitdikov <[email protected]>
No, we are not going to add any ifdefs to vary the size of the PCI memory window. A lot of hard work went in to throwing away all of this ifdef configuration crap in the first place, and the last thing we want to do is reinstate more of it. We do not have enough address space with or without the PMB to make varying configurations realistic.
Having said that, I think 128MB is a fine default, given that presently we are completely starved for vmalloc space due to the mindless assignment of PCI memory to that region. As such, perhaps the easiest thing to do is simply to scale the window size back to 128MB as a maximum and bump vmalloc space after that (or even 64MB for PCI memory would probably be fine).
If anyone wants to map more PCI memory than that, they are not going to be able to use the legacy P1/P2 mappings. We would be better off throwing out P2 completely and giving it over to sparsemem vmemmap to actually do something useful with anyways.
Hello Paul.
Don`t you mind if we return to the discussions about 128MB window for Pci.
I have a feeling what i missed something or may be misunderstood. My ideas right now are:
1. It is really necessary to have 128MB pci window in my case. (we have a pci card plugged in with 64MB).
2. Pci window of such size (512MB) can start only form 0xc0000000 (physical address)
3. There are two possiblity to map such phys. address to the kernel virtual address:
3.1. Using PMB to P1/P2 areas only .
3.2. By using general TLB mmaping to P3 area. (4K or 8K page`s are
inefficient from my point of view).
4. vmalloc are starts somewhere in P3. We need to bump it somehow if use 3.2.
5. In any case it can be done only in 32-bit mode.
6. The current solution I have implemented uses PMB approach.
0xb8000000 (P2), 128 MB <- 0xc0000000 (phys), 128MB.
7. I need no more than 128MB right now.
So what is you suggestion which approach i can use right now 3.1. or 3.2.? Please correct me if i am wrong somewhere.
Best regards,
Valentin.
Quoted 26 lines · Paul Mundt
Quoted 5 lines · Valentin R Sitsikov
Only pci may start now from 0xC0000000-phys:0xb8000000-virtual. All other mapping is the same as without using PMB.
Signed-off-by Valentin Sitdikov <[email protected]>No, we are not going to add any ifdefs to vary the size of the PCI memory window. A lot of hard work went in to throwing away all of this ifdef configuration crap in the first place, and the last thing we want to do is reinstate more of it. We do not have enough address space with or without the PMB to make varying configurations realistic.
Having said that, I think 128MB is a fine default, given that presently we are completely starved for vmalloc space due to the mindless assignment of PCI memory to that region. As such, perhaps the easiest thing to do is simply to scale the window size back to 128MB as a maximum and bump vmalloc space after that (or even 64MB for PCI memory would probably be fine).
If anyone wants to map more PCI memory than that, they are not going to be able to use the legacy P1/P2 mappings. We would be better off throwing out P2 completely and giving it over to sparsemem vmemmap to actually do something useful with anyways.