Add support for Indefia Nimbus Cloud Board
PATCH 1/1 Add support for Indefia Nimbus Cloud Board
Nimbus Cloud is an AVR32 based single board computer with 256MiB NAND, 64MiB SDRAM, battery backed RTC, LCD/touch screen support, VGA Output, Ethernet and offers seamless integration with Indefia's Zigbee transceivers.
--- CREDITS | 4 + MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 3 + board/indefia/nimbuscloud/Makefile | 40 ++++++ board/indefia/nimbuscloud/config.mk | 3 + board/indefia/nimbuscloud/flash.c | 225 +++++++++++++++++++++++++++++++ board/indefia/nimbuscloud/nimbuscloud.c | 167 +++++++++++++++++++++++ board/indefia/nimbuscloud/u-boot.lds | 72 ++++++++++ include/configs/nimbuscloud.h | 180 ++++++++++++++++++++++++ 10 files changed, 699 insertions(+), 0 deletions(-) create mode 100644 board/indefia/nimbuscloud/Makefile create mode 100644 board/indefia/nimbuscloud/config.mk create mode 100644 board/indefia/nimbuscloud/flash.c create mode 100644 board/indefia/nimbuscloud/nimbuscloud.c create mode 100644 board/indefia/nimbuscloud/u-boot.lds create mode 100644 include/configs/nimbuscloud.h
CREDITS +4 -0
@@ -196,6 +196,10 @@ N: Anne-Sophie Harnois E: Anne-Sophie.Harnois at nextream.fr D: Port to Walnut405 board +N: Semih Hazar +E: semih.hazar at indefia.com +D: Nimbus Cloud board support + N: Andreas Heppel E: aheppel at sysgo.de D: CPU Support for MPC 75x; board support for Eltec BAB750 [obsolete!]
MAINTAINERS +4 -0
@@ -880,6 +880,10 @@ Hans-Christian Egtvedt <[email protected]> FAVR-32-EZKIT AT32AP7000 +Semih Hazar <[email protected]> + + NIMBUSCLOUD AT32AP7000 + Mark Jackson <[email protected]> MIMC200 AT32AP7000
MAKEALL +1 -0
@@ -859,6 +859,7 @@ LIST_avr32=" \ favr-32-ezkit \ hammerhead \ mimc200 \ + nimbuscloud \ " #########################################################################
Makefile +3 -0
@@ -3595,6 +3595,9 @@ hammerhead_config : unconfig mimc200_config : unconfig @$(MKCONFIG) $(@:_config=) avr32 at32ap mimc200 mimc at32ap700x +nimbuscloud_config : unconfig + @$(MKCONFIG) $(@:_config=) avr32 at32ap nimbuscloud indefia at32ap700x + #======================================================================== # SH3 (SuperH) #========================================================================
board/indefia/nimbuscloud/Makefile new file +40 -0
@@ -0,0 +1,40 @@ +# +# Copyright (C) 2008-2009 Indefia +# +# See file CREDITS for list of people who contributed to this project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA + +include $(TOPDIR)/config.mk + +LIB := $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o flash.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +#########################################################################
board/indefia/nimbuscloud/config.mk new file +3 -0
@@ -0,0 +1,3 @@ +TEXT_BASE = 0x00000000 +PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections +PLATFORM_LDFLAGS += --gc-sections
board/indefia/nimbuscloud/flash.c new file +225 -0
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board/indefia/nimbuscloud/nimbuscloud.c new file +167 -0
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board/indefia/nimbuscloud/u-boot.lds new file +72 -0
72 lines not on this page · raw message
include/configs/nimbuscloud.h new file +180 -0
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Signature · 1 line
1.5.4.3
PATCH 1/1 Add support for Indefia Nimbus Cloud Board
Hi,
I had sent a few patches almost a month ago about a new AVR32 board, but couldn't get a reply from anyone.
I'd appreciate if we can get these patches into the upcoming release.
Regards,
Semih Hazar
PATCH 1/1 Add support for Indefia Nimbus Cloud Board
In reply to Semih HazarDear Semih Hazar,
Quoted 5 lines · In message <[email protected]> you wrote:
Nimbus Cloud is an AVR32 based single board computer with 256MiB NAND, 64MiB SDRAM, battery backed RTC, LCD/touch screen support, VGA Output, Ethernet and offers seamless integration with Indefia's Zigbee transceivers.
...
board/indefia/nimbuscloud/flash.c
Quoted 5 lines
board/indefia/nimbuscloud/flash.c new file +0
-0
Is ther e a chance to do without this file and use the CFI driver instead?
Quoted 5 lines
board/indefia/nimbuscloud/flash.c new file +5
-0+unsigned long flash_init (void ) +{ +unsigned long addr; +unsigned int i; +
board/indefia/nimbuscloud/flash.c line 67
Quoted 10 lines
board/indefia/nimbuscloud/flash.c new file +10
-0+ gd->bd->bi_flashstart =CONFIG_SYS_FLASH_BASE ; + gd->bd->bi_flashsize =CONFIG_SYS_FLASH_SIZE ; + gd->bd->bi_flashoffset = _edata - _text; + + flash_info[0 ].size =CONFIG_SYS_FLASH_SIZE ; + flash_info[0 ].sector_count =CONFIG_SYS_MAX_FLASH_SECT ; + +flash_identify (uncached ((void *)CONFIG_SYS_FLASH_BASE ), &flash_info[0 ]); + +// First 8 sectors are 8k
Please do not use C++ comments.
board/indefia/nimbuscloud/flash.c line 71
Quoted 4 lines
board/indefia/nimbuscloud/flash.c new file +4
-0+for (i =0 , addr =0 ; i <8 ; i++, addr +=0x2000 ) + flash_info[0 ].start[i] = addr; + +// Remaing are 64k
Ditto. Please fix globally.
board/indefia/nimbuscloud/flash.c
Quoted 10 lines
board/indefia/nimbuscloud/flash.c new file +10
-0+int board_early_init_f (void ) +{ +/* Enable SDRAM in the EBI mux */ +hmatrix_slave_write (EBI ,SFR ,HMATRIX_BIT (EBI_SDRAM_ENABLE )); + +portmux_enable_ebi (32 ,23 ,0 ,PORTMUX_DRIVE_HIGH ); +portmux_enable_usart1 (PORTMUX_DRIVE_MIN ); + +/* Enable GPIO on config swicthes */ + portmux_select_gpio(PORTMUX_PORT_B, (1 << 13) | (1 << 14) | (1 << 15) | (1 << 16),
Line too long. Please fix globally.
Quoted 9 lines
board/indefia/nimbuscloud/flash.c new file +9
-0+phys_size_t initdram (int board_type) +{ +unsigned long expected_size; +unsigned long actual_size; +void *sdram_base; + + sdram_base =map_physmem (EBI_SDRAM_BASE ,EBI_SDRAM_SIZE ,MAP_NOCACHE ); + + expected_size =sdram_init (sdram_base, &sdram_config);
board/indefia/nimbuscloud/flash.c
Quoted 10 lines
board/indefia/nimbuscloud/flash.c new file +10
-0+ actual_size =get_ram_size (sdram_base, expected_size); + +unmap_physmem (sdram_base,EBI_SDRAM_SIZE ); + +if (expected_size != actual_size) +printf ("Warning: Only %lu of %lu MiB SDRAM is working\n" , + actual_size >>20 , expected_size >>20 ); + +printf ("Indefia Nimbus Cloud - CPU@%d MHz, SDRAM %d MiB @%d MHz\n" , + (int ) (get_cpu_clk_rate ()/1000000 ), (int ) (actual_size >>20 ), (int ) (get_sdram_clk_rate ()/1000000 ));
Line too long. And please use strmhz() to print clock frequencies.
Um... this print does not belong here at all. CPU init messages and board initi messages have no place in initdram() at all.
board/indefia/nimbuscloud/u-boot.lds
Quoted 5 lines
board/indefia/nimbuscloud/u-boot.lds new file +0
-0
Do you really need a board specific linker script?
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de "The computer programmer is a creator of universes for which he alone is responsible. Universes of virtually unlimited complexity can be created in the form of computer programs." - Joseph Weizenbaum, _Computer Power and Human Reason_
PATCH 1/1 Add support for Indefia Nimbus Cloud Board
Dear Wolfgang,
Please find my answers below.
Quoted 5 lines
Is ther e a chance to do without this file and use the CFI driver instead?
There's currently a problem with the CFI driver in AVR32 platform. There was a long discussion about it, but a solution was not available. If that issue is solved, I can submit a patch to change this to use CFI.
Quoted 6 lines
board/indefia/nimbuscloud/flash.c line 67
Quoted 3 lines
board/indefia/nimbuscloud/flash.c new file +1
-0+// First 8 sectors are 8k Please do not use C++ comments.
These are fixed.
Quoted 7 lines
board/indefia/nimbuscloud/nimbuscloud.c line 78
Quoted 4 lines
board/indefia/nimbuscloud/nimbuscloud.c new file +2
-0+/* Enable GPIO on config swicthes */ + portmux_select_gpio(PORTMUX_PORT_B, (1 << 13) | (1 << 14) | (1 << 15) | (1 << 16),Line too long. Please fix globally.
Fixed.
Quoted 6 lines
Line too long. And please use
strmhz()to print clock frequencies.Um... this print does not belong here at all. CPU init messages and board initi messages have no place in
initdram()at all.
Removed it.
Quoted 10 lines
board/indefia/nimbuscloud/u-boot.lds
Quoted 6 lines
board/indefia/nimbuscloud/u-boot.lds new file +0
-0Do you really need a board specific linker script?
The README file says to put a u-boot.lds file for a new board and I did so. I also looked at the other AVR32 boards and they all also have it. If there's another way, I can change it.
I'm sending the revised patch in another mail.
Best regards,
Semih Hazar
PATCH 1/1 Add support for Indefia Nimbus Cloud Board
In reply to Wolfgang DenkNimbus Cloud is an AVR32 based single board computer with 256MiB NAND, 64MiB SDRAM, battery backed RTC, LCD/touch screen support, VGA Output, Ethernet and offers seamless integration with Indefia's Zigbee transceivers.
--- CREDITS | 4 + MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 3 + board/indefia/nimbuscloud/Makefile | 40 ++++++ board/indefia/nimbuscloud/config.mk | 3 + board/indefia/nimbuscloud/flash.c | 226 +++++++++++++++++++++++++++++++ board/indefia/nimbuscloud/nimbuscloud.c | 166 +++++++++++++++++++++++ board/indefia/nimbuscloud/u-boot.lds | 72 ++++++++++ include/configs/nimbuscloud.h | 182 +++++++++++++++++++++++++ 10 files changed, 701 insertions(+), 0 deletions(-)
CREDITS +4 -0
@@ -196,6 +196,10 @@ N: Anne-Sophie Harnois E: Anne-Sophie.Harnois at nextream.fr D: Port to Walnut405 board +N: Semih Hazar +E: semih.hazar at indefia.com +D: Nimbus Cloud board support + N: Andreas Heppel E: aheppel at sysgo.de D: CPU Support for MPC 75x; board support for Eltec BAB750 [obsolete!]
MAINTAINERS +4 -0
@@ -880,6 +880,10 @@ Hans-Christian Egtvedt <[email protected]> FAVR-32-EZKIT AT32AP7000 +Semih Hazar <[email protected]> + + NIMBUSCLOUD AT32AP7000 + Mark Jackson <[email protected]> MIMC200 AT32AP7000
MAKEALL +1 -0
@@ -859,6 +859,7 @@ LIST_avr32=" \ favr-32-ezkit \ hammerhead \ mimc200 \ + nimbuscloud \ " #########################################################################
Makefile +3 -0
@@ -3595,6 +3595,9 @@ hammerhead_config : unconfig mimc200_config : unconfig @$(MKCONFIG) $(@:_config=) avr32 at32ap mimc200 mimc at32ap700x +nimbuscloud_config : unconfig + @$(MKCONFIG) $(@:_config=) avr32 at32ap nimbuscloud indefia at32ap700x + #======================================================================== # SH3 (SuperH) #========================================================================
board/indefia/nimbuscloud/Makefile new file +40 -0
@@ -0,0 +1,40 @@ +# +# Copyright (C) 2008-2009 Indefia +# +# See file CREDITS for list of people who contributed to this project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA + +include $(TOPDIR)/config.mk + +LIB := $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o flash.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +#########################################################################
board/indefia/nimbuscloud/config.mk new file +3 -0
@@ -0,0 +1,3 @@ +TEXT_BASE = 0x00000000 +PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections +PLATFORM_LDFLAGS += --gc-sections
board/indefia/nimbuscloud/flash.c new file +226 -0
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board/indefia/nimbuscloud/nimbuscloud.c new file +166 -0
166 lines not on this page · raw message
board/indefia/nimbuscloud/u-boot.lds new file +72 -0
72 lines not on this page · raw message
include/configs/nimbuscloud.h new file +182 -0
182 lines not on this page · raw message
PATCH 1/1 Add support for Indefia Nimbus Cloud Board
In reply to Semih HazarDear Semih Hazar,
Quoted 7 lines · In message <[email protected]> you wrote:
Quoted 4 lines
Is ther e a chance to do without this file and use the CFI driver instead?
There's currently a problem with the CFI driver in AVR32 platform. There was a long discussion about it, but a solution was not available. If that issue is solved, I can submit a patch to change this to use CFI.
Well, if we accept that everybody post-pones the real solution by adding workarounds instead, then chances are minimal that the real problem will ever be fixed.
I therefor tend to NAK this custom driver and insist on using the CFI driver for CFI conformant flashes.
Best regards,
Wolfgang Denk
Signature · 6 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Die Freiheit des Menschen liegt nicht darin, dass er tun kann, was er
will, sondern darin, dass er nicht tun muss, was er nicht will.
-- Jean-Jacques RousseauPATCH 1/1 Add support for Indefia Nimbus Cloud Board
In reply to Semih HazarDear Semih Hazar,
Quoted 5 lines · In message <[email protected]> you wrote:
Nimbus Cloud is an AVR32 based single board computer with 256MiB NAND, 64MiB SDRAM, battery backed RTC, LCD/touch screen support, VGA Output, Ethernet and offers seamless integration with Indefia's Zigbee transceivers.
Quoted 12 lines
--- CREDITS | 4 + MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 3 + board/indefia/nimbuscloud/Makefile | 40 ++++++ board/indefia/nimbuscloud/config.mk | 3 + board/indefia/nimbuscloud/flash.c | 226 +++++++++++++++++++++++++++++++ board/indefia/nimbuscloud/nimbuscloud.c | 166 +++++++++++++++++++++++ board/indefia/nimbuscloud/u-boot.lds | 72 ++++++++++ include/configs/nimbuscloud.h | 182 +++++++++++++++++++++++++ 10 files changed, 701 insertions(+), 0 deletions(-)
As explained before:
NAK for board/indefia/nimbuscloud/flash.c
Quoted 5 lines
board/indefia/nimbuscloud/nimbuscloud.c new file +0
-0
...
board/indefia/nimbuscloud/nimbuscloud.c line 143
Quoted 4 lines
board/indefia/nimbuscloud/nimbuscloud.c new file +4
-0+#ifdef CONFIG_CMD_NET + +extern int macb_miiphy_read (char *devname,u8 phy_adr,u8 reg,u16 *value); +extern int macb_miiphy_write (char *devname,u8 phy_adr,u8 reg,u16 value);
Such prototypes belong into some header file.
Best regards,
Wolfgang Denk
Signature · 5 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de Motto of the Electrical Engineer: Working computer hardware is a lot like an erect penis: it stays up as long as you don't fuck with it.
PATCH 1/1 Add support for Indefia Nimbus Cloud Board
In reply to Wolfgang DenkDear Wolfgang,
The problem with AVR32 and the CFI flash driver has a few possible solutions as noted by Haavard Skinnemoen in the email [1]. The only thing I can do is to go with the first alternative and set the flash address as the virtual address which is cache-disabled and works flawless with the CFI driver.
That solution can also be used by other AVR32 boards, and I _think_ it also solves the JFFS2 scanning problem which was mentioned in [2].
The only ugly thing (for me) is when using the CFI commands, the flash addresses has to be shifted by 0xa0000000. (e.g. copy to flash at 0x1000 must be written as cp.b <source> 0xa0001000 <size>).
Please find the revised patch in a separate email, which also includes a new header file per your comments in the other email.
Best Regards,
Semih Hazar
[1] http://www.mail-archive.com/u-boot at lists.denx.de/msg20911.html
[2] http://lists.avr32linux.org/pipermail/u-boot/2009-August/000457.html
PATCH 1/1 Add support for Indefia Nimbus Cloud Board
In reply to Wolfgang DenkNimbus Cloud is an AVR32 based single board computer with 256MiB NAND, 64MiB SDRAM, battery backed RTC, LCD/touch screen support, VGA Output, Ethernet and offers seamless integration with Indefia's Zigbee transceivers.
--- CREDITS | 4 + MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 3 + board/indefia/nimbuscloud/Makefile | 40 +++++++ board/indefia/nimbuscloud/config.mk | 3 + board/indefia/nimbuscloud/nimbuscloud.c | 165 +++++++++++++++++++++++++++ board/indefia/nimbuscloud/nimbuscloud.h | 8 ++ board/indefia/nimbuscloud/u-boot.lds | 72 ++++++++++++ include/configs/nimbuscloud.h | 184 +++++++++++++++++++++++++++++++ 10 files changed, 484 insertions(+), 0 deletions(-)
CREDITS +4 -0
@@ -196,6 +196,10 @@ N: Anne-Sophie Harnois E: Anne-Sophie.Harnois at nextream.fr D: Port to Walnut405 board +N: Semih Hazar +E: semih.hazar at indefia.com +D: Nimbus Cloud board support + N: Andreas Heppel E: aheppel at sysgo.de D: CPU Support for MPC 75x; board support for Eltec BAB750 [obsolete!]
MAINTAINERS +4 -0
@@ -881,6 +881,10 @@ Hans-Christian Egtvedt <[email protected]> FAVR-32-EZKIT AT32AP7000 +Semih Hazar <[email protected]> + + NIMBUSCLOUD AT32AP7000 + Mark Jackson <[email protected]> MIMC200 AT32AP7000
MAKEALL +1 -0
@@ -866,6 +866,7 @@ LIST_avr32=" \ favr-32-ezkit \ hammerhead \ mimc200 \ + nimbuscloud \ " #########################################################################
Makefile +3 -0
@@ -3593,6 +3593,9 @@ hammerhead_config : unconfig mimc200_config : unconfig @$(MKCONFIG) $(@:_config=) avr32 at32ap mimc200 mimc at32ap700x +nimbuscloud_config : unconfig + @$(MKCONFIG) $(@:_config=) avr32 at32ap nimbuscloud indefia at32ap700x + #======================================================================== # SH3 (SuperH) #========================================================================
board/indefia/nimbuscloud/Makefile new file +40 -0
@@ -0,0 +1,40 @@ +# +# Copyright (C) 2008-2009 Indefia +# +# See file CREDITS for list of people who contributed to this project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA + +include $(TOPDIR)/config.mk + +LIB := $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +#########################################################################
board/indefia/nimbuscloud/config.mk new file +3 -0
@@ -0,0 +1,3 @@ +TEXT_BASE = 0x00000000 +PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections +PLATFORM_LDFLAGS += --gc-sections
board/indefia/nimbuscloud/nimbuscloud.c new file +165 -0
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board/indefia/nimbuscloud/nimbuscloud.h new file +8 -0
@@ -0,0 +1,8 @@ + +#ifdef CONFIG_CMD_NET + +extern int macb_miiphy_read (char *devname,u8 phy_adr,u8 reg,u16 *value); +extern int macb_miiphy_write (char *devname,u8 phy_adr,u8 reg,u16 value); + +#endif +
board/indefia/nimbuscloud/u-boot.lds new file +72 -0
72 lines not on this page · raw message
include/configs/nimbuscloud.h new file +184 -0
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PATCH 1/1 Add support for Indefia Nimbus Cloud Board
In reply to Semih HazarQuoted 4 lines · Semih Hazar
Please find the revised patch in a separate email, which also includes a new header file per your comments in the other email.
Dear Wolfgang,
It's been a while over this issue, so I wanted to ask. Did you have time to look at this?
Regards,
Semih
PATCH 1/1 Add support for Indefia Nimbus Cloud Board
In reply to Semih HazarDear Semih Hazar,
Quoted 7 lines · In message <[email protected]> you wrote:
The problem with AVR32 and the CFI flash driver has a few possible solutions as noted by Haavard Skinnemoen in the email [1]. The only thing I can do is to go with the first alternative and set the flash address as the virtual address which is cache-disabled and works flawless with the CFI driver.
Quoted 6 lines
That solution can also be used by other AVR32 boards, and I _think_ it also solves the JFFS2 scanning problem which was mentioned in [2].
The only ugly thing (for me) is when using the CFI commands, the flash addresses has to be shifted by
0xa0000000. (e.g. copy to flash at0x1000must be written as cp.b <source>0xa0001000<size>).
I really dislike such an approach. From the user interface point of view this is unacceptable to me.
My understanding is that there are only three pretty local areas where uncached access to the flash is needed: initialization (i. e. probing and querying), erasing, and programming.
So it should be possible to switch off caching when entering these functions, and turn it on again upon return. Eventually other architectures might want to implement such a feature, too, so adding generic infrastructure to do that makes sense to me.
Stefan might want to comment here, too ?
In worst case (if you really cannot change the caching attributes for the flash memory region on the fly) it might even be possible to add some "address offset" which is strictly internal to the CFI driver and used for the nn-cached accesses. But in now way any of this should be visible to the end user on the command line.
Best regards,
Wolfgang Denk
Signature · 4 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de "Ada is PL/I trying to be Smalltalk. - Codoso diBlini
PATCH 1/1 Add support for Indefia Nimbus Cloud Board
In reply to Semih HazarDear Semih Hazar,
Quoted 3 lines · In message <[email protected]> you wrote:
It's been a while over this issue, so I wanted to ask. Did you have time to look at this?
I looked at it now. Please see my previous message.
Best regards,
Wolfgang Denk
Signature · 7 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de "No one talks peace unless he's ready to back it up with war." "He talks of peace if it is the only way to live." -- Colonel Green and Surak of Vulcan, "The Savage Curtain", stardate 5906.5.
PATCH 1/1 Add support for Indefia Nimbus Cloud Board
In reply to Semih HazarDear Semih Hazar,
Quoted 5 lines · In message <[email protected]> you wrote:
Nimbus Cloud is an AVR32 based single board computer with 256MiB NAND, 64MiB SDRAM, battery backed RTC, LCD/touch screen support, VGA Output, Ethernet and offers seamless integration with Indefia's Zigbee transceivers.
Quoted 12 lines
--- CREDITS | 4 + MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 3 + board/indefia/nimbuscloud/Makefile | 40 +++++++ board/indefia/nimbuscloud/config.mk | 3 + board/indefia/nimbuscloud/nimbuscloud.c | 165 +++++++++++++++++++++++++++ board/indefia/nimbuscloud/nimbuscloud.h | 8 ++ board/indefia/nimbuscloud/u-boot.lds | 72 ++++++++++++ include/configs/nimbuscloud.h | 184 +++++++++++++++++++++++++++++++ 10 files changed, 484 insertions(+), 0 deletions(-)
I am not sure how this patch addresses the previously discussed topic of cached/uncached accesses to the NOR flash. It does not mention the topic anywhere in the commit message or other comments, which I consider a serious flaw of the patch.
PATCH 1/1 Add support for Indefia Nimbus Cloud Board
In reply to Wolfgang DenkHi Wolfgang,
Quoted 13 lines · On Sunday 21 March 2010 17:34:50 Wolfgang Denk wrote:
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The problem with AVR32 and the CFI flash driver has a few possible solutions as noted by Haavard Skinnemoen in the email [1]. The only thing I can do is to go with the first alternative and set the flash address as the virtual address which is cache-disabled and works flawless with the CFI driver.
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That solution can also be used by other AVR32 boards, and I _think_ it also solves the JFFS2 scanning problem which was mentioned in [2].
The only ugly thing (for me) is when using the CFI commands, the flash addresses has to be shifted by
0xa0000000. (e.g. copy to flash at0x1000must be written as cp.b <source>0xa0001000<size>).
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I really dislike such an approach. From the user interface point of view this is unacceptable to me.
My understanding is that there are only three pretty local areas where uncached access to the flash is needed: initialization (i. e. probing and querying), erasing, and programming.
Yes. If I don't miss anything then this is correct.
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So it should be possible to switch off caching when entering these functions, and turn it on again upon return. Eventually other architectures might want to implement such a feature, too, so adding generic infrastructure to do that makes sense to me.
Stefan might want to comment here, too ?
Currently I see 2 approaches to support NOR FLASH mapped via a cached memory region in the common CFI driver:
a) Use write-through cache support (if possible) and add required cache handling calls (invalidate and flush) at the "correct locations" (TM) in the CFI driver.
b) Temporarily disable cache in the NOR FLASH memory region before using the CFI driver. This could be done in some generic places (like Wolfgang mentioned above) and should not require any additional user action/input.
Not all platforms will support both alternatives.
Semih, would one of the above options be possible for your platform? Does the AVR support write-through cache? Is it possible to enable such a caching attribute selectively for the NOR FLASH region?
BTW: It might be that I start working on such a cached NOR FLASH support in the next few weeks. My current preference is option a) right now.
Cheers,
Stefan
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: office at denx.de
PATCH 1/1 Add support for Indefia Nimbus Cloud Board
Quoted 13 lines · Stefan Roese
Currently I see 2 approaches to support NOR FLASH mapped via a cached memory region in the common CFI driver:
a) Use write-through cache support (if possible) and add required cache handling calls (invalidate and flush) at the "correct locations" (TM) in the CFI driver.
b) Temporarily disable cache in the NOR FLASH memory region before using the CFI driver. This could be done in some generic places (like Wolfgang mentioned above) and should not require any additional user action/input.
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Not all platforms will support both alternatives.
Semih, would one of the above options be possible for your platform? Does the AVR support write-through cache? Is it possible to enable such a caching attribute selectively for the NOR FLASH region?
I'm not the expert on the AVR32 memory architecture, but as far as I know it goes like this for the NOR Flash area:
The Flash is mapped at the physical address at 0x0 and this region is cached.
This same memory region is also mapped at 0xa000000 which is not cached.
Quoting directly from the architecture datasheet:
"The mapping between virtual addresses and physical addresses is therefore implemented by clearing of MSBs in the virtual address."
In other words, if you want uncached access to the Flash, read/write at 0xa0000000, otherwise use 0x0.
It's not possible to simply disable caching for 0x0 region. It can be achieved using paging, but it's more complicated.
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BTW: It might be that I start working on such a cached NOR FLASH support in the next few weeks. My current preference is option a) right now.
If we go with Stefan's option a, then we need to put some #ifdefs or function calls in the flash code to enable/disable cache, right? Since caching can't be enabled/disabled in AVR32, the solution Haavard proposed long time ago seems a good one, considering that you're now willing to integrate cached flash support. It was a (un)map_physmem function which returns a new address for the cached/uncached region.
I think all possible scenarios have been talked in the past. I just wanted to submit my patch, since it was way long overdue. If we can't move any further, Wolfgang, I'd like you to accept this patch as it is.
PS: Related discussions can be seen in this long thread:
http://www.mail-archive.com/u-boot at lists.denx.de/msg20778.html
Best Regards,
Semih Hazar
PATCH 1/1 Add support for Indefia Nimbus Cloud Board
Dear Semih Hazar,
Quoted 6 lines · In message <[email protected]> you wrote:
I'm not the expert on the AVR32 memory architecture, but as far as I know it goes like this for the NOR Flash area:
The Flash is mapped at the physical address at0x0and this region is cached.
This same memory region is also mapped at0xa000000which is not cached.
We are aware of this situation, but that was not the actual question.
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It's not possible to simply disable caching for
0x0region. It can be achieved using paging, but it's more complicated.
I have three specific questions:
* Is it technically possible to set up the AVR32 memory controller such that the memory region at 0x0 is mapped uncached?
I am asking if it is possible to configure a system such that cahces are completely turned off.
* Assuming this is possible, then is there a way to reprogram (in the running system) the AVR32 memory controller from one mode (cached) to the other one (uncached) ?
* Does the AVR32 memory controller support anything like a "write-through" cache mode?
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If we go with Stefan's option a, then we need to put some #ifdefs or function calls in the flash code to enable/disable cache, right?
Function calls, yes. But ideally we can use write-through, and I expect that we eventually might kept this mode always switched on.
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Since caching can't be enabled/disabled in AVR32, the solution Haavard
I still don't buy this statement in this absolute form.
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I think all possible scenarios have been talked in the past. I just wanted to submit my patch, since it was way long overdue. If we can't move any further, Wolfgang, I'd like you to accept this patch as it is.
Sorry, but I don't think this is a good solution yet.
Best regards,
Wolfgang Denk
Signature · 7 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
: 1. What is the possibility of this being added in the future?
In the near future, the probability is close to zero. In the distant
future, I'll be dead, and posterity can do whatever they like... :-)
- lwallPATCH 1/1 Add support for Indefia Nimbus Cloud Board
Hi Wolfgang, Hi Semih,
Quoted 11 lines · On Tuesday 23 March 2010 21:01:12 Wolfgang Denk wrote:
Quoted 2 lines
It's not possible to simply disable caching for
0x0region. It can be achieved using paging, but it's more complicated.I have three specific questions:
* Is it technically possible to set up the AVR32 memory controller such that the memory region at
0x0is mapped uncached?I am asking if it is possible to configure a system such that cahces are completely turned off.
Quoted 6 lines
* Assuming this is possible, then is there a way to reprogram (in the running system) the AVR32 memory controller from one mode (cached) to the other one (uncached) ?
* Does the AVR32 memory controller support anything like a "write-through" cache mode?
I had a quick glance at the AVR32 architecture manual. And it really seems that 2GB starting at address 0 are *always* cached. What I couldn't find out quickly is, if it is possible to turn on write-though support for this address range. Perhaps an AVR32 expert could enlighten us here?
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If we go with Stefan's option a, then we need to put some #ifdefs or function calls in the flash code to enable/disable cache, right?
Function calls, yes. But ideally we can use write-through, and I expect that we eventually might kept this mode always switched on.
Option a) is using write-though, so the cache should always stay on in this mode (used in combination with cache flush and invalidate calls). Option b) is the alternative with temporarily disabling the caches for the erase/write operations. But since disabling cache isn't possible on AVR32, this isn't an option here.
This leads us back to these questions:
- Is it possible to turn on write-though support for the memory area starting at 0?
- Is it possible to flush and/or invalidate address ranges in this area?
Cheers,
Stefan
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: office at denx.de