XBurst JZ4730 support
Subsystems (2)
cover XBurst JZ4730 support
This patch set contains support for Ingenic's XBurst cpu, plus basic support for their JZ4730 reference boards.
Graham Gower (3):
Add XBurst JZ4730 support.
8250: serial driver changes for XBurst SoCs.
net: add driver for JZ4730 ethernet controller.
arch/mips/Kconfig | 13 + arch/mips/Makefile | 14 +- arch/mips/boot/Makefile | 15 +- arch/mips/include/asm/bootinfo.h | 7 + arch/mips/include/asm/cpu.h | 9 + arch/mips/include/asm/mach-generic/irq.h | 2 +- arch/mips/include/asm/mach-xburst/clock-jz4730.h | 41 + arch/mips/include/asm/mach-xburst/dma-jz4730.h | 156 +++ arch/mips/include/asm/mach-xburst/irq-jz4730.h | 33 + arch/mips/include/asm/mach-xburst/uart-jz4730.h | 141 +++ arch/mips/include/asm/mach-xburst/war.h | 25 + arch/mips/include/asm/mach-xburst/xburst.h | 20 + arch/mips/include/asm/r4kcache.h | 240 +++++ arch/mips/kernel/cpu-probe.c | 21 + arch/mips/mm/c-r4k.c | 30 + arch/mips/mm/tlbex.c | 5 + arch/mips/xburst/Kconfig | 23 + arch/mips/xburst/Makefile | 3 + arch/mips/xburst/jz4730/Makefile | 11 + arch/mips/xburst/jz4730/board-libra.c | 32 + arch/mips/xburst/jz4730/board-pmp.c | 32 + arch/mips/xburst/jz4730/clocks.c | 294 +++++ arch/mips/xburst/jz4730/irq.c | 104 ++ arch/mips/xburst/jz4730/platform.c | 49 + arch/mips/xburst/jz4730/prom.c | 104 ++ arch/mips/xburst/jz4730/setup.c | 136 +++ arch/mips/xburst/jz4730/time.c | 140 +++ drivers/net/Kconfig | 10 + drivers/net/Makefile | 1 + drivers/net/jz_eth.c | 1232 ++++++++++++++++++++++ drivers/net/jz_eth.h | 403 +++++++ drivers/serial/8250.c | 12 + 32 files changed, 3355 insertions(+), 3 deletions(-) create mode 100644 arch/mips/include/asm/mach-xburst/clock-jz4730.h create mode 100644 arch/mips/include/asm/mach-xburst/dma-jz4730.h create mode 100644 arch/mips/include/asm/mach-xburst/irq-jz4730.h create mode 100644 arch/mips/include/asm/mach-xburst/uart-jz4730.h create mode 100644 arch/mips/include/asm/mach-xburst/war.h create mode 100644 arch/mips/include/asm/mach-xburst/xburst.h create mode 100644 arch/mips/xburst/Kconfig create mode 100644 arch/mips/xburst/Makefile create mode 100644 arch/mips/xburst/jz4730/Makefile create mode 100644 arch/mips/xburst/jz4730/board-libra.c create mode 100644 arch/mips/xburst/jz4730/board-pmp.c create mode 100644 arch/mips/xburst/jz4730/clocks.c create mode 100644 arch/mips/xburst/jz4730/irq.c create mode 100644 arch/mips/xburst/jz4730/platform.c create mode 100644 arch/mips/xburst/jz4730/prom.c create mode 100644 arch/mips/xburst/jz4730/setup.c create mode 100644 arch/mips/xburst/jz4730/time.c create mode 100644 drivers/net/jz_eth.c create mode 100644 drivers/net/jz_eth.h
PATCH 2/3 8250: serial driver changes for XBurst SoCs.
--- drivers/serial/8250.c | 12 ++++++++++++ 1 files changed, 12 insertions(+), 0 deletions(-)
drivers/serial/8250.c +12 -0
@@ -199,7 +199,11 @@ static const struct serial8250_config uart_config[] = { [PORT_16550A] = { .name = "16550A", .fifo_size = 16, +#ifndef CONFIG_XBURST .tx_loadsz = 16, +#else + .tx_loadsz = 8, +#endif .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, .flags = UART_CAP_FIFO, },
@@ -406,6 +410,10 @@ static unsigned int mem_serial_in(struct uart_port *p, int offset)static void mem_serial_out (struct uart_port *p,int offset,int value) { offset =map_8250_out_reg (p, offset) << p->regshift; +#if defined(CONFIG_XBURST ) +if (offset == (UART_FCR << p->regshift)) + value |=0x10 ;/* set FCR.UUE */ +#endif writeb (value, p->membase + offset); }
@@ -2354,6 +2362,10 @@ serial8250_set_termios(struct uart_port *port, struct ktermios *termios,if (up->capabilities &UART_CAP_UUE ) up->ier |=UART_IER_UUE |UART_IER_RTOIE ; +#ifdef CONFIG_XBURST + up->ier |=UART_IER_RTOIE ;/* Set this flag, or very slow */ +#endif +serial_out (up,UART_IER , up->ier);if (up->capabilities &UART_CAP_EFR ) {
Signature · 1 line
1.6.4
Hi Graham,
Quoted 8 lines · On Thursday 25 February 2010 07:28:32 Graham Gower wrote:
This patch set contains support for Ingenic's XBurst cpu, plus basic support for their JZ4730 reference boards.
Graham Gower (3):
Add XBurst JZ4730 support.
8250: serial driver changes for XBurst SoCs.
net: add driver for JZ4730 ethernet controller.
Seems like patches 1 and 3 were too big and got retained by the mailing-list program.
Maybe you should work with the OpenWrt and qi-hardware guys to get the jz4740 also merged in the same time?
Quoted 55 lines
arch/mips/Kconfig | 13 + arch/mips/Makefile | 14 +- arch/mips/boot/Makefile | 15 +- arch/mips/include/asm/bootinfo.h | 7 + arch/mips/include/asm/cpu.h | 9 + arch/mips/include/asm/mach-generic/irq.h | 2 +- arch/mips/include/asm/mach-xburst/clock-jz4730.h | 41 + arch/mips/include/asm/mach-xburst/dma-jz4730.h | 156 +++ arch/mips/include/asm/mach-xburst/irq-jz4730.h | 33 + arch/mips/include/asm/mach-xburst/uart-jz4730.h | 141 +++ arch/mips/include/asm/mach-xburst/war.h | 25 + arch/mips/include/asm/mach-xburst/xburst.h | 20 + arch/mips/include/asm/r4kcache.h | 240 +++++ arch/mips/kernel/cpu-probe.c | 21 + arch/mips/mm/c-r4k.c | 30 + arch/mips/mm/tlbex.c | 5 + arch/mips/xburst/Kconfig | 23 + arch/mips/xburst/Makefile | 3 + arch/mips/xburst/jz4730/Makefile | 11 + arch/mips/xburst/jz4730/board-libra.c | 32 + arch/mips/xburst/jz4730/board-pmp.c | 32 + arch/mips/xburst/jz4730/clocks.c | 294 +++++ arch/mips/xburst/jz4730/irq.c | 104 ++ arch/mips/xburst/jz4730/platform.c | 49 + arch/mips/xburst/jz4730/prom.c | 104 ++ arch/mips/xburst/jz4730/setup.c | 136 +++ arch/mips/xburst/jz4730/time.c | 140 +++ drivers/net/Kconfig | 10 + drivers/net/Makefile | 1 + drivers/net/jz_eth.c | 1232 ++++++++++++++++++++++ drivers/net/jz_eth.h | 403 +++++++ drivers/serial/8250.c | 12 + 32 files changed, 3355 insertions(+), 3 deletions(-) create mode 100644 arch/mips/include/asm/mach-xburst/clock-jz4730.h create mode 100644 arch/mips/include/asm/mach-xburst/dma-jz4730.h create mode 100644 arch/mips/include/asm/mach-xburst/irq-jz4730.h create mode 100644 arch/mips/include/asm/mach-xburst/uart-jz4730.h create mode 100644 arch/mips/include/asm/mach-xburst/war.h create mode 100644 arch/mips/include/asm/mach-xburst/xburst.h create mode 100644 arch/mips/xburst/Kconfig create mode 100644 arch/mips/xburst/Makefile create mode 100644 arch/mips/xburst/jz4730/Makefile create mode 100644 arch/mips/xburst/jz4730/board-libra.c create mode 100644 arch/mips/xburst/jz4730/board-pmp.c create mode 100644 arch/mips/xburst/jz4730/clocks.c create mode 100644 arch/mips/xburst/jz4730/irq.c create mode 100644 arch/mips/xburst/jz4730/platform.c create mode 100644 arch/mips/xburst/jz4730/prom.c create mode 100644 arch/mips/xburst/jz4730/setup.c create mode 100644 arch/mips/xburst/jz4730/time.c create mode 100644 drivers/net/jz_eth.c create mode 100644 drivers/net/jz_eth.h
Signature · 1 line
Regards, Florian
PATCH 1/3 Add XBurst JZ4730 support.
In reply to Graham GowerProvides support for Ingenic's XBurst cpu. With initial support for their JZ4730 SoC based PMP reference platform and Libra dev board.
--- arch/mips/Kconfig | 13 + arch/mips/Makefile | 14 +- arch/mips/boot/Makefile | 15 +- arch/mips/include/asm/bootinfo.h | 7 + arch/mips/include/asm/cpu.h | 9 + arch/mips/include/asm/mach-generic/irq.h | 2 +- arch/mips/include/asm/mach-xburst/clock-jz4730.h | 41 +++ arch/mips/include/asm/mach-xburst/dma-jz4730.h | 156 ++++++++++++ arch/mips/include/asm/mach-xburst/irq-jz4730.h | 33 +++ arch/mips/include/asm/mach-xburst/uart-jz4730.h | 141 +++++++++++ arch/mips/include/asm/mach-xburst/war.h | 25 ++ arch/mips/include/asm/mach-xburst/xburst.h | 20 ++ arch/mips/include/asm/r5kcache.h | 240 ++++++++++++++++++ arch/mips/kernel/cpu-probe.c | 21 ++ arch/mips/mm/c-r4k.c | 30 +++ arch/mips/mm/tlbex.c | 5 + arch/mips/xburst/Kconfig | 23 ++ arch/mips/xburst/Makefile | 3 + arch/mips/xburst/jz4730/Makefile | 11 + arch/mips/xburst/jz4730/board-libra.c | 32 +++ arch/mips/xburst/jz4730/board-pmp.c | 32 +++ arch/mips/xburst/jz4730/clocks.c | 294 ++++++++++++++++++++++ arch/mips/xburst/jz4730/irq.c | 104 ++++++++ arch/mips/xburst/jz4730/platform.c | 49 ++++ arch/mips/xburst/jz4730/prom.c | 104 ++++++++ arch/mips/xburst/jz4730/setup.c | 136 ++++++++++ arch/mips/xburst/jz4730/time.c | 140 ++++++++++ 27 files changed, 1697 insertions(+), 3 deletions(-) create mode 100644 arch/mips/include/asm/mach-xburst/clock-jz4730.h create mode 100644 arch/mips/include/asm/mach-xburst/dma-jz4730.h create mode 100644 arch/mips/include/asm/mach-xburst/irq-jz4730.h create mode 100644 arch/mips/include/asm/mach-xburst/uart-jz4730.h create mode 100644 arch/mips/include/asm/mach-xburst/war.h create mode 100644 arch/mips/include/asm/mach-xburst/xburst.h create mode 100644 arch/mips/xburst/Kconfig create mode 100644 arch/mips/xburst/Makefile create mode 100644 arch/mips/xburst/jz4730/Makefile create mode 100644 arch/mips/xburst/jz4730/board-libra.c create mode 100644 arch/mips/xburst/jz4730/board-pmp.c create mode 100644 arch/mips/xburst/jz4730/clocks.c create mode 100644 arch/mips/xburst/jz4730/irq.c create mode 100644 arch/mips/xburst/jz4730/platform.c create mode 100644 arch/mips/xburst/jz4730/prom.c create mode 100644 arch/mips/xburst/jz4730/setup.c create mode 100644 arch/mips/xburst/jz4730/time.c
arch/mips/Kconfig +13 -0
@@ -679,6 +679,18 @@ config CAVIUM_OCTEON_REFERENCE_BOARD Hikari Say Y here for most Octeon reference boards. +config XBURST + bool "Ingenic XBurst based machines" + select SYS_HAS_CPU_MIPS32_R1 + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_LITTLE_ENDIAN + select DMA_NONCOHERENT + select IRQ_CPU + select GENERIC_GPIO + select ARCH_REQUIRE_GPIOLIB + select SYS_HAS_EARLY_PRINTK + select BOOT_RAW + endchoice source "arch/mips/alchemy/Kconfig"
@@ -693,6 +705,7 @@ source "arch/mips/txx9/Kconfig" source "arch/mips/vr41xx/Kconfig" source "arch/mips/cavium-octeon/Kconfig" source "arch/mips/loongson/Kconfig" +source "arch/mips/xburst/Kconfig" endmenu
arch/mips/Makefile +13 -1
@@ -637,6 +637,13 @@ else load-$(CONFIG_CPU_CAVIUM_OCTEON) += 0xffffffff81100000 endif +# +# Ingenic XBurst +# +core-$(CONFIG_XBURST) += arch/mips/xburst/ +cflags-$(CONFIG_XBURST) += -I$(srctree)/arch/mips/include/asm/mach-xburst +load-$(CONFIG_XBURST) += 0xffffffff80010000 + cflags-y += -I$(srctree)/arch/mips/include/asm/mach-generic drivers-$(CONFIG_PCI) += arch/mips/pci/
@@ -711,7 +718,8 @@ vmlinux.32: vmlinux vmlinux.64: vmlinux $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@ -makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1) +makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) \ + VMLINUX_LOAD_ADDRESS=$(load-y) $(1) makezboot =$(Q)$(MAKE) $(build)=arch/mips/boot/compressed \ VMLINUX_LOAD_ADDRESS=$(load-y) 32bit-bfd=$(32bit-bfd) $(1)
@@ -738,6 +746,9 @@ vmlinux.ecoff: $(vmlinux-32) vmlinux.srec: $(vmlinux-32) +@$(call makeboot,$@) +uImage: $(vmlinux-32) + +@$(call makeboot,$@) + CLEAN_FILES += vmlinux.ecoff \ vmlinux.srec
@@ -771,6 +782,7 @@ define archhelp echo ' vmlinuz.ecoff - ECOFF zboot image' echo ' vmlinuz.bin - Raw binary zboot image' echo ' vmlinuz.srec - SREC zboot image' + echo ' uImage - U-Boot image' echo echo ' These will be default as apropriate for a configured platform.' endef
arch/mips/boot/Makefile +14 -1
@@ -24,6 +24,7 @@ drop-sections = .reginfo .mdebug .comment .note .pdr .options .MIPS.options strip-flags = $(addprefix --remove-section=,$(drop-sections)) VMLINUX = vmlinux +MKIMAGE := $(srctree)/scripts/mkuboot.sh all: vmlinux.ecoff vmlinux.srec
@@ -39,7 +40,19 @@ vmlinux.bin: $(VMLINUX) vmlinux.srec: $(VMLINUX) $(OBJCOPY) -S -O srec $(strip-flags) $(VMLINUX) $(obj)/vmlinux.srec +uImage: vmlinux.bin + rm -f $(obj)/vmlinux.bin.gz + gzip -9 $(obj)/vmlinux.bin + $(CONFIG_SHELL) $(MKIMAGE) \ + -A mips -O linux -T kernel -C gzip \ + -a $(VMLINUX_LOAD_ADDRESS) -e $(VMLINUX_LOAD_ADDRESS) \ + -n 'Linux-$(KERNELRELEASE)' \ + -d $(obj)/vmlinux.bin.gz \ + $(obj)/uImage + clean-files += elf2ecoff \ vmlinux.bin \ + vmlinux.bin.gz \ vmlinux.ecoff \ - vmlinux.srec + vmlinux.srec \ + uImage
arch/mips/include/asm/bootinfo.h +7 -0
@@ -71,6 +71,13 @@#define MACH_LEMOTE_LL2F 7#define MACH_LOONGSON_END 8 +/* +* Valid machtype for XBurst +*/ +#define MACH_XBURST_UNKNOWN 0 +#define MACH_XBURST_JZ4730 1 +#define MACH_XBURST_JZ4740 2 +extern char *system_type;const char *get_system_type (void );
arch/mips/include/asm/cpu.h +9 -0
@@ -34,6 +34,7 @@#define PRID_COMP_LSI 0x080000#define PRID_COMP_LEXRA 0x0b0000#define PRID_COMP_CAVIUM 0x0d0000 +#define PRID_COMP_INGENIC 0xd00000/*
@@ -133,6 +134,13 @@#define PRID_IMP_CAVIUM_CN52XX 0x0700/* +* These are the PRID's for when 23:16 == PRID_COMP_INGENIC +*/ + +#define PRID_IMP_XBURST 0x0200 + + +/* * Definitions for 7:0 on legacy processors */
@@ -219,6 +227,7 @@ enum cpu_type_enum {CPU_4KC ,CPU_4KEC ,CPU_4KSC ,CPU_24K ,CPU_34K ,CPU_1004K ,CPU_74K ,CPU_ALCHEMY ,CPU_PR4450 ,CPU_BCM3302 ,CPU_BCM4710 ,CPU_BCM6338 ,CPU_BCM6345 ,CPU_BCM6348 ,CPU_BCM6358 , +CPU_XBURST ,/* * MIPS64 class processors
arch/mips/include/asm/mach-generic/irq.h +1 -1
@@ -9,7 +9,7 @@#define __ASM_MACH_GENERIC_IRQ_H#ifndef NR_IRQS -#define NR_IRQS 128 +#define NR_IRQS 256#endif #ifdef CONFIG_I8259
arch/mips/include/asm/mach-xburst/clock-jz4730.h new file +41 -0
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arch/mips/include/asm/mach-xburst/dma-jz4730.h new file +156 -0
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arch/mips/include/asm/mach-xburst/irq-jz4730.h new file +33 -0
@@ -0,0 +1,33 @@ +#ifndef __ASM_MACH_XBURST_IRQ_JZ4730_H +#define __ASM_MACH_XBURST_IRQ_JZ4730_H + +#define IRQ_I2C 1 +#define IRQ_PS2 2 +#define IRQ_UPRT 3 +#define IRQ_CORE 4 +#define IRQ_UART3 6 +#define IRQ_UART2 7 +#define IRQ_UART1 8 +#define IRQ_UART0 9 +#define IRQ_SCC1 10 +#define IRQ_SCC0 11 +#define IRQ_UDC 12 +#define IRQ_UHC 13 +#define IRQ_MSC 14 +#define IRQ_RTC 15 +#define IRQ_FIR 16 +#define IRQ_SSI 17 +#define IRQ_CIM 18 +#define IRQ_ETH 19 +#define IRQ_AIC 20 +#define IRQ_DMAC 21 +#define IRQ_OST2 22 +#define IRQ_OST1 23 +#define IRQ_OST0 24 +#define IRQ_GPIO3 25 +#define IRQ_GPIO2 26 +#define IRQ_GPIO1 27 +#define IRQ_GPIO0 28 +#define IRQ_LCD 30 + +#endif /* __ASM_MACH_XBURST_IRQ_JZ4730_H */
arch/mips/include/asm/mach-xburst/uart-jz4730.h new file +141 -0
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arch/mips/include/asm/mach-xburst/war.h new file +25 -0
@@ -0,0 +1,25 @@ +/* +* This file is subject to the terms and conditions of the GNU General Public +* License. See the file "COPYING" in the main directory of this archive +* for more details. +* +* Copyright (C) 2002, 2004, 2007 by Ralf Baechle <[email protected]> +*/ +#ifndef __ASM_MACH_XBURST_WAR_H +#define __ASM_MACH_XBURST_WAR_H + +#define R4600_V1_INDEX_ICACHEOP_WAR 0 +#define R4600_V1_HIT_CACHEOP_WAR 0 +#define R4600_V2_HIT_CACHEOP_WAR 0 +#define R5432_CP0_INTERRUPT_WAR 0 +#define BCM1250_M3_WAR 0 +#define SIBYTE_1956_WAR 0 +#define MIPS4K_ICACHE_REFILL_WAR 0 +#define MIPS_CACHE_SYNC_WAR 0 +#define TX49XX_ICACHE_INDEX_INV_WAR 0 +#define RM9000_CDEX_SMP_WAR 0 +#define ICACHE_REFILLS_WORKAROUND_WAR 0 +#define R10000_LLSC_WAR 0 +#define MIPS34K_MISSED_ITLB_WAR 0 + +#endif /* __ASM_MACH_XBURST_WAR_H */
arch/mips/include/asm/mach-xburst/xburst.h new file +20 -0
@@ -0,0 +1,20 @@ +/* +* Copyright (C) 2010 Ubiq Technologies <[email protected]> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation. +*/ + +#ifndef __ASM_XBURST_H +#define __ASM_XBURST_H + +#ifdef CONFIG_XBURST_JZ4730 +#include "clock-jz4730.h" +#include "irq-jz4730.h" +#include "uart-jz4730.h" +#endif + +void jz_usb0_set_function (int host); + +#endif /* __ASM_XBURST_H */
arch/mips/include/asm/r4kcache.h +240 -0
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arch/mips/kernel/cpu-probe.c +21 -0
@@ -162,6 +162,7 @@ void __init check_wait(void)case CPU_BCM6348 :case CPU_BCM6358 :case CPU_CAVIUM_OCTEON : +case CPU_XBURST : cpu_wait = r4k_wait;break ;
@@ -913,6 +914,23 @@ static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu) } } +static inline void cpu_probe_ingenic (struct cpuinfo_mips *c,unsigned int cpu) +{ +decode_configs (c); + c->options &= ~MIPS_CPU_COUNTER ;/* XBurst has no CP0 counter. */ +switch (c->processor_id &0xff00 ) { +case PRID_IMP_XBURST : + c->cputype =CPU_XBURST ; + c->isa_level =MIPS_CPU_ISA_M32R1 ; + c->tlbsize =32 ; + __cpu_name[cpu] ="Ingenic XBurst" ; +break ; +default : +panic ("Unknown Ingenic Processor ID!" ); +break ; + } +} +const char *__cpu_name[NR_CPUS ];__cpuinit void cpu_probe (void )
@@ -950,6 +968,9 @@ __cpuinit void cpu_probe(void)case PRID_COMP_CAVIUM :cpu_probe_cavium (c, cpu);break ; +case PRID_COMP_INGENIC : +cpu_probe_ingenic (c, cpu); +break ; }BUG_ON (!__cpu_name[cpu]);
arch/mips/mm/c-r4k.c +30 -0
@@ -928,6 +928,36 @@ static void __cpuinit probe_pcache(void) c->dcache.waybit =0 ;break ; +case CPU_XBURST : + config1 =read_c0_config1 (); + config1 = (config1 >>22 ) &0x07 ; +if (config1 ==0x07 ) + config1 =10 ; +else + config1 = config1 +11 ; + config1 +=2 ; + icache_size = (1 << config1); + c->icache.linesz =32 ; + c->icache.ways =4 ; + c->icache.waybit =__ffs (icache_size / c->icache.ways); + + config1 =read_c0_config1 (); + config1 = (config1 >>13 ) &0x07 ; +if (config1 ==0x07 ) + config1 =10 ; +else + config1 = config1 +11 ; + config1 +=2 ; + dcache_size = (1 << config1); + c->dcache.linesz =32 ; + c->dcache.ways =4 ; + c->dcache.waybit =__ffs (dcache_size / c->dcache.ways); + + c->dcache.flags =0 ; + c->options |=MIPS_CPU_PREFETCH ; + +break ; +default :if (!(config &MIPS_CONF_M ))panic ("Don't know how to probe P-caches on this cpu." );
arch/mips/mm/tlbex.c +5 -0
@@ -390,6 +390,11 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,tlbw (p);break ; +case CPU_XBURST : +tlbw (p); +uasm_i_nop (p); +break ; +default :panic ("No TLB refill handler yet (CPU type: %d)" , current_cpu_data.cputype);
arch/mips/xburst/Kconfig new file +23 -0
@@ -0,0 +1,23 @@ +choice + prompt "XBurst SoC Type" + depends on XBURST + +config XBURST_JZ4730 + bool "Ingenic JZ4730" + +#config XBURST_JZ4740 +# bool "Ingenic JZ4740" + +endchoice + +choice + prompt "JZ4730 board" + depends on XBURST_JZ4730 + +config JZ4730_PMP + bool "Ingenic PMP reference board" + +config JZ4730_LIBRA + bool "Ingenic Libra dev board" + +endchoice
arch/mips/xburst/Makefile new file +3 -0
@@ -0,0 +1,3 @@ +# +# jz4730 SoC based systems +obj-$(CONFIG_XBURST_JZ4730) += jz4730/
arch/mips/xburst/jz4730/Makefile new file +11 -0
@@ -0,0 +1,11 @@ +# +# JZ4730 SoC based systems. +# + +obj-y += irq.o prom.o setup.o time.o clocks.o platform.o + +# Ingenic's Libra dev board +obj-$(CONFIG_JZ4730_LIBRA) += board-libra.o + +# Ingenic's Portable Media Player reference platform +obj-$(CONFIG_JZ4730_PMP) += board-pmp.o
arch/mips/xburst/jz4730/board-libra.c new file +32 -0
@@ -0,0 +1,32 @@ +/* +* board-libra.c +* +* Copyright (C) 2010 Ubiq Technologies <[email protected]> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation. +*/ + +#include <linux/init.h> +#include <xburst.h> + +void __init +jz_board_get_extal (struct jz_clocks *cks) +{ + cks->extal =3686400 ;/* 3.6864 MHz */ + cks->extal2 =32768 ;/* 32.768 KHz */ +} + +void __init +jz_board_setup (void ) +{ +/* +* USB is much more reliable using the external USB clock, +* not the PLL divider. +*/ +jz_cpm_set_usbclk (1 ); + +/* USB0 as host. */ +jz_usb0_set_function (1 ); +}
arch/mips/xburst/jz4730/board-pmp.c new file +32 -0
@@ -0,0 +1,32 @@ +/* +* board-pmp.c +* +* Copyright (C) 2010 Ubiq Technologies <[email protected]> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation. +*/ + +#include <linux/init.h> +#include <xburst.h> + +void __init +jz_board_get_extal (struct jz_clocks *cks) +{ + cks->extal =12000000 ;/* 12 MHz */ + cks->extal2 =32768 ;/* 32.768 KHz */ +} + +void __init +jz_board_setup (void ) +{ +/* +* USB is much more reliable using the external USB clock, +* not the PLL divider. +*/ +jz_cpm_set_usbclk (1 ); + +/* USB0 as device. */ +jz_usb0_set_function (0 ); +}
arch/mips/xburst/jz4730/clocks.c new file +294 -0
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arch/mips/xburst/jz4730/irq.c new file +104 -0
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arch/mips/xburst/jz4730/platform.c new file +49 -0
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arch/mips/xburst/jz4730/prom.c new file +104 -0
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arch/mips/xburst/jz4730/setup.c new file +136 -0
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arch/mips/xburst/jz4730/time.c new file +140 -0
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Signature · 1 line
1.6.4
PATCH 3/3 net: add driver for JZ4730 ethernet controller.
In reply to Graham Gower--- drivers/net/Kconfig | 10 + drivers/net/Makefile | 1 + drivers/net/jz_eth.c | 1232 ++++++++++++++++++++++++++++++++++++++++++++++++++ drivers/net/jz_eth.h | 403 +++++++++++++++++ 4 files changed, 1646 insertions(+), 0 deletions(-) create mode 100644 drivers/net/jz_eth.c create mode 100644 drivers/net/jz_eth.h
drivers/net/Kconfig +10 -0
@@ -1951,6 +1951,16 @@ config BCM63XX_ENET This driver supports the ethernet MACs in the Broadcom 63xx MIPS chipset family (BCM63XX). +config JZ_ETH + tristate "JZ4730/JZ5730 On-Chip Ethernet support" + depends on XBURST_JZ4730 + select MII + help + This driver supports the JZ4730/JZ5730 On-Chip Ethernet interface. + + To compile this driver as a module, choose M here: the module + will be called jz_eth. + source "drivers/net/fs_enet/Kconfig" source "drivers/net/octeon/Kconfig"
drivers/net/Makefile +1 -0
@@ -141,6 +141,7 @@ obj-$(CONFIG_FORCEDETH) += forcedeth.o obj-$(CONFIG_NE_H8300) += ne-h8300.o 8390.o obj-$(CONFIG_AX88796) += ax88796.o obj-$(CONFIG_BCM63XX_ENET) += bcm63xx_enet.o +obj-$(CONFIG_JZ_ETH) += jz_eth.o obj-$(CONFIG_TSI108_ETH) += tsi108_eth.o obj-$(CONFIG_MV643XX_ETH) += mv643xx_eth.o
drivers/net/jz_eth.c new file +1232 -0
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drivers/net/jz_eth.h new file +403 -0
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Signature · 1 line
1.6.4
Quoted 7 lines · Florian Fainelli
Hi Graham,
Quoted 4 lines · On Thursday 25 February 2010 07:28:32 Graham Gower wrote:
This patch set contains support for Ingenic's XBurst cpu, plus basic support for their JZ4730 reference boards.
Quoted 7 lines
Quoted 4 lines
Graham Gower (3):
Add XBurst JZ4730 support.
8250: serial driver changes for XBurst SoCs.
net: add driver for JZ4730 ethernet controller.Seems like patches 1 and 3 were too big and got retained by the mailing-list program.
They seem to have made it to the list archives now. Thread here:
http://www.linux-mips.org/archives/linux-mips/2010-02/msg00243.html
Quoted 4 lines
Maybe you should work with the OpenWrt and qi-hardware guys to get the jz4740 also merged in the same time?
I've not seen any active attempt to get xburst code merged before and assumed there was no interest from others. I'm happy to be wrong on this.
My patch does not preclude adding jz4740 support. I don't have any of these devices however, so have only included code for the jz4730.
-Graham
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Hi
Quoted 2 lines · Graham Gower
Quoted 1 line · Florian Fainelli
Maybe you should work with the OpenWrt and qi-hardware guys to get the
jz4740
Quoted 5 lines
Quoted 1 line
also merged in the same time?
I've not seen any active attempt to get xburst code merged before and assumed there was no interest from others. I'm happy to be wrong on this.
I'm currently working on linux support for a few jz4740 hbased devices. And it's definitely a goal get the code merged upstream once it is in proper shape, but there is still some stuff that needs to be done. Mostly documentation and smaller cleanups.
Quoted 3 lines
My patch does not preclude adding jz4740 support. I don't have any of these devices however, so have only included code for the jz4730.
Unfortunately I don't have a jz4730 programmers manual to check so I can't say for sure, but I guess there is quite some code that could be shared between between both SoCS(and other jz47xx). I think we don't want to do what Ingenic did with their codebase and copy 'n paste the same file with minor modifications for each soc type.
You can find the patches (and files) adding jz4740 support to the linux kernel at [1] and [2].
I suggest you take a look at it and see if we could use some of the files(irq, gpio, dma, ...) for a common base between all jz47xx SoCs.
Quoted 2 lines
-Graham
- - Lars
[1]
https://dev.openwrt.org/browser/trunk/target/linux/xburst/patches-2.6.32
[2] https://dev.openwrt.org/browser/trunk/target/linux/xburst/files-2.6.32
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Quoted 11 lines · Lars-Peter Clausen
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Hash: SHA1Hi
Quoted 2 lines · Graham Gower
Quoted 1 line · Florian Fainelli
Maybe you should work with the OpenWrt and qi-hardware guys to get the
jz4740
Quoted 2 lines
Quoted 1 line
also merged in the same time?
Quoted 7 lines
Quoted 3 lines
I've not seen any active attempt to get xburst code merged before and assumed there was no interest from others. I'm happy to be wrong on this.
I'm currently working on linux support for a few jz4740 hbased devices. And it's definitely a goal get the code merged upstream once it is in proper shape, but there is still some stuff that needs to be done. Mostly documentation and smaller cleanups.
I was hoping to get something simple (i.e. bootable with serial) into the tree and submit other drivers later, as time permits.
Quoted 8 lines
Quoted 3 lines
My patch does not preclude adding jz4740 support. I don't have any of these devices however, so have only included code for the jz4730.
Unfortunately I don't have a jz4730 programmers manual to check so I can't say for sure, but I guess there is quite some code that could be shared between between both SoCS(and other jz47xx). I think we don't want to do what Ingenic did with their codebase and copy 'n paste the same file with minor modifications for each soc type.
The 4740 docs are a copy/paste of the 4730 docs with changes here and there and lots of register shuffling.
Quoted 5 lines
You can find the patches (and files) adding jz4740 support to the linux kernel at [1] and [2].
I suggest you take a look at it and see if we could use some of thefiles(irq, gpio, dma, ...)for a common base between all jz47xx SoCs.
The interrupt controllers look quite similar (the irq numbers have been shuffled around). The gpio and dma controllers are quite different however.
The MMC and LCD controllers look almost identical. I don't have any docs for the nand, but Ingenic's code for the 4730 and 4740 look very similar. The USB gadget code differs (udc controller info is missing from my 4740 docs) - the jz4730 gadget driver they are shipping is broken and they ignored my patch to fix it.
-Graham
blast_dcache32 problem with PREEMPT kernel
Hi list,
I am hitting following bug with CONFIG_PREEMP enabled VSMP kernel ( 2.6.24) compiled for mips34K core.
BUG: using smp_processor_id() in preemptible [00000001] code: usb-storage/190 caller is blast_dcache32+0x30/0x25c Call Trace: [<8012f338>] vprintk+0x2e8/0x584 [<8012f354>] vprintk+0x304/0x584 [<801111a0>] blast_dcache32+0x30/0x25c [<80387d5c>] debug_smp_processor_id+0xcc/0xe0 [<801111a0>] blast_dcache32+0x30/0x25c [<80387d5c>] debug_smp_processor_id+0xcc/0xe0 [<801111a0>] blast_dcache32+0x30/0x25c [<8010d9e4>] dma_map_sg+0x128/0x144 [<80410a84>] urb_destroy+0x0/0x38 [<801827b0>] kfree+0x8c/0x20c [<80411944>] usb_sg_init+0x310/0x324 [<8042a708>] usb_stor_bulk_transfer_sg+0xd0/0x174 [<8042a914>] usb_stor_Bulk_transport+0x168/0x324 [<80121a94>] enqueue_entity+0xcc/0x130 [<8042a3f4>] usb_stor_invoke_transport+0x38/0x27c [<80149ee8>] remove_wait_queue+0x1c/0x60 [<8054568c>] _spin_unlock_irqrestore+0x24/0x44 [<805425fc>] __down_interruptible+0x144/0x1e4 [<801239f0>] default_wake_function+0x0/0x8 [<8042bd58>] usb_stor_control_thread+0x268/0x320 [<801497c0>] kthread+0x0/0xa4 [<80149800>] kthread+0x40/0xa4 [<801241d8>] complete+0x4c/0x6c [<8042baf0>] usb_stor_control_thread+0x0/0x320 [<80149818>] kthread+0x58/0xa4 [<8010476c>] kernel_thread_helper+0x10/0x18
Any pointers to debug this / fix this will be greatly appreciated.
Thanking you,
Anoop