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gpio: introduce it8761e_gpio driver for IT8761E Super I/O chip

PATCH RESEND In review Denis Turischev 3 participants 8 messages Feb 28, 2010 – Jul 1, 2010 GPIO

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#0 lore raw

PATCH RESEND 1/1 gpio: introduce it8761e_gpio driver for IT8761E Super I/O chip

---
 drivers/gpio/Kconfig        |    6 +
 drivers/gpio/Makefile       |    1 +
 drivers/gpio/it8761e_gpio.c |  231 +++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 238 insertions(+), 0 deletions(-)
 create mode 100644 drivers/gpio/it8761e_gpio.c
drivers/gpio/Kconfig +6 -0
index 1730068..3c9e5ed 100644
@@ -101,6 +101,12 @@ config GPIO_SCH
 	  This driver can also be built as a module. If so, the module
 	  will be called sch-gpio.
 
+config GPIO_IT8761E
+	tristate "IT8761E GPIO support"
+	depends on GPIOLIB
+	help
+	  Say yes here to support GPIO functionality of IT8761E super I/O chip.
+
 comment "I2C GPIO expanders:"
 
 config GPIO_MAX732X
drivers/gpio/Makefile +1 -0
index aa1d06e..4adf128 100644
@@ -23,3 +23,4 @@ obj-$(CONFIG_GPIO_BT8XX)	+= bt8xxgpio.o
 obj-$(CONFIG_GPIO_VR41XX)	+= vr41xx_giu.o
 obj-$(CONFIG_GPIO_WM831X)	+= wm831x-gpio.o
 obj-$(CONFIG_GPIO_SCH)		+= sch_gpio.o
+obj-$(CONFIG_GPIO_IT8761E)	+= it8761e_gpio.o
drivers/gpio/it8761e_gpio.c new file +231 -0

231 lines not on this page · raw message

Signature · 1 line
1.6.3.3
#1 lore raw

drivers/gpio/Kconfig config GPIO_SCH · line 109

Quoted 12 lines · On Sun, 28 Feb 2010 10:54:12 +0200 Denis Turischev <[email protected]> wrote:
drivers/gpio/Kconfig +6 -0
@@ -101,6 +101,12 @@ config GPIO_SCH
  	  This driver can also be built as a module. If so, the module
  	  will be called sch-gpio.
 
+config GPIO_IT8761E
+	tristate "IT8761E GPIO support"
+	depends on GPIOLIB
+	help
+	  Say yes here to support GPIO functionality of IT8761E super I/O chip.
+

The comment said "put expanders in the right section, in alphabetical order". It wasn't in alphabetical order ;)

Is this a "Memory mapped GPIO expander"? Looks like it's IO-mapped, but there isn't a section in Kconfig for that. PCI mapped?

#2 lore raw

it8761e_gpio: Fixed bug in gpio numbering

---
 drivers/gpio/it8761e_gpio.c |   18 +++++++++---------
 1 files changed, 9 insertions(+), 9 deletions(-)
drivers/gpio/it8761e_gpio.c +9 -9
index 753219c..41a9388 100644
@@ -80,8 +80,8 @@ static int it8761e_gpio_get(struct gpio_chip *gc, unsigned gpio_num)
 	u16 reg;
 	u8 bit;
 
-	bit = gpio_num % 7;
-	reg = (gpio_num >= 7) ? gpio_ba + 1 : gpio_ba;
+	bit = gpio_num % 8;
+	reg = (gpio_num >= 8) ? gpio_ba + 1 : gpio_ba;
 
 	return !!(inb(reg) & (1 << bit));
 }
@@ -91,8 +91,8 @@ static int it8761e_gpio_direction_in(struct gpio_chip *gc, unsigned gpio_num)
 	u8 curr_dirs;
 	u8 io_reg, bit;
 
-	bit = gpio_num % 7;
-	io_reg = (gpio_num >= 7) ? GPIO2X_IO : GPIO1X_IO;
+	bit = gpio_num % 8;
+	io_reg = (gpio_num >= 8) ? GPIO2X_IO : GPIO1X_IO;
 
 	spin_lock(&sio_lock);
 
@@ -116,8 +116,8 @@ static void it8761e_gpio_set(struct gpio_chip *gc,
 	u8 curr_vals, bit;
 	u16 reg;
 
-	bit = gpio_num % 7;
-	reg = (gpio_num >= 7) ? gpio_ba + 1 : gpio_ba;
+	bit = gpio_num % 8;
+	reg = (gpio_num >= 8) ? gpio_ba + 1 : gpio_ba;
 
 	spin_lock(&sio_lock);
 
@@ -135,8 +135,8 @@ static int it8761e_gpio_direction_out(struct gpio_chip *gc,
 {
 	u8 curr_dirs, io_reg, bit;
 
-	bit = gpio_num % 7;
-	io_reg = (gpio_num >= 7) ? GPIO2X_IO : GPIO1X_IO;
+	bit = gpio_num % 8;
+	io_reg = (gpio_num >= 8) ? GPIO2X_IO : GPIO1X_IO;
 
 	it8761e_gpio_set(gc, gpio_num, val);
 
@@ -200,7 +200,7 @@ static int __init it8761e_gpio_init(void)
 		return -EBUSY;
 
 	it8761e_gpio_chip.base = -1;
-	it8761e_gpio_chip.ngpio = 14;
+	it8761e_gpio_chip.ngpio = 16;
 
 	err = gpiochip_add(&it8761e_gpio_chip);
 	if (err < 0)
Signature · 1 line
1.6.3.3
#3 lore raw

it8761e_gpio: Fixed bug in gpio numbering

SIO chip contains 16 possible gpio lines, not 14. Schematic just was not read carefully.

---
 drivers/gpio/it8761e_gpio.c |   18 +++++++++---------
 1 files changed, 9 insertions(+), 9 deletions(-)
drivers/gpio/it8761e_gpio.c +9 -9
index 753219c..41a9388 100644
@@ -80,8 +80,8 @@ static int it8761e_gpio_get(struct gpio_chip *gc, unsigned gpio_num)
 	u16 reg;
 	u8 bit;
 
-	bit = gpio_num % 7;
-	reg = (gpio_num >= 7) ? gpio_ba + 1 : gpio_ba;
+	bit = gpio_num % 8;
+	reg = (gpio_num >= 8) ? gpio_ba + 1 : gpio_ba;
 
 	return !!(inb(reg) & (1 << bit));
 }
@@ -91,8 +91,8 @@ static int it8761e_gpio_direction_in(struct gpio_chip *gc, unsigned gpio_num)
 	u8 curr_dirs;
 	u8 io_reg, bit;
 
-	bit = gpio_num % 7;
-	io_reg = (gpio_num >= 7) ? GPIO2X_IO : GPIO1X_IO;
+	bit = gpio_num % 8;
+	io_reg = (gpio_num >= 8) ? GPIO2X_IO : GPIO1X_IO;
 
 	spin_lock(&sio_lock);
 
@@ -116,8 +116,8 @@ static void it8761e_gpio_set(struct gpio_chip *gc,
 	u8 curr_vals, bit;
 	u16 reg;
 
-	bit = gpio_num % 7;
-	reg = (gpio_num >= 7) ? gpio_ba + 1 : gpio_ba;
+	bit = gpio_num % 8;
+	reg = (gpio_num >= 8) ? gpio_ba + 1 : gpio_ba;
 
 	spin_lock(&sio_lock);
 
@@ -135,8 +135,8 @@ static int it8761e_gpio_direction_out(struct gpio_chip *gc,
 {
 	u8 curr_dirs, io_reg, bit;
 
-	bit = gpio_num % 7;
-	io_reg = (gpio_num >= 7) ? GPIO2X_IO : GPIO1X_IO;
+	bit = gpio_num % 8;
+	io_reg = (gpio_num >= 8) ? GPIO2X_IO : GPIO1X_IO;
 
 	it8761e_gpio_set(gc, gpio_num, val);
 
@@ -200,7 +200,7 @@ static int __init it8761e_gpio_init(void)
 		return -EBUSY;
 
 	it8761e_gpio_chip.base = -1;
-	it8761e_gpio_chip.ngpio = 14;
+	it8761e_gpio_chip.ngpio = 16;
 
 	err = gpiochip_add(&it8761e_gpio_chip);
 	if (err < 0)

-- 1.6.3.3

#4 lore raw

PATCH 1/2 gpio: SIO IT8761, Poulsbo SCH are I/O mapped

In reply to Denis Turischev

Super I/O IT8761 and Poulsbo SCH expanders look like I/O mapped and not memory mapped.

---
 drivers/gpio/Kconfig |   14 ++++++++------
 1 files changed, 8 insertions(+), 6 deletions(-)
drivers/gpio/Kconfig +8 -6
index 724038d..f666023 100644
@@ -70,12 +70,6 @@ config GPIO_MAX730X
 
 comment "Memory mapped GPIO expanders:"
 
-config GPIO_IT8761E
-	tristate "IT8761E GPIO support"
-	depends on GPIOLIB
-	help
-	  Say yes here to support GPIO functionality of IT8761E super I/O chip.
-
 config GPIO_PL061
 	bool "PrimeCell PL061 GPIO support"
 	depends on ARM_AMBA
@@ -94,6 +88,14 @@ config GPIO_VR41XX
 	help
 	  Say yes here to support the NEC VR4100 series General-purpose I/O Uint
 
+comment "I/O mapped GPIO expanders:"
+
+config GPIO_IT8761E
+	tristate "IT8761E GPIO support"
+	depends on GPIOLIB
+	help
+	  Say yes here to support GPIO functionality of IT8761E super I/O chip.
+
 config GPIO_SCH
 	tristate "Intel SCH GPIO"
 	depends on GPIOLIB && PCI
Signature · 1 line
1.7.0.4
#5 lore raw

PATCH 2/2 gpio: introduce f71808e_gpio driver for F71808E Super I/O chip.

---
 drivers/gpio/Kconfig        |    6 +
 drivers/gpio/Makefile       |    1 +
 drivers/gpio/f71808e_gpio.c |  284 +++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 291 insertions(+), 0 deletions(-)
 create mode 100644 drivers/gpio/f71808e_gpio.c
drivers/gpio/Kconfig +6 -0
index f666023..475e846 100644
@@ -96,6 +96,12 @@ config GPIO_IT8761E
 	help
 	  Say yes here to support GPIO functionality of IT8761E super I/O chip.
 
+config GPIO_F71808E
+	tristate "F71808E GPIO support"
+	depends on GPIOLIB
+	help
+	  Say yes here to support GPIO functionality of F71808E super I/O chip.
+
 config GPIO_SCH
 	tristate "Intel SCH GPIO"
 	depends on GPIOLIB && PCI
drivers/gpio/Makefile +1 -0
index 51c3cdd..cb4dd30 100644
@@ -31,3 +31,4 @@ obj-$(CONFIG_GPIO_WM8994)	+= wm8994-gpio.o
 obj-$(CONFIG_GPIO_SCH)		+= sch_gpio.o
 obj-$(CONFIG_GPIO_RDC321X)	+= rdc321x-gpio.o
 obj-$(CONFIG_GPIO_JANZ_TTL)	+= janz-ttl.o
+obj-$(CONFIG_GPIO_F71808E)	+= f71808e_gpio.o
drivers/gpio/f71808e_gpio.c new file +284 -0

284 lines not on this page · raw message

Signature · 1 line
1.7.0.4
#6 lore raw

Re: [PATCH 2/2] gpio: introduce f71808e_gpio driver for F71808E Super I/O chip.

My first reaction is that this whole chip, including its GPIO support, would best live in drivers/mfd like various other multi-function devices.

I'm trying to avoid cluttering drivers/gpio with fragments of chip support that don't stand on their own...

#7 lore raw

Re: [PATCH 2/2] gpio: introduce f71808e_gpio driver for F71808E Super I/O chip.

If so as it8761e_gpio must be moved to drivers/mfd too.

Quoted 7 lines · David Brownell

My first reaction is that this whole chip, including its GPIO support, would best live in drivers/mfd like various other multi-function devices.

I'm trying to avoid cluttering drivers/gpio with fragments of chip support that don't stand on their own...

Signature · 1 line
Denis