ahci: clean up board IDs
PATCH 1/2 ahci: clean up board IDs
ahci over time has grown a number of board IDs and it's a bit of mess right now. Clean it up such that,
* board_id_* now live in a separate enum board_ids and numbers are assigned automatically.
* Board IDs assigned to features are separated from the ones assigned to specific implementations and both are ordered alphabetically.
* For NV MCPs, define per-generation alias board_ids and assign matching aliases in the pci id table. This makes mcp_linux, 67-73 use board_ahci_mcp65 instead of board_ahci_yesncq. Both are identical in content.
* Kill now unused board_ahci_nopmp and board_ahci_yesncq.
This patch doesn't cause any functional change but will make future changes to board_ids and quirks much less painful.
---
Updated against the new #upstream. Thanks.
drivers/ata/ahci.c | 237 ++++++++++++++++++++++++++--------------------------- 1 file changed, 117 insertions(+), 120 deletions(-)
drivers/ata/ahci.c +117 -120
@@ -52,17 +52,28 @@enum {AHCI_PCI_BAR =5 , +}; - board_ahci =0 , - board_ahci_vt8251 =1 , - board_ahci_ign_iferr =2 , - board_ahci_sb600 =3 , - board_ahci_mv =4 , - board_ahci_sb700 =5 ,/* for SB700 and SB800 */ - board_ahci_mcp65 =6 , - board_ahci_nopmp =7 , - board_ahci_yesncq =8 , - board_ahci_nosntf =9 , +enum board_ids { +/* board IDs by feature in alphabetical order */ + board_ahci, + board_ahci_ign_iferr, + board_ahci_nosntf, + +/* board IDs for specific chipsets in alphabetical order */ + board_ahci_mcp65, + board_ahci_mv, + board_ahci_sb600, + board_ahci_sb700,/* for SB700 and SB800 */ + board_ahci_vt8251, + +/* aliases */ + board_ahci_mcp_linux = board_ahci_mcp65, + board_ahci_mcp67 = board_ahci_mcp65, + board_ahci_mcp73 = board_ahci_mcp65, + board_ahci_mcp77 = board_ahci, + board_ahci_mcp79 = board_ahci, + board_ahci_mcp89 = board_ahci, };static int ahci_init_one (struct pci_dev *pdev,const struct pci_device_id *ent);
@@ -96,6 +107,7 @@ static struct ata_port_operations ahci_s#define AHCI_HFLAGS (flags) .private_data = (void *)(flags)static const struct ata_port_info ahci_port_info[] = { +/* by features */ [board_ahci] = { .flags =AHCI_FLAG_COMMON ,
@@ -103,31 +115,30 @@ static const struct ata_port_info ahci_p .udma_mask = ATA_UDMA6, .port_ops = &ahci_ops, }, - [board_ahci_vt8251] = + [board_ahci_ign_iferr] = { - AHCI_HFLAGS (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_PMP), + AHCI_HFLAGS (AHCI_HFLAG_IGN_IRQ_IF_ERR), .flags = AHCI_FLAG_COMMON, .pio_mask = ATA_PIO4, .udma_mask = ATA_UDMA6, - .port_ops = &ahci_vt8251_ops, + .port_ops = &ahci_ops, }, - [board_ahci_ign_iferr] = + [board_ahci_nosntf] = { - AHCI_HFLAGS (AHCI_HFLAG_IGN_IRQ_IF_ERR), + AHCI_HFLAGS (AHCI_HFLAG_NO_SNTF), .flags = AHCI_FLAG_COMMON, .pio_mask = ATA_PIO4, .udma_mask = ATA_UDMA6, .port_ops = &ahci_ops, }, - [board_ahci_sb600] = +/* by chipsets */ + [board_ahci_mcp65] = { -AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL | -AHCI_HFLAG_NO_MSI |AHCI_HFLAG_SECT255 | - AHCI_HFLAG_32BIT_ONLY), + AHCI_HFLAGS (AHCI_HFLAG_YES_NCQ), .flags = AHCI_FLAG_COMMON, .pio_mask = ATA_PIO4, .udma_mask = ATA_UDMA6, - .port_ops = &ahci_sb600_ops, + .port_ops = &ahci_ops, }, [board_ahci_mv] = {
@@ -139,45 +150,31 @@ static const struct ata_port_info ahci_p .udma_mask = ATA_UDMA6, .port_ops = &ahci_ops, }, - [board_ahci_sb700] = /* for SB700 and SB800 */ + [board_ahci_sb600] = { - AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL), +AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL | +AHCI_HFLAG_NO_MSI |AHCI_HFLAG_SECT255 | + AHCI_HFLAG_32BIT_ONLY), .flags = AHCI_FLAG_COMMON, .pio_mask = ATA_PIO4, .udma_mask = ATA_UDMA6, .port_ops = &ahci_sb600_ops, }, - [board_ahci_mcp65] = - { - AHCI_HFLAGS (AHCI_HFLAG_YES_NCQ), - .flags = AHCI_FLAG_COMMON, - .pio_mask = ATA_PIO4, - .udma_mask = ATA_UDMA6, - .port_ops = &ahci_ops, - }, - [board_ahci_nopmp] = - { - AHCI_HFLAGS (AHCI_HFLAG_NO_PMP), - .flags = AHCI_FLAG_COMMON, - .pio_mask = ATA_PIO4, - .udma_mask = ATA_UDMA6, - .port_ops = &ahci_ops, - }, - [board_ahci_yesncq] = + [board_ahci_sb700] =/* for SB700 and SB800 */ { - AHCI_HFLAGS (AHCI_HFLAG_YES_NCQ), + AHCI_HFLAGS (AHCI_HFLAG_IGN_SERR_INTERNAL), .flags = AHCI_FLAG_COMMON, .pio_mask = ATA_PIO4, .udma_mask = ATA_UDMA6, - .port_ops = &ahci_ops, + .port_ops = &ahci_sb600_ops, }, - [board_ahci_nosntf] = + [board_ahci_vt8251] = { - AHCI_HFLAGS (AHCI_HFLAG_NO_SNTF), + AHCI_HFLAGS (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_PMP), .flags = AHCI_FLAG_COMMON, .pio_mask = ATA_PIO4, .udma_mask = ATA_UDMA6, - .port_ops = &ahci_ops, + .port_ops = &ahci_vt8251_ops, }, };
@@ -262,82 +259,82 @@ static const struct pci_device_id ahci_p { PCI_VDEVICE(NVIDIA, 0x045d), board_ahci_mcp65 }, /* MCP65 */ { PCI_VDEVICE(NVIDIA, 0x045e), board_ahci_mcp65 }, /* MCP65 */ { PCI_VDEVICE(NVIDIA, 0x045f), board_ahci_mcp65 }, /* MCP65 */ - { PCI_VDEVICE(NVIDIA, 0x0550), board_ahci_yesncq }, /* MCP67 */ - { PCI_VDEVICE(NVIDIA, 0x0551), board_ahci_yesncq }, /* MCP67 */ - { PCI_VDEVICE(NVIDIA, 0x0552), board_ahci_yesncq }, /* MCP67 */ - { PCI_VDEVICE(NVIDIA, 0x0553), board_ahci_yesncq }, /* MCP67 */ - { PCI_VDEVICE(NVIDIA, 0x0554), board_ahci_yesncq }, /* MCP67 */ - { PCI_VDEVICE(NVIDIA, 0x0555), board_ahci_yesncq }, /* MCP67 */ - { PCI_VDEVICE(NVIDIA, 0x0556), board_ahci_yesncq }, /* MCP67 */ - { PCI_VDEVICE(NVIDIA, 0x0557), board_ahci_yesncq }, /* MCP67 */ - { PCI_VDEVICE(NVIDIA, 0x0558), board_ahci_yesncq }, /* MCP67 */ - { PCI_VDEVICE(NVIDIA, 0x0559), board_ahci_yesncq }, /* MCP67 */ - { PCI_VDEVICE(NVIDIA, 0x055a), board_ahci_yesncq }, /* MCP67 */ - { PCI_VDEVICE(NVIDIA, 0x055b), board_ahci_yesncq }, /* MCP67 */ - { PCI_VDEVICE(NVIDIA, 0x0580), board_ahci_yesncq }, /* Linux ID */ - { PCI_VDEVICE(NVIDIA, 0x0581), board_ahci_yesncq }, /* Linux ID */ - { PCI_VDEVICE(NVIDIA, 0x0582), board_ahci_yesncq }, /* Linux ID */ - { PCI_VDEVICE(NVIDIA, 0x0583), board_ahci_yesncq }, /* Linux ID */ - { PCI_VDEVICE(NVIDIA, 0x0584), board_ahci_yesncq }, /* Linux ID */ - { PCI_VDEVICE(NVIDIA, 0x0585), board_ahci_yesncq }, /* Linux ID */ - { PCI_VDEVICE(NVIDIA, 0x0586), board_ahci_yesncq }, /* Linux ID */ - { PCI_VDEVICE(NVIDIA, 0x0587), board_ahci_yesncq }, /* Linux ID */ - { PCI_VDEVICE(NVIDIA, 0x0588), board_ahci_yesncq }, /* Linux ID */ - { PCI_VDEVICE(NVIDIA, 0x0589), board_ahci_yesncq }, /* Linux ID */ - { PCI_VDEVICE(NVIDIA, 0x058a), board_ahci_yesncq }, /* Linux ID */ - { PCI_VDEVICE(NVIDIA, 0x058b), board_ahci_yesncq }, /* Linux ID */ - { PCI_VDEVICE(NVIDIA, 0x058c), board_ahci_yesncq }, /* Linux ID */ - { PCI_VDEVICE(NVIDIA, 0x058d), board_ahci_yesncq }, /* Linux ID */ - { PCI_VDEVICE(NVIDIA, 0x058e), board_ahci_yesncq }, /* Linux ID */ - { PCI_VDEVICE(NVIDIA, 0x058f), board_ahci_yesncq }, /* Linux ID */ - { PCI_VDEVICE(NVIDIA, 0x07f0), board_ahci_yesncq }, /* MCP73 */ - { PCI_VDEVICE(NVIDIA, 0x07f1), board_ahci_yesncq }, /* MCP73 */ - { PCI_VDEVICE(NVIDIA, 0x07f2), board_ahci_yesncq }, /* MCP73 */ - { PCI_VDEVICE(NVIDIA, 0x07f3), board_ahci_yesncq }, /* MCP73 */ - { PCI_VDEVICE(NVIDIA, 0x07f4), board_ahci_yesncq }, /* MCP73 */ - { PCI_VDEVICE(NVIDIA, 0x07f5), board_ahci_yesncq }, /* MCP73 */ - { PCI_VDEVICE(NVIDIA, 0x07f6), board_ahci_yesncq }, /* MCP73 */ - { PCI_VDEVICE(NVIDIA, 0x07f7), board_ahci_yesncq }, /* MCP73 */ - { PCI_VDEVICE(NVIDIA, 0x07f8), board_ahci_yesncq }, /* MCP73 */ - { PCI_VDEVICE(NVIDIA, 0x07f9), board_ahci_yesncq }, /* MCP73 */ - { PCI_VDEVICE(NVIDIA, 0x07fa), board_ahci_yesncq }, /* MCP73 */ - { PCI_VDEVICE(NVIDIA, 0x07fb), board_ahci_yesncq }, /* MCP73 */ - { PCI_VDEVICE(NVIDIA, 0x0ad0), board_ahci }, /* MCP77 */ - { PCI_VDEVICE(NVIDIA, 0x0ad1), board_ahci }, /* MCP77 */ - { PCI_VDEVICE(NVIDIA, 0x0ad2), board_ahci }, /* MCP77 */ - { PCI_VDEVICE(NVIDIA, 0x0ad3), board_ahci }, /* MCP77 */ - { PCI_VDEVICE(NVIDIA, 0x0ad4), board_ahci }, /* MCP77 */ - { PCI_VDEVICE(NVIDIA, 0x0ad5), board_ahci }, /* MCP77 */ - { PCI_VDEVICE(NVIDIA, 0x0ad6), board_ahci }, /* MCP77 */ - { PCI_VDEVICE(NVIDIA, 0x0ad7), board_ahci }, /* MCP77 */ - { PCI_VDEVICE(NVIDIA, 0x0ad8), board_ahci }, /* MCP77 */ - { PCI_VDEVICE(NVIDIA, 0x0ad9), board_ahci }, /* MCP77 */ - { PCI_VDEVICE(NVIDIA, 0x0ada), board_ahci }, /* MCP77 */ - { PCI_VDEVICE(NVIDIA, 0x0adb), board_ahci }, /* MCP77 */ - { PCI_VDEVICE(NVIDIA, 0x0ab4), board_ahci }, /* MCP79 */ - { PCI_VDEVICE(NVIDIA, 0x0ab5), board_ahci }, /* MCP79 */ - { PCI_VDEVICE(NVIDIA, 0x0ab6), board_ahci }, /* MCP79 */ - { PCI_VDEVICE(NVIDIA, 0x0ab7), board_ahci }, /* MCP79 */ - { PCI_VDEVICE(NVIDIA, 0x0ab8), board_ahci }, /* MCP79 */ - { PCI_VDEVICE(NVIDIA, 0x0ab9), board_ahci }, /* MCP79 */ - { PCI_VDEVICE(NVIDIA, 0x0aba), board_ahci }, /* MCP79 */ - { PCI_VDEVICE(NVIDIA, 0x0abb), board_ahci }, /* MCP79 */ - { PCI_VDEVICE(NVIDIA, 0x0abc), board_ahci }, /* MCP79 */ - { PCI_VDEVICE(NVIDIA, 0x0abd), board_ahci }, /* MCP79 */ - { PCI_VDEVICE(NVIDIA, 0x0abe), board_ahci }, /* MCP79 */ - { PCI_VDEVICE(NVIDIA, 0x0abf), board_ahci }, /* MCP79 */ - { PCI_VDEVICE(NVIDIA, 0x0d84), board_ahci }, /* MCP89 */ - { PCI_VDEVICE(NVIDIA, 0x0d85), board_ahci }, /* MCP89 */ - { PCI_VDEVICE(NVIDIA, 0x0d86), board_ahci }, /* MCP89 */ - { PCI_VDEVICE(NVIDIA, 0x0d87), board_ahci }, /* MCP89 */ - { PCI_VDEVICE(NVIDIA, 0x0d88), board_ahci }, /* MCP89 */ - { PCI_VDEVICE(NVIDIA, 0x0d89), board_ahci }, /* MCP89 */ - { PCI_VDEVICE(NVIDIA, 0x0d8a), board_ahci }, /* MCP89 */ - { PCI_VDEVICE(NVIDIA, 0x0d8b), board_ahci }, /* MCP89 */ - { PCI_VDEVICE(NVIDIA, 0x0d8c), board_ahci }, /* MCP89 */ - { PCI_VDEVICE(NVIDIA, 0x0d8d), board_ahci }, /* MCP89 */ - { PCI_VDEVICE(NVIDIA, 0x0d8e), board_ahci }, /* MCP89 */ - { PCI_VDEVICE(NVIDIA, 0x0d8f), board_ahci }, /* MCP89 */ + { PCI_VDEVICE(NVIDIA, 0x0550), board_ahci_mcp67 }, /* MCP67 */ + { PCI_VDEVICE(NVIDIA, 0x0551), board_ahci_mcp67 }, /* MCP67 */ + { PCI_VDEVICE(NVIDIA, 0x0552), board_ahci_mcp67 }, /* MCP67 */ + { PCI_VDEVICE(NVIDIA, 0x0553), board_ahci_mcp67 }, /* MCP67 */ + { PCI_VDEVICE(NVIDIA, 0x0554), board_ahci_mcp67 }, /* MCP67 */ + { PCI_VDEVICE(NVIDIA, 0x0555), board_ahci_mcp67 }, /* MCP67 */ + { PCI_VDEVICE(NVIDIA, 0x0556), board_ahci_mcp67 }, /* MCP67 */ + { PCI_VDEVICE(NVIDIA, 0x0557), board_ahci_mcp67 }, /* MCP67 */ + { PCI_VDEVICE(NVIDIA, 0x0558), board_ahci_mcp67 }, /* MCP67 */ + { PCI_VDEVICE(NVIDIA, 0x0559), board_ahci_mcp67 }, /* MCP67 */ + { PCI_VDEVICE(NVIDIA, 0x055a), board_ahci_mcp67 }, /* MCP67 */ + { PCI_VDEVICE(NVIDIA, 0x055b), board_ahci_mcp67 }, /* MCP67 */ + { PCI_VDEVICE(NVIDIA, 0x0580), board_ahci_mcp_linux }, /* Linux ID */ + { PCI_VDEVICE(NVIDIA, 0x0581), board_ahci_mcp_linux }, /* Linux ID */ + { PCI_VDEVICE(NVIDIA, 0x0582), board_ahci_mcp_linux }, /* Linux ID */ + { PCI_VDEVICE(NVIDIA, 0x0583), board_ahci_mcp_linux }, /* Linux ID */ + { PCI_VDEVICE(NVIDIA, 0x0584), board_ahci_mcp_linux }, /* Linux ID */ + { PCI_VDEVICE(NVIDIA, 0x0585), board_ahci_mcp_linux }, /* Linux ID */ + { PCI_VDEVICE(NVIDIA, 0x0586), board_ahci_mcp_linux }, /* Linux ID */ + { PCI_VDEVICE(NVIDIA, 0x0587), board_ahci_mcp_linux }, /* Linux ID */ + { PCI_VDEVICE(NVIDIA, 0x0588), board_ahci_mcp_linux }, /* Linux ID */ + { PCI_VDEVICE(NVIDIA, 0x0589), board_ahci_mcp_linux }, /* Linux ID */ + { PCI_VDEVICE(NVIDIA, 0x058a), board_ahci_mcp_linux }, /* Linux ID */ + { PCI_VDEVICE(NVIDIA, 0x058b), board_ahci_mcp_linux }, /* Linux ID */ + { PCI_VDEVICE(NVIDIA, 0x058c), board_ahci_mcp_linux }, /* Linux ID */ + { PCI_VDEVICE(NVIDIA, 0x058d), board_ahci_mcp_linux }, /* Linux ID */ + { PCI_VDEVICE(NVIDIA, 0x058e), board_ahci_mcp_linux }, /* Linux ID */ + { PCI_VDEVICE(NVIDIA, 0x058f), board_ahci_mcp_linux }, /* Linux ID */ + { PCI_VDEVICE(NVIDIA, 0x07f0), board_ahci_mcp73 }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x07f1), board_ahci_mcp73 }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x07f2), board_ahci_mcp73 }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x07f3), board_ahci_mcp73 }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x07f4), board_ahci_mcp73 }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x07f5), board_ahci_mcp73 }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x07f6), board_ahci_mcp73 }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x07f7), board_ahci_mcp73 }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x07f8), board_ahci_mcp73 }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x07f9), board_ahci_mcp73 }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x07fa), board_ahci_mcp73 }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x07fb), board_ahci_mcp73 }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x0ad0), board_ahci_mcp77 }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0ad1), board_ahci_mcp77 }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0ad2), board_ahci_mcp77 }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0ad3), board_ahci_mcp77 }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0ad4), board_ahci_mcp77 }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0ad5), board_ahci_mcp77 }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0ad6), board_ahci_mcp77 }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0ad7), board_ahci_mcp77 }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0ad8), board_ahci_mcp77 }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0ad9), board_ahci_mcp77 }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0ada), board_ahci_mcp77 }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0adb), board_ahci_mcp77 }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0ab4), board_ahci_mcp79 }, /* MCP79 */ + { PCI_VDEVICE(NVIDIA, 0x0ab5), board_ahci_mcp79 }, /* MCP79 */ + { PCI_VDEVICE(NVIDIA, 0x0ab6), board_ahci_mcp79 }, /* MCP79 */ + { PCI_VDEVICE(NVIDIA, 0x0ab7), board_ahci_mcp79 }, /* MCP79 */ + { PCI_VDEVICE(NVIDIA, 0x0ab8), board_ahci_mcp79 }, /* MCP79 */ + { PCI_VDEVICE(NVIDIA, 0x0ab9), board_ahci_mcp79 }, /* MCP79 */ + { PCI_VDEVICE(NVIDIA, 0x0aba), board_ahci_mcp79 }, /* MCP79 */ + { PCI_VDEVICE(NVIDIA, 0x0abb), board_ahci_mcp79 }, /* MCP79 */ + { PCI_VDEVICE(NVIDIA, 0x0abc), board_ahci_mcp79 }, /* MCP79 */ + { PCI_VDEVICE(NVIDIA, 0x0abd), board_ahci_mcp79 }, /* MCP79 */ + { PCI_VDEVICE(NVIDIA, 0x0abe), board_ahci_mcp79 }, /* MCP79 */ + { PCI_VDEVICE(NVIDIA, 0x0abf), board_ahci_mcp79 }, /* MCP79 */ + { PCI_VDEVICE(NVIDIA, 0x0d84), board_ahci_mcp89 }, /* MCP89 */ + { PCI_VDEVICE(NVIDIA, 0x0d85), board_ahci_mcp89 }, /* MCP89 */ + { PCI_VDEVICE(NVIDIA, 0x0d86), board_ahci_mcp89 }, /* MCP89 */ + { PCI_VDEVICE(NVIDIA, 0x0d87), board_ahci_mcp89 }, /* MCP89 */ + { PCI_VDEVICE(NVIDIA, 0x0d88), board_ahci_mcp89 }, /* MCP89 */ + { PCI_VDEVICE(NVIDIA, 0x0d89), board_ahci_mcp89 }, /* MCP89 */ + { PCI_VDEVICE(NVIDIA, 0x0d8a), board_ahci_mcp89 }, /* MCP89 */ + { PCI_VDEVICE(NVIDIA, 0x0d8b), board_ahci_mcp89 }, /* MCP89 */ + { PCI_VDEVICE(NVIDIA, 0x0d8c), board_ahci_mcp89 }, /* MCP89 */ + { PCI_VDEVICE(NVIDIA, 0x0d8d), board_ahci_mcp89 }, /* MCP89 */ + { PCI_VDEVICE(NVIDIA, 0x0d8e), board_ahci_mcp89 }, /* MCP89 */ + { PCI_VDEVICE(NVIDIA, 0x0d8f), board_ahci_mcp89 }, /* MCP89 *//* SiS */ { PCI_VDEVICE(SI, 0x1184), board_ahci }, /* SiS 966 */
PATCH 2/2 ahci: implement AHCI_HFLAG_NO_FPDMA_AA and update NV quirks
It turns out different generations of MCPs have differing quirks.
* MCP 65-73 : FPDMA AA broken, lies about PMP support, forgets to report NCQ
* MCP 77-79 : FPDMA AA broken, lies about PMP support
* MCP 89 : FPDMA AA broken
Instead of turngin off FPDMA AA on all NVIDIAs, implement HFLAG_NO_FPDMA_AA, define additional board IDs and apply necessary quirks.
This fixes bko#15481 and the list of quirks is verified by Peer Chen.
http://bugzilla.kernel.org/show_bug.cgi?id=15481
--- drivers/ata/ahci.c | 38 ++++++++++++++++++++++++++++---------- 1 file changed, 28 insertions(+), 10 deletions(-)
drivers/ata/ahci.c +28 -10
@@ -62,6 +62,8 @@ enum board_ids {/* board IDs for specific chipsets in alphabetical order */ board_ahci_mcp65, + board_ahci_mcp77, + board_ahci_mcp89, board_ahci_mv, board_ahci_sb600, board_ahci_sb700, /* for SB700 and SB800 */
@@ -71,9 +73,7 @@ enum board_ids { board_ahci_mcp_linux = board_ahci_mcp65, board_ahci_mcp67 = board_ahci_mcp65, board_ahci_mcp73 = board_ahci_mcp65, - board_ahci_mcp77 = board_ahci, - board_ahci_mcp79 = board_ahci, - board_ahci_mcp89 = board_ahci, + board_ahci_mcp79 = board_ahci_mcp77, };static int ahci_init_one (struct pci_dev *pdev,const struct pci_device_id *ent);
@@ -134,7 +134,24 @@ static const struct ata_port_info ahci_p /* by chipsets */ [board_ahci_mcp65] = { - AHCI_HFLAGS (AHCI_HFLAG_YES_NCQ), +AHCI_HFLAGS (AHCI_HFLAG_NO_FPDMA_AA |AHCI_HFLAG_NO_PMP | + AHCI_HFLAG_YES_NCQ), + .flags = AHCI_FLAG_COMMON, + .pio_mask = ATA_PIO4, + .udma_mask = ATA_UDMA6, + .port_ops = &ahci_ops, + }, + [board_ahci_mcp77] = + { + AHCI_HFLAGS (AHCI_HFLAG_NO_FPDMA_AA | AHCI_HFLAG_NO_PMP), + .flags = AHCI_FLAG_COMMON, + .pio_mask = ATA_PIO4, + .udma_mask = ATA_UDMA6, + .port_ops = &ahci_ops, + }, + [board_ahci_mcp89] = + { + AHCI_HFLAGS (AHCI_HFLAG_NO_FPDMA_AA), .flags = AHCI_FLAG_COMMON, .pio_mask = ATA_PIO4, .udma_mask = ATA_UDMA6,
@@ -1102,12 +1119,13 @@ static int ahci_init_one(struct pci_dev/* prepare host */ if (hpriv->cap &HOST_CAP_NCQ ) { pi.flags |=ATA_FLAG_NCQ ; -/* Auto-activate optimization is supposed to be supported on -all AHCI controllers indicating NCQ support, but it seems -to be broken at least on some NVIDIA MCP79 chipsets. -Until we get info on which NVIDIA chipsets don't have this -issue, if any, disable AA on all NVIDIA AHCIs. */ -if (pdev->vendor !=PCI_VENDOR_ID_NVIDIA ) +/* +* Auto-activate optimization is supposed to be +* supported on all AHCI controllers indicating NCQ +* capability, but it seems to be broken on some +* chipsets including NVIDIAs. +*/ +if (!(hpriv->flags &AHCI_HFLAG_NO_FPDMA_AA )) pi.flags |=ATA_FLAG_FPDMA_AA ; }
Re: [PATCH #upstream 2/2] ahci: implement AHCI_HFLAG_NO_FPDMA_AA and update NV quirks
Quoted 12 lines · Tejun Heo
It turns out different generations of MCPs have differing quirks.
* MCP 65-73 : FPDMA AA broken, lies about PMP support, forgets to report NCQ
* MCP 77-79 : FPDMA AA broken, lies about PMP support
* MCP 89 : FPDMA AA brokenInstead of turngin off FPDMA AA on all NVIDIAs, implement
HFLAG_NO_FPDMA_AA, define additional board IDs and apply necessary quirks.This fixes bko#15481 and the list of quirks is verified by Peer Chen.
Quoted 7 lines
http://bugzilla.kernel.org/show_bug.cgi?id=15481Signed-off-by Tejun Heo<[email protected]>Cc Peer Chen<[email protected]>--- drivers/ata/ahci.c | 38 ++++++++++++++++++++++++++++---------- 1 file changed, 28 insertions(+), 10 deletions(-)
ACK in theory, but NAK due to failed build:
drivers/ata/ahci.c:137: error: ‘AHCI_HFLAG_NO_FPDMA_AA’ undeclared here (not in a function) drivers/ata/ahci.c: In function ‘ahci_init_one’:drivers/ata/ahci.c:1128: error: invalid operands to binary & (have ‘unsigned int’ and ‘const struct ata_port_info *’)
PATCH RESEND 2/2 ahci: implement AHCI_HFLAG_NO_FPDMA_AA and update NV quirks
Subject: ahci: implement AHCI_HFLAG_NO_FPDMA_AA and update NV quirks
It turns out different generations of MCPs have differing quirks.
* MCP 65-73 : FPDMA AA broken, lies about PMP support, forgets to report NCQ
* MCP 77-79 : FPDMA AA broken, lies about PMP support
* MCP 89 : FPDMA AA broken
Instead of turngin off FPDMA AA on all NVIDIAs, implement HFLAG_NO_FPDMA_AA, define additional board IDs and apply necessary quirks.
This fixes bko#15481 and the list of quirks is verified by Peer Chen.
http://bugzilla.kernel.org/show_bug.cgi?id=15481
---
Crap, that was me doing quilt add include/linux/ahci.h instead of drivers/ata/ahci.h and not checking diffstats afterwards. Sorry about that. Here's the working version.
Thanks.
drivers/ata/ahci.c | 38 ++++++++++++++++++++++++++++---------- drivers/ata/ahci.h | 1 + 2 files changed, 29 insertions(+), 10 deletions(-)
drivers/ata/ahci.c +28 -10
@@ -62,6 +62,8 @@ enum board_ids {/* board IDs for specific chipsets in alphabetical order */ board_ahci_mcp65, + board_ahci_mcp77, + board_ahci_mcp89, board_ahci_mv, board_ahci_sb600, board_ahci_sb700, /* for SB700 and SB800 */
@@ -71,9 +73,7 @@ enum board_ids { board_ahci_mcp_linux = board_ahci_mcp65, board_ahci_mcp67 = board_ahci_mcp65, board_ahci_mcp73 = board_ahci_mcp65, - board_ahci_mcp77 = board_ahci, - board_ahci_mcp79 = board_ahci, - board_ahci_mcp89 = board_ahci, + board_ahci_mcp79 = board_ahci_mcp77, };static int ahci_init_one (struct pci_dev *pdev,const struct pci_device_id *ent);
@@ -134,7 +134,24 @@ static const struct ata_port_info ahci_p /* by chipsets */ [board_ahci_mcp65] = { - AHCI_HFLAGS (AHCI_HFLAG_YES_NCQ), +AHCI_HFLAGS (AHCI_HFLAG_NO_FPDMA_AA |AHCI_HFLAG_NO_PMP | + AHCI_HFLAG_YES_NCQ), + .flags = AHCI_FLAG_COMMON, + .pio_mask = ATA_PIO4, + .udma_mask = ATA_UDMA6, + .port_ops = &ahci_ops, + }, + [board_ahci_mcp77] = + { + AHCI_HFLAGS (AHCI_HFLAG_NO_FPDMA_AA | AHCI_HFLAG_NO_PMP), + .flags = AHCI_FLAG_COMMON, + .pio_mask = ATA_PIO4, + .udma_mask = ATA_UDMA6, + .port_ops = &ahci_ops, + }, + [board_ahci_mcp89] = + { + AHCI_HFLAGS (AHCI_HFLAG_NO_FPDMA_AA), .flags = AHCI_FLAG_COMMON, .pio_mask = ATA_PIO4, .udma_mask = ATA_UDMA6,
@@ -1102,12 +1119,13 @@ static int ahci_init_one(struct pci_dev/* prepare host */ if (hpriv->cap &HOST_CAP_NCQ ) { pi.flags |=ATA_FLAG_NCQ ; -/* Auto-activate optimization is supposed to be supported on -all AHCI controllers indicating NCQ support, but it seems -to be broken at least on some NVIDIA MCP79 chipsets. -Until we get info on which NVIDIA chipsets don't have this -issue, if any, disable AA on all NVIDIA AHCIs. */ -if (pdev->vendor !=PCI_VENDOR_ID_NVIDIA ) +/* +* Auto-activate optimization is supposed to be +* supported on all AHCI controllers indicating NCQ +* capability, but it seems to be broken on some +* chipsets including NVIDIAs. +*/ +if (!(hpriv->flags &AHCI_HFLAG_NO_FPDMA_AA )) pi.flags |=ATA_FLAG_FPDMA_AA ; }
drivers/ata/ahci.h +1 -0
@@ -208,6 +208,7 @@ enum {AHCI_HFLAG_SRST_TOUT_IS_OFFLINE = (1 <<11 ),/* treat SRST timeout as link offline */ AHCI_HFLAG_NO_SNTF = (1 <<12 ),/* no sntf */ + AHCI_HFLAG_NO_FPDMA_AA = (1 << 13), /* no FPDMA AA *//* ap->flags bits */
Jeff Garzik
AppliedRe: [PATCH #upstream RESEND 2/2] ahci: implement AHCI_HFLAG_NO_FPDMA_AA and update NV quirks
Quoted 16 lines · Tejun Heo
Subject: ahci: implement
AHCI_HFLAG_NO_FPDMA_AAand update NV quirksIt turns out different generations of MCPs have differing quirks.
* MCP 65-73 : FPDMA AA broken, lies about PMP support, forgets to report NCQ
* MCP 77-79 : FPDMA AA broken, lies about PMP support
* MCP 89 : FPDMA AA brokenInstead of turngin off FPDMA AA on all NVIDIAs, implement
HFLAG_NO_FPDMA_AA, define additional board IDs and apply necessary quirks.This fixes bko#15481 and the list of quirks is verified by Peer Chen.
http://bugzilla.kernel.org/show_bug.cgi?id=15481
Quoted 8 lines
Signed-off-by Tejun Heo<[email protected]>Cc Peer Chen<[email protected]>---
Crap, that was me doing quilt addinclude/linux/ahci.hinstead ofdrivers/ata/ahci.hand not checking diffstats afterwards. Sorry about that. Here's the working version.Thanks.
applied
Jeff Garzik
AppliedQuoted 19 lines · Tejun Heo
ahci over time has grown a number of board IDs and it's a bit of mess right now. Clean it up such that,
* board_id_* now live in a separate enum
board_idsand numbers are assigned automatically.* Board IDs assigned to features are separated from the ones assigned to specific implementations and both are ordered alphabetically.
* For NV MCPs, define per-generation alias
board_idsand assign matching aliases in the pci id table. This makesmcp_linux, 67-73 useboard_ahci_mcp65instead ofboard_ahci_yesncq. Both are identical in content.* Kill now unused
board_ahci_nopmpandboard_ahci_yesncq.This patch doesn't cause any functional change but will make future changes to
board_idsand quirks much less painful.
Quoted 7 lines
Signed-off-by Tejun Heo<[email protected]>Cc Peer Chen<[email protected]>---
Updated against the new #upstream. Thanks.drivers/ata/ahci.c | 237 ++++++++++++++++++++++++++--------------------------- 1 file changed, 117 insertions(+), 120 deletions(-)
applied