Query: ARM Cortex A9: Is invalidating L1 data cache mandatory before usage
Hello,
I am trying to port Linux on ARM Cortex A9 based platform and what I see is that if I don't invalidate the data cache before enabling and using it (in arch/arm/boot/compressed/head.S) the system crashes.
I need to do the same for second core before calling secondary_startup.
Is it normal? Why then other platforms (cortex A9 based) are not doing this. What am I missing?
thanks for your help.
regards
Shira
Quoted 7 lines
-----Original Message-----
From: linux-arm-kernel-bounces at lists.infradead.org [mailto:linux-arm-kernel- bounces at lists.infradead.org] On Behalf Of Shiraz HASHIM
Sent: Saturday, April 17, 2010 3:26 PM
To: linux-arm-kernel at lists.infradead.org
Subject: Query: ARM Cortex A9: Is invalidating L1 data cache mandatory before usage
Quoted 5 lines
Hello,
I am trying to port Linux on ARM Cortex A9 based platform and what I see is that if I don't invalidate the data cache before enabling and using it (in
arch/arm/boot/compressed/head.S) the system crashes.
Are you enabling $L1 D in your bootloader before jumping into the kernel??
Quoted 14 lines
I need to do the same for second core before calling
secondary_startup.Is it normal? Why then other platforms (cortex A9 based) are not doing this. What am I missing?
thanks for your help.
regards
Shira_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Hello Santosh,
Quoted 7 lines · Santosh
Quoted 7 lines
-----Original Message-----
From: linux-arm-kernel-bounces at lists.infradead.org [mailto:linux-arm-kernel- bounces at lists.infradead.org] On Behalf Of Shiraz HASHIM
Sent: Saturday, April 17, 2010 3:26 PM
To: linux-arm-kernel at lists.infradead.org
Subject: Query: ARM Cortex A9: Is invalidating L1 data cache mandatory before usage
Quoted 7 lines
Quoted 5 lines
Hello,
I am trying to port Linux on ARM Cortex A9 based platform and what I see is that if I don't invalidate the data cache before enabling and using it (in
arch/arm/boot/compressed/head.S) the system crashes.Are you enabling $L1 D in your bootloader before jumping into the kernel??
No. uboot is not enabling data cache. The first time it gets enabled is in head.S before Linux decompression.
Quoted 6 lines
Quoted 6 lines
I need to do the same for second core before calling
secondary_startup.Is it normal? Why then other platforms (cortex A9 based) are not doing this. What am I missing?
thanks for your help.
regards
Shiraz
Quoted 10 lines · Shiraz HASHIM
Hello,
I am trying to port Linux on ARM Cortex A9 based platform and what I see is that if I don't invalidate the data cache before enabling and using it (in
arch/arm/boot/compressed/head.S) the system crashes.I need to do the same for second core before calling
secondary_startup.Is it normal? Why then other platforms (cortex A9 based) are not doing this. What am I missing?
Yes, it's required. See:
Hello Russell,
Quoted 7 lines · Russell King - ARM Linux
Quoted 6 lines · Shiraz HASHIM
Hello,
I am trying to port Linux on ARM Cortex A9 based platform and what I see is that if I don't invalidate the data cache before enabling and using it (in
arch/arm/boot/compressed/head.S) the system crashes.
Quoted 8 lines
Quoted 4 lines
I need to do the same for second core before calling
secondary_startup.Is it normal? Why then other platforms (cortex A9 based) are not doing this. What am I missing?
Yes, it's required. ?See:
OK. So it means that the bootloader is expected to do this invalidation or cleanup,
and for secondary cpus we can do it before calling secondary_startup. Am I right ?
regards
Shiraz
Quoted 7 lines · Russell King - ARM Linux
Quoted 6 lines · Shiraz HASHIM
Hello,
I am trying to port Linux on ARM Cortex A9 based platform and what I see is that if I don't invalidate the data cache before enabling and using it (in
arch/arm/boot/compressed/head.S) the system crashes.
Quoted 8 lines
Quoted 4 lines
I need to do the same for second core before calling
secondary_startup.Is it normal? Why then other platforms (cortex A9 based) are not doing this. What am I missing?
Yes, it's required. ?See:
The only thing which is confusing me is that do we need to invalidate the data cache, even if it is disabled in bootloader.
regards
Shiraz
Quoted 14 lines · shiraz hashim
Quoted 12 lines · Russell King - ARM Linux
Quoted 10 lines · Shiraz HASHIM
Hello,
I am trying to port Linux on ARM Cortex A9 based platform and what I see is that if I don't invalidate the data cache before enabling and using it (in
arch/arm/boot/compressed/head.S) the system crashes.I need to do the same for second core before calling
secondary_startup.Is it normal? Why then other platforms (cortex A9 based) are not doing this. What am I missing?
Quoted 6 lines
Quoted 3 lines
Yes, it's required. ?See:
The only thing which is confusing me is that do we need to invalidate the data cache, even if it is disabled in bootloader.
If you don't, the cache will be in an undefined state when it is enabled, which in turn means that when you enable it, you don't know whether the instructions you're going to execute come from the cache or from the memory - and the two may be different.