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Change ARM Cache Type from Write-Back Cached Write Allocate to Write-Back, No Allocate

DISCUSSION Richard Liu 2 participants 2 messages Apr 19, 2010

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Based on ARM11 MPCore TRM r1p0
Page 5-16

At TLB table, TEX cache memory support 4 type cache types
1) Noncachabled
2) Write-Back cached Write Allocate, Buffered
3) Write-Through cached, No Allocate on Write, Buffered
4) Write-Back cached, No Allocate on Write, Buffered.

From ARM's information, if change the TEX type to Write-Through,
the L1 Cache would be "behavior is noncacheable"
I think we can disable L1/L2 cache to reach the same result.

If want to change the default setting from "Write-Back cached Write Allocate, Buffered" to "Write-Back cached, No Allocate on Write, Buffered". How to modify the build_mem_type_table in file mmu.c?
And should it need more patches on others part like L1 or L2 coherence function?

#1 lore raw
Quoted 13 lines · Richard Liu

Based on ARM11 MPCore TRM r1p0
Page 5-16

At TLB table, TEX cache memory support 4 type cache types
1) Noncachabled
2) Write-Back cached Write Allocate, Buffered
3) Write-Through cached, No Allocate on Write, Buffered
4) Write-Back cached, No Allocate on Write, Buffered.

From ARM's information, if change the TEX type to Write-Through, the L1 Cache would be "behavior is noncacheable"
I think we can disable L1/L2 cache to reach the same result.

Quoted 6 lines

If want to change the default setting from "Write-Back cached Write Allocate, Buffered" to "Write-Back cached, No Allocate on Write, Buffered".
How to modify the build_mem_type_table in file mmu.c?
And should it need more patches on others part like L1 or L2 coherence function?

MPCore hardware only supports write-back write-allocate or non-cacheable modes; so you can't change this.