ARM: S3C64XX: Add USB clock source frequency as driver data to s3c-hsotg
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PATCH 1/1 ARM: S3C64XX: Add USB clock source frequency as driver data to s3c-hsotg
The upcoming SmartQ machines use a different base clock frequency for the USB block, this patch allows passing it as platform data to the driver.
--- arch/arm/plat-samsung/include/plat/udc-hs.h | 8 ++++++++ drivers/usb/gadget/s3c-hsotg.c | 1 + 2 files changed, 9 insertions(+), 0 deletions(-)
arch/arm/plat-samsung/include/plat/udc-hs.h +8 -0
@@ -18,12 +18,20 @@ enum s3c_hsotg_dmamode { S3C_HSOTG_DMA_DRV, /* DMA is chosen by driver */ }; +enum s3c_hsotg_clkfreq { +S3C_HSOTG_CLKFREQ_48MHZ =0 , +S3C_HSOTG_CLKFREQ_12MHZ =2 , +S3C_HSOTG_CLKFREQ_24MHZ =3 , +}; +/** * struct s3c_hsotg_plat - platform data for high-speed otg/udc * @dma: Whether to use DMA or not. * @is_osc: The clock source is an oscillator, not a crystal +* @clk_sel: Frequency of the clock source */ struct s3c_hsotg_plat {enum s3c_hsotg_dmamode dma;unsigned int is_osc :1 ; +enum s3c_hsotg_clkfreq clk_sel; };
drivers/usb/gadget/s3c-hsotg.c +1 -0
@@ -2705,6 +2705,7 @@ static void s3c_hsotg_otgreset(struct s3c_hsotg *hsotg)mdelay (1 ); osc = hsotg->plat->is_osc ?S3C_PHYCLK_EXT_OSC :0 ; + osc |= hsotg->plat->clk_sel;writel (osc |0x10 ,S3C_PHYCLK );
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1.7.1
PATCH 1/1 ARM: S3C64XX: Add USB clock source frequency as driver data to s3c-hsotg
Quoted 3 lines · Maurus Cuelenaere
The upcoming SmartQ machines use a different base clock frequency for the USB block, this patch allows passing it as platform data to the driver.
When I merge thomas' patch for addign a clock for this crystal, it might be worth changing the driver to get this and see what rate the clock is at by that method.
Will hold off on this patch, also going to do some woth on the hsotg driver anyway, since it could really do with some work on DMA support and some debugging.
Quoted 51 lines
Signed-off-by Maurus Cuelenaere <[email protected]>--- arch/arm/plat-samsung/include/plat/udc-hs.h | 8 ++++++++ drivers/usb/gadget/s3c-hsotg.c | 1 + 2 files changed, 9 insertions(+), 0 deletions(-)arch/arm/plat-samsung/include/plat/udc-hs.h +8
-0@@ -18,12 +18,20 @@ enum s3c_hsotg_dmamode { S3C_HSOTG_DMA_DRV, /* DMA is chosen by driver */ }; +enum s3c_hsotg_clkfreq { +S3C_HSOTG_CLKFREQ_48MHZ =0 , +S3C_HSOTG_CLKFREQ_12MHZ =2 , +S3C_HSOTG_CLKFREQ_24MHZ =3 , +}; +/** * struct s3c_hsotg_plat - platform data for high-speed otg/udc * @dma: Whether to use DMA or not. * @is_osc: The clock source is an oscillator, not a crystal +* @clk_sel: Frequency of the clock source */ struct s3c_hsotg_plat {enum s3c_hsotg_dmamode dma;unsigned int is_osc :1 ; +enum s3c_hsotg_clkfreq clk_sel; };drivers/usb/gadget/s3c-hsotg.c +1
-0@@ -2705,6 +2705,7 @@ static void s3c_hsotg_otgreset(struct s3c_hsotg *hsotg)mdelay (1 ); osc = hsotg->plat->is_osc ?S3C_PHYCLK_EXT_OSC :0 ; + osc |= hsotg->plat->clk_sel;writel (osc |0x10 ,S3C_PHYCLK );Signature · 7 lines
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PATCH 1/1 ARM: S3C64XX: Add USB clock source frequency as driver data to s3c-hsotg
Op 06-05-10 03:26, Ben Dooks schreef:
Quoted 10 lines · Maurus Cuelenaere
Quoted 5 lines
The upcoming SmartQ machines use a different base clock frequency for the USB block, this patch allows passing it as platform data to the driver.
When I merge thomas' patch for addign a clock for this crystal, it might be worth changing the driver to get this and see what rate the clock is at by that method.
Do you mean [PATCH] ARM: S5P: Add USB External Crystal clock definition? Other then that I can't really find any USB clock related patches.
Quoted 4 lines
Will hold off on this patch, also going to do some woth on the hsotg driver anyway, since it could really do with some work on DMA support and some debugging.
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Maurus Cuelenaere