Automatic S1 sleep

I have been looking into the possibility of having the system automatically enter and exit S1 to save power when idle, but actively in use. For instance, while you are only browsing the web on your laptop, your eyes spend 15 seconds scanning the page while the system is otherwise, doing nothing but wait for your next input. It would be nice if it could seamlessly enter S1 during this time to save power, and exit when you press a key, move the mouse, or receive a message on IRC.

Unlike S3, S1 keeps the Vcc power plane on and all devices remain in D0 or D1, so the screen remains on and visible, so it should be possible to use this state transparently without the user even being aware of it. Since everything remains on, no hardware needs reinitialized when resuming from S1. Here seems to be a problem with the current kernel code:

It seems that the generic pm core code defined the PM_EVENT_SUSPEND state with S3 in mind, and so hardware drivers are notified of PM_EVENT_SUSPEND and reinitialized when resuming, assuming that the hardware lost power. When using acpi S1, this reinitialization activity is not required and should not be done, so it seems that S1 should not generate PM_EVENT_SUSPEND and PM_EVENT_RESUME events.

Does anyone have any thoughts on my conclusion or advice on how to trigger S1 without generating PM_EVENT_SUSPEND?

You'll need wakeup events on mouse, keyboard, network packets and so on. Some of these are possible, some aren't really.

Just have suspend_devices_and_enter conditionalise the device suspend on whether or not it's PM_SUSPEND_STANDBY.

Matthew Garrett | [email protected]

On some systems, yes, but generally these are widely possible. Last night I experimented with S1 on my desktop pc and after using ethtool to enable wake on lan, the system slept for several seconds, then woke up when someone spoke on IRC, causing a packet to hit the NIC. Another machine I have here has an Intel e100 series NIC and it appears that the driver for it only supports wake on magic packet, though I checked the Intel specs on the chip and it is capable of the other wol modes.

Ahh, that looks like the place. Is there a reason why it does not already do that?

Also Documentation/power/states.txt says that S1 puts devices that support it into D1. I would think the code to do that would be here in suspend_devices_and_enter() but I don't see it. Do you know where that is? I checked and my ATI Radeon video card supports D1 and D2 so could potentially save a good bit of power by using these states.

The exact meaning of PM_STANDBY_SUSPEND isn't defined. The sanest approach might be to add a callback in the platform_suspend_ops structure, pass the sleep state to that and then use that to decide whether or not devices need to sleep.

Putting a video card into D1 is either going to turn off the output or do nothing, so I don't think that's terribly compatible with what you want here. But to answer your question, the PCI core will decide what state to put devices in based on the sleep type provided.

Matthew Garrett | [email protected]

Sounds reasonable. Maybe I'll take a crack at writing a patch to do that.

Actually after looking at some ATI specs it seems that there are several configuration options of exactly what should be powered down in D1 and D2 but the DAC output did not seem to be one of them. It seems to be intended to do things like stop the GPU clocks but otherwise leave the display on. I assumed that the card was in D1 last night while the system was in S1, and the display remained visible. If D1 does stop the DVI output then it must not have been set to D1.

How does the PCI core get called when changing state? I would think it would be when suspend_devices_and_enter() calls dpm_suspend_start(PMESG_SUSPEND) but that does not differentiate between S1 and S3, so I would think that currently it would result in placing the device in D3, and that if I remove the PMESG_SUSPEND for PM_SUSPEND_STANDBY that it would result in leaving devices in D0.

The more I have looked at it the more I think that D1 is NOT used the way Documentation/power/states.txt says. It looks to me that the way it works now is that the PM_EVENT_SUSPEND message is sent to the drivers by dpm_suspend_start(), and it is up to each individual driver to call pci_set_power_state() passing it the value returned by pci_choose_state(). This ends up calling acpi_pci_choose_state() which calls acpi_pm_device_sleep_state() which consults the ACPI tables to find out the highest D state the device can wake the system in, if the device is set to wake up the system. Otherwise it just returns D3.

In the case of the video card, it is not and can not be set to wakeup the system, so it should end up using D3.

If suspend_devices_and_enter() is modified NOT to call dpm_suspend_start(PMESG_SUSPEND) for PM_SUSPEND_STANDBY, then the drivers would never call into the pci core to set the power state of the device, so they would remain in D0.

So it seems that what is needed is a PMESG_SUSPEND_STANDBY to cause the drivers to call pci_set_power_state() and acpi_choose_state() needs modified to either use D1 if the device supports it, or D0 otherwise when switching to S1.

Either that or have suspend_devices_and_enter() skip the PMESG_SUSPEND and instead call into the pci core to walk all devices on the bus and set them to D1 if they support it without the knowledge of the controlling driver.

I'm not aware of any ACPI systems that can keep the display enabled when in S1 (or S3). If you've been able to get into this state, I'd like to know more about it.

Please measure the power difference between S0 and S1 -- don't assume that S1 consumes less power than S0. Also, note that the latency difference between S1 and S3 may effectively be 0.

cheers
-Len Brown, Intel Open Source Technology Center

If it is a laptop I would imagine that S1 would power down the display, but on my desktop the display remains visible during S1, though I would not expect that while the video card is in D3Hot as I believe it is. I did pull out my trusty Kill-a-watt last night and measure the load and it remained 120 watts both idle ( no C states, but cpufreq downclocked to 1 GHz and rotating disks spun down with hdparm -y ) and in S1.

I also tried using setpci to force the video card into D1 and did not see any change in load, though at 120 watts, I may be hitting the lower efficiency bound of my PSU, so it may have saved a watt and it just didn't make it past the psu to the Kill-a-watt to be measured. Also as I mentioned before, there seem to be control registers in the radeon that the bios is supposed to configure for what power saving options are wanted in D1 and D2, so it is possible that since this is a desktop, it may not be set up to save much power.

There currently is not much difference in latency between S1 and S3, but I believe that this is more the fault of the kernel, since when it resumes from S1 it still does full device reinitialization just like it does for S3, when most devices do not require that to come out of D3Hot, and indeed, devices that do not support the power management capability remain in D0 for S1. A good chunk of the time spent suspending and resuming was being spent waiting for disks to spin down/up, but I put a stop to that by changing the scsi_disk's manage_start_stop entry in sysfs from 1 to 0. After that total time to resume from S1 was around 500ms. I believe that if the display did not get blanked and redrawn and other unnecessary hardware reinitialization was not done, S1 resume could take as little as 10-50ms.

Yep, that is why nobody uses S1.

S1 often combines the the worst of both worlds:
the high power consumption of S0 plus the unavailability of S3.

PCI power states are a blunt instrument for comlicated graphics cards, which really should be power managed via the native hardware drivers, which know about all the internal hardware modes and sub-states.

Possibly, but staying in S0 would be 0ms and would use the same power:-)

We've been poking at making resume quicker in Linux over the last few years, but progress has been slow since the much higher priority is stability and applicability on a broad range of systems.

I think you'll see quicker deep idle states -- but they'll be states folded into cpuidle rather than system-wide states like S1.

cheers,
Len Brown, Intel Open Soruce Technology Center

Unfortunately I'm getting the feeling that the PCI power states are really unimplemented, even when they claim to be, for this sort of reason. So far I have yet to find a device that uses any less power when I place it in any D state other than D0.

The datasheet for this Intel e100 series NIC in one machine I have says that D1 should save some power while remaining active, and D2 should power down the PHY and loose link, but no matter which state I put it in, even D3, it still continues to transmit and receive packets just fine.

My new Dell Vostro v13 laptop has a realtek gigabit ethernet and the wifi adapter behave the same; no power saved even when put in D1-D3.

Yes, I've spent the last few days looking into making sure other devices are in low power states and that the cpu is in its deepest sleep state on my new laptop. I've been pouring over the Intel datasheets to see if the Celeron ULV 1.3 GHz cpu is capable of more than the C1 and C2 states that the bios acpi tables export. From what I can tell, the cpu supports 3 C states and my bios simply skips C2 since it is essentially the same as C1, and according to powertop, spends most of its time in MWAIT(C3). It appears that the chipset is capable of deeper sleep states that also lower the voltage below what it normally can operate at, even to the point that the L2 cache must be invalidated, but I think that this requires support from the cpu, rather than something that the chipset can do on its own. Specifically I think that the cpu needs to execute the proper MWAIT instruction to send a message on the MSI bus telling the chipset it is going into the deeper state, and alter the output on its vid pins to lower the core voltage, and it seems this particular cpu does not support that.