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NUC900: patch for implement clk_get_rate

PATCH In review Wan ZongShun 2 participants 2 messages Jun 15, 2010 – Jul 15, 2010

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#0 lore raw

PATCH 1/1 NUC900: patch for implement clk_get_rate

According to Baruch's advice, I re-orgnize previous patch named 'Add platform support for nuc900 i2c driver'.

This patch is for implementing clk_get_rate, there are four clk rates were needed to get, cpufreq,ahb,apb and external crystal. clk_get_rate return value is for external crystal.

---
 arch/arm/mach-w90x900/clock.c |    9 +++++++
 arch/arm/mach-w90x900/clock.h |    5 ++++
 arch/arm/mach-w90x900/cpu.c   |   50 +++++++++++++++++++++++++++++++++++++++++
 3 files changed, 64 insertions(+), 0 deletions(-)
arch/arm/mach-w90x900/clock.c +9 -0
index 2c371ff..6325642 100644
@@ -57,6 +57,15 @@ EXPORT_SYMBOL(clk_disable);
 
 unsigned long clk_get_rate(struct clk *clk)
 {
+	unsigned long flags, ret;
+
+	if (clk == NULL || IS_ERR(clk))
+		return -EPERM;
+	spin_lock_irqsave(&clocks_lock, flags);
+	ret = nuc900_get_cpuclock(&clk->cpufreq, &clk->ahbfreq, &clk->apbfreq);
+	spin_unlock_irqrestore(&clocks_lock, flags);
+	if (ret)
+		return ret;
 	return 15000000;
 }
 EXPORT_SYMBOL(clk_get_rate);
arch/arm/mach-w90x900/clock.h +5 -0
index c56ddab..af8e04c 100644
@@ -14,10 +14,15 @@
 
 void nuc900_clk_enable(struct clk *clk, int enable);
 void nuc900_subclk_enable(struct clk *clk, int enable);
+int nuc900_get_cpuclock(unsigned int *cpuclk_khz,
+			unsigned int *ahbclk_khz, unsigned int *apbclk_khz);
 
 struct clk {
 	unsigned long		cken;
 	unsigned int		enabled;
+	unsigned int		cpufreq;
+	unsigned int		ahbfreq;
+	unsigned int		apbfreq;
 	void			(*enable)(struct clk *, int enable);
 };
 
arch/arm/mach-w90x900/cpu.c +50 -0

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Signature · 1 line
1.6.3.3
#1 lore raw
Quoted 18 lines · Wan ZongShun

According to Baruch's advice, I re-orgnize previous patch named 'Add platform support for nuc900 i2c driver'.

This patch is for implementing clk_get_rate, there are four clk rates were needed to get, cpufreq,ahb,apb and external crystal. clk_get_rate return value is for external crystal.

---
 arch/arm/mach-w90x900/clock.c |    9 +++++++
 arch/arm/mach-w90x900/clock.h |    5 ++++
 arch/arm/mach-w90x900/cpu.c   |   50 +++++++++++++++++++++++++++++++++++++++++
 3 files changed, 64 insertions(+), 0 deletions(-)
arch/arm/mach-w90x900/clock.c +0 -0
index 2c371ff..6325642 100644

arch/arm/mach-w90x900/clock.c EXPORT_SYMBOL(clk_disable); · line 63

Quoted 7 lines
arch/arm/mach-w90x900/clock.c +4 -0
@@ -57,6 +57,15 @@ EXPORT_SYMBOL(clk_disable);
 
 unsigned long clk_get_rate(struct clk *clk)
 {
+	unsigned long flags, ret;
+
+	if (clk == NULL || IS_ERR(clk))
+		return -EPERM;

Is there a reason to check for these cases?

arch/arm/mach-w90x900/clock.c EXPORT_SYMBOL(clk_disable); · line 68

Quoted 5 lines
arch/arm/mach-w90x900/clock.c +5 -0
+	spin_lock_irqsave(&clocks_lock, flags);
+	ret = nuc900_get_cpuclock(&clk->cpufreq, &clk->ahbfreq, &clk->apbfreq);
+	spin_unlock_irqrestore(&clocks_lock, flags);
+	if (ret)
+		return ret;

Hmm, I don't follow this - and it doesn't seem to sit with the clk API model at all well. cpufreq/ahbfreq/apbfreq seem to only ever be written, but never read. I'm not sure either why every struct clk has to have these - they seem to be separate clocks unrelated to the struct clk that's being dealt with.

Wouldn't it make more sense to have these three as separate struct clks?

The other issue is that we're introducing an "apb_pclk" for all primecells using drivers/amba/bus.c in order to support SoCs which gate the APB pclk signal to individual primecells. It sounds like this clock would be the natural owner what you call 'apbfreq' in your patch.