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arm, arm1136: all arm1136 boards converted to new relocation

RFC PATCH New Heiko Schocher 1 participant 1 message Jul 29, 2010

Subsystems (2)
Arm i.MX and Layerscape Arm/actions semi architecture
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Heiko Schocher

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RFC PATCH 5/19 arm, arm1136: all arm1136 boards converted to new relocation

Signed-off-by Heiko Schocher <[email protected]>
---
 board/apollon/apollon.c                      |   13 +++++++++++--
 board/armltd/integrator/integrator.c         |   14 ++++++++++----
 board/armltd/integrator/lowlevel_init.S      |    2 +-
 board/freescale/mx31ads/config.mk            |    2 +-
 board/freescale/mx31ads/mx31ads.c            |   10 ++++++++--
 board/freescale/mx31ads/u-boot.lds           |   14 +++++++++++++-
 board/freescale/mx31pdk/mx31pdk.c            |   11 +++++++++--
 board/imx31_phycore/config.mk                |    2 +-
 board/imx31_phycore/imx31_phycore.c          |   10 ++++++++--
 board/logicpd/imx31_litekit/config.mk        |    2 +-
 board/logicpd/imx31_litekit/imx31_litekit.c  |   11 +++++++++--
 board/ti/omap2420h4/config.mk                |    6 +++++-
 board/ti/omap2420h4/omap2420h4.c             |   18 ++++++++++++++++--
 include/configs/apollon.h                    |    7 +++++++
 include/configs/imx31_litekit.h              |    7 +++++++
 include/configs/imx31_phycore.h              |    9 +++++++++
 include/configs/integratorcp.h               |    6 ++++++
 include/configs/mx31ads.h                    |    7 +++++++
 include/configs/mx31pdk.h                    |    7 +++++++
 include/configs/omap2420h4.h                 |    7 +++++++
 include/configs/qong.h                       |    2 +-
 nand_spl/board/freescale/mx31pdk/u-boot.lds  |   14 +++++++++++++-
 onenand_ipl/board/apollon/apollon.c          |   23 +++++++++++++++++++++++
 onenand_ipl/board/apollon/u-boot.onenand.lds |   15 ++++++++++++++-
 24 files changed, 194 insertions(+), 25 deletions(-)
board/apollon/apollon.c +11 -2
index 4768f58..5addc55 100644
@@ -202,6 +202,17 @@ int dram_init(void)
 
 	size0 = get_sdr_cs_size(SDRC_CS0_OSET);
 	size1 = get_sdr_cs_size(SDRC_CS1_OSET);
+	/* dram_init must store complete ramsize in gd->ram_size */
+	gd->ram_size = size0 + size1;
+	return 0;
+}
+
+void dram_init_banksize (void)
+{
+	unsigned int size0 = 0, size1 = 0;
+
+	size0 = get_sdr_cs_size(SDRC_CS0_OSET);
+	size1 = get_sdr_cs_size(SDRC_CS1_OSET);
 
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = size0;

@@ -209,8 +220,6 @@ int dram_init(void)
 	gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + size0;
 	gd->bd->bi_dram[1].size = size1;
 #endif
-
-	return 0;
 }
 
 /**********************************************************
board/armltd/integrator/integrator.c +10 -4
index 9bb56b5..d0a70b6 100644
@@ -92,9 +92,6 @@ int misc_init_r (void)
 ******************************/
 int dram_init (void)
 {
-	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-	gd->bd->bi_dram[0].size	 = PHYS_SDRAM_1_SIZE;
-
 #ifdef CONFIG_CM_SPD_DETECT
 	{
 extern void dram_query(void);

@@ -117,14 +114,23 @@ extern void dram_query(void);
 	 *
 	 */
 	sdram_shift		 = ((cm_reg_sdram & 0x0000001C)/4)%4;
-	gd->bd->bi_dram[0].size	 = 0x01000000 << sdram_shift;
+	gd->ram_size = 0x01000000 << sdram_shift;
 
 	}
+#else
+	/* dram_init must store complete ramsize in gd->ram_size */
+	gd->ram_size = PHYS_SDRAM_1_SIZE;
 #endif /* CM_SPD_DETECT */
 
 	return 0;
 }
 
+void dram_init_banksize (void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size =  gd->ram_size;
+}
+
 #ifdef CONFIG_CMD_NET
 int board_eth_init(bd_t *bis)
 {
board/armltd/integrator/lowlevel_init.S +1 -1
index ab9589c..6f55bb5 100644
@@ -199,7 +199,7 @@ cm_remap:
 
 	/* Now 0x00000000 is writeable, replace the vectors	*/
 	ldr	r0, =_start	/* r0 <- start of vectors	*/
-	ldr	r2, =_armboot_start	/* r2 <- past vectors	*/
+	ldr	r2, =_TEXT_BASE	/* r2 <- past vectors	*/
 	sub	r1,r1,r1		/* destination 0x00000000	*/
 
 copy_vec:
board/freescale/mx31ads/config.mk +1 -1
index 7ec0fe2..c2a2ff1 100644
@@ -1,3 +1,3 @@
-TEXT_BASE = 0x87f00000
+TEXT_BASE = 0xa0000000
 
 LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds
board/freescale/mx31ads/mx31ads.c +8 -2
index bc25c6d..57a2807 100644
@@ -30,10 +30,16 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int dram_init (void)
 {
+	/* dram_init must store complete ramsize in gd->ram_size */
+	gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM_1,
+				PHYS_SDRAM_1_SIZE);
+	return 0;
+}
+
+void dram_init_banksize (void)
+{
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
-	return 0;
 }
 
 int board_init (void)
board/freescale/mx31ads/u-boot.lds +13 -1
index 2731294..201fd4f 100644
@@ -53,11 +53,23 @@ SECTIONS
 	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
 
 	. = ALIGN(4);
-	.data : { *(.data) }
+	.data : {
+		*(.data)
+	__datarel_start = .;
+		*(.data.rel)
+	__datarelrolocal_start = .;
+		*(.data.rel.ro.local)
+	__datarellocal_start = .;
+		*(.data.rel.local)
+	__datarelro_start = .;
+		*(.data.rel.ro)
+	}
 
+	__got_start = .;
 	. = ALIGN(4);
 	.got : { *(.got) }
 
+	__got_end = .;
 	. = .;
 	__u_boot_cmd_start = .;
 	.u_boot_cmd : { *(.u_boot_cmd) }
board/freescale/mx31pdk/mx31pdk.c +9 -2
index 9f47169..e376d3f 100644
@@ -33,12 +33,19 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int dram_init(void)
 {
-	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+	/* dram_init must store complete ramsize in gd->ram_size */
+	gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM_1,
+				PHYS_SDRAM_1_SIZE);
 
 	return 0;
 }
 
+void dram_init_banksize (void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
 int board_init(void)
 {
 	/* CS5: CPLD incl. network controller */
board/imx31_phycore/config.mk +1 -1
index d34dc02..a12c182 100644
@@ -1 +1 @@
-TEXT_BASE = 0x87f00000
+TEXT_BASE = 0xa0000000
board/imx31_phycore/imx31_phycore.c +8 -2
index 3d7b7f7..f663c68 100644
@@ -32,10 +32,16 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int dram_init (void)
 {
+	/* dram_init must store complete ramsize in gd->ram_size */
+	gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM_1,
+				PHYS_SDRAM_1_SIZE);
+	return 0;
+}
+
+void dram_init_banksize (void)
+{
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
-	return 0;
 }
 
 int board_init (void)
board/logicpd/imx31_litekit/config.mk +1 -1
index d34dc02..a12c182 100644
@@ -1 +1 @@
-TEXT_BASE = 0x87f00000
+TEXT_BASE = 0xa0000000
board/logicpd/imx31_litekit/imx31_litekit.c +9 -2
index 2ac622d..2cfb846 100644
@@ -31,12 +31,19 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int dram_init (void)
 {
-	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+	/* dram_init must store complete ramsize in gd->ram_size */
+	gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM_1,
+				PHYS_SDRAM_1_SIZE);
 
 	return 0;
 }
 
+void dram_init_banksize (void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
 int board_init (void)
 {
 	__REG(CSCR_U(0)) = 0x0000cf03; /* CS0: Nor Flash */
board/ti/omap2420h4/config.mk +5 -1
index 3edcde0..3d974b2 100644
@@ -12,9 +12,13 @@
 # A000/0000 (bank1) ES2 will be configurable
 # Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
 # (mem base + reserved)
+# with relocation select flash base
+# H4_CS0_BASE
+TEXT_BASE = 0x08000000
+# TEXT_BASE = 0x04000000
 
 # For use with external or internal boots.
-TEXT_BASE = 0x80e80000
+#TEXT_BASE = 0x80e80000
 
 # Used with full SRAM boot.
 # This is either with a GP system or a signed boot image.
board/ti/omap2420h4/omap2420h4.c +16 -2
index 1c98e1b..dec1d05 100644
@@ -218,6 +218,22 @@ int dram_init (void)
 	size0 = get_sdr_cs_size(SDRC_CS0_OSET);
 	size1 = get_sdr_cs_size(SDRC_CS1_OSET);
 
+	/* dram_init must store complete ramsize in gd->ram_size */
+	/* here just size0, because ram is not continuos, right? */
+	gd->ram_size = size0;
+
+	return 0;
+}
+
+void dram_init_banksize (void)
+{
+	unsigned int size0 = 0, size1 = 0;
+	u32 rev;
+
+	rev = get_cpu_rev();
+	size0 = get_sdr_cs_size(SDRC_CS0_OSET);
+	size1 = get_sdr_cs_size(SDRC_CS1_OSET);
+
 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
 	gd->bd->bi_dram[0].size = size0;
 	if(rev == CPU_2420_2422_ES1) /* ES1's 128MB remap granularity isn't worth doing */

@@ -225,8 +241,6 @@ int dram_init (void)
 	else /* ES2 and above can remap at 32MB granularity */
 		gd->bd->bi_dram[1].start = PHYS_SDRAM_1+size0;
 	gd->bd->bi_dram[1].size = size1;
-
-	return 0;
 }
 
 /**********************************************************
include/configs/apollon.h +7 -0
index c1295de..30c6c86 100644
@@ -268,4 +268,11 @@
 					"-(ubifs)"
 #endif
 
+/* additions for new relocation code, must added to all boards */
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR	(PHYS_SDRAM_1) /* Fix this */
+#define CONFIG_SYS_INIT_RAM_END		(0x2000)
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
+
 #endif /* __CONFIG_H */
include/configs/imx31_litekit.h +7 -0
index 4904856..dfe6552 100644
@@ -187,4 +187,11 @@
 #define CONFIG_SYS_NAND_BASE		NFC_BASE_ADDR
 #define CONFIG_MXC_NAND_HWECC
 
+/* additions for new relocation code, must added to all boards */
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_END		IRAM_SIZE
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
+
 #endif /* __CONFIG_H */
include/configs/imx31_phycore.h +9 -0
index 1dbafa0..404e317 100644
@@ -28,6 +28,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <asm/arch/mx31-regs.h>
+
  /* High Level Configuration Options */
 #define CONFIG_ARM1136		1    /* This is an arm1136 CPU core */
 #define CONFIG_MX31		1    /* in a mx31 */

@@ -202,4 +204,11 @@
 #define CONFIG_CMD_BMP				1
 #endif
 
+/* additions for new relocation code, must added to all boards */
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_END		IRAM_SIZE
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
+
 #endif /* __CONFIG_H */
include/configs/integratorcp.h +6 -0
index caafc93..acccfb2 100644
@@ -252,5 +252,11 @@ SIB at Block62 End Block62 address 0x24f80000
  * In that case comment out the line below.
 #undef	CONFIG_CM_INIT
  */
+/* additions for new relocation code, must added to all boards */
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR	PHYS_SDRAM_1	/* Fix this */
+#define CONFIG_SYS_INIT_RAM_END		(0x2000)
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
 
 #endif /* __CONFIG_H */
include/configs/mx31ads.h +7 -0
index dedecd7..8f6008c 100644
@@ -200,4 +200,11 @@
 #undef CONFIG_CMD_MTDPARTS
 #define CONFIG_JFFS2_DEV	"nor0"
 
+/* additions for new relocation code, must added to all boards */
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_END		IRAM_SIZE
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
+
 #endif /* __CONFIG_H */
include/configs/mx31pdk.h +7 -0
index 0414cc3..8ae1a61 100644
@@ -215,4 +215,11 @@
 #define ESDCTL_LOADMODEREG	(ESDCTL_ROW_COL | ESDCTL_CMD_LOADMODEREG)
 #define ESDCTL_RW		ESDCTL_SETTINGS
 
+/* additions for new relocation code, must added to all boards */
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_END		IRAM_SIZE
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
+
 #endif /* __CONFIG_H */
include/configs/omap2420h4.h +7 -0
index 47437b0..f7ee27c 100644
@@ -270,4 +270,11 @@
 #define MTDPARTS_DEFAULT	"mtdparts=omap2420-1:-(jffs2)"
 */
 
+/* additions for new relocation code, must added to all boards */
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR	PHYS_SDRAM_1	/* Fix this */
+#define CONFIG_SYS_INIT_RAM_END		(0x2000)
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
+
 #endif							/* __CONFIG_H */
include/configs/qong.h +1 -1
index 0d6718c..00b6001 100644
@@ -282,7 +282,7 @@ extern int qong_nand_rdy(void *chip);
 	"128k(env2),2432k(kernel),13m(ramdisk),-(user)"
 
 /* additions for new relocation code, must added to all boards */
-#define CONFIG_SYS_SDRAM_BASE	0x80000000
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
 #define CONFIG_SYS_INIT_RAM_END		IRAM_SIZE
 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
nand_spl/board/freescale/mx31pdk/u-boot.lds +13 -1
index edd8430..ed64119 100644
@@ -19,11 +19,23 @@ SECTIONS
 	.rodata : { *(.rodata) }
 
 	. = ALIGN(4);
-	.data : { *(.data) }
+	.data : {
+		*(.data)
+	__datarel_start = .;
+		*(.data.rel)
+	__datarelrolocal_start = .;
+		*(.data.rel.ro.local)
+	__datarellocal_start = .;
+		*(.data.rel.local)
+	__datarelro_start = .;
+		*(.data.rel.ro)
+	}
 
+	__got_start = .;
 	. = ALIGN(4);
 	.got : { *(.got) }
 
+	__got_end = .;
 	. = .;
 	__u_boot_cmd_start = .;
 	.u_boot_cmd : { *(.u_boot_cmd) }
onenand_ipl/board/apollon/apollon.c +23 -0
index 4936e00..a8663ed 100644
@@ -28,6 +28,29 @@ do {                                                                    \
 	writeb(value, reg);                                             \
 } while (0)
 
+#if defined(CONFIG_ENV_IS_EMBEDDED)
+#define TOTAL_MALLOC_LEN	CONFIG_SYS_MALLOC_LEN
+#elif ( ((CONFIG_ENV_ADDR+CONFIG_ENV_SIZE) < CONFIG_SYS_MONITOR_BASE) || \
+	(CONFIG_ENV_ADDR >= (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)) ) || \
+      defined(CONFIG_ENV_IS_IN_NVRAM)
+#define	TOTAL_MALLOC_LEN	(CONFIG_SYS_MALLOC_LEN + CONFIG_ENV_SIZE)
+#else
+#define	TOTAL_MALLOC_LEN	CONFIG_SYS_MALLOC_LEN
+#endif
+
+void board_init_f (ulong bootflag)
+{
+	ulong addr, addr_sp;
+	gd_t *id;
+
+	addr = TEXT_BASE;
+	/* Pointer is writable since we allocated a register for it */
+	id = (gd_t *) (CONFIG_SYS_INIT_SP_ADDR);
+	addr_sp = addr - TOTAL_MALLOC_LEN;
+
+	relocate_code (addr_sp, id, addr);
+}
+
 /*****************************************
  * Routine: board_init
  * Description: Early hardware init.
onenand_ipl/board/apollon/u-boot.onenand.lds +14 -1
index 0960c12..26e2d6a 100644
@@ -41,11 +41,24 @@ SECTIONS
 	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
 
 	. = ALIGN(4);
-	.data : { *(.data) }
+	.data : {
+		*(.data)
+	__datarel_start = .;
+		*(.data.rel)
+	__datarelrolocal_start = .;
+		*(.data.rel.ro.local)
+	__datarellocal_start = .;
+		*(.data.rel.local)
+	__datarelro_start = .;
+		*(.data.rel.ro)
+	}
+
 
+	__got_start = .;
 	. = ALIGN(4);
 	.got : { *(.got) }
 
+	__got_end = .;
 	. = ALIGN(4);
 	__bss_start = .;
 	.bss : { *(.bss) . = ALIGN(4); }
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