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ARM: implement relocation for ARM V7 (OMAP)

PATCH New Heiko Schocher 1 participant 1 message Aug 11, 2010 Arm (32-bit)

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Heiko Schocher

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PATCH 14/26 ARM: implement relocation for ARM V7 (OMAP)

Change the implementation for ARM V7 to relocate the code to an arbitrary address in RAM.

Adapt the Beagle board (Cortex A8) to test the changes.

Signed-off-by Heiko Schocher <[email protected]>

---
- changes since v1:
- removed converted but not tested boards
- add CONFIG_SYS_ARM_WITHOUT_RELOC

 arch/arm/cpu/armv7/mx51/u-boot.lds |   14 +++-
 arch/arm/cpu/armv7/omap3/emif4.c   |   34 +++++++
 arch/arm/cpu/armv7/omap3/sdrc.c    |   38 +++++++
 arch/arm/cpu/armv7/start.S         |  191 +++++++++++++++++++++++++++++++++++-
 arch/arm/cpu/armv7/u-boot.lds      |   14 +++-
 board/ti/beagle/config.mk          |    2 +-
 include/configs/omap3_beagle.h     |    5 +
 7 files changed, 291 insertions(+), 7 deletions(-)
arch/arm/cpu/armv7/mx51/u-boot.lds +13 -1
index d66434c..55d6599 100644
@@ -44,10 +44,22 @@ SECTIONS
 	.rodata : { *(.rodata) }
 
 	. = ALIGN(4);
-	.data : { *(.data) }
+	.data : {
+		*(.data)
+	__datarel_start = .;
+		*(.data.rel)
+	__datarelrolocal_start = .;
+		*(.data.rel.ro.local)
+	__datarellocal_start = .;
+		*(.data.rel.local)
+	__datarelro_start = .;
+		*(.data.rel.ro)
+	}
 
+	__got_start = .;
 	. = ALIGN(4);
 	.got : { *(.got) }
+	__got_end = .;
 
 	. = .;
 	__u_boot_cmd_start = .;
arch/arm/cpu/armv7/omap3/emif4.c +34 -0
index fae5b11..da2cd90 100644
@@ -136,6 +136,7 @@ void do_emif4_init(void)
  * dram_init -
  *  - Sets uboots idea of sdram size
  */
+#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
 int dram_init(void)
 {
 	DECLARE_GLOBAL_DATA_PTR;

@@ -157,6 +158,39 @@ int dram_init(void)
 
 	return 0;
 }
+#else
+int dram_init(void)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+	unsigned int size0 = 0, size1 = 0;
+
+	size0 = get_sdr_cs_size(CS0);
+	/*
+	 * If a second bank of DDR is attached to CS1 this is
+	 * where it can be started.  Early init code will init
+	 * memory on CS0.
+	 */
+	if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype == DDR_STACKED))
+		size1 = get_sdr_cs_size(CS1);
+
+	gd->ram_size = size0 + size1;
+	return 0;
+}
+
+void dram_init_banksize (void)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+	unsigned int size0 = 0, size1 = 0;
+
+	size0 = get_sdr_cs_size(CS0);
+	size1 = get_sdr_cs_size(CS1);
+
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = size0;
+	gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1);
+	gd->bd->bi_dram[1].size = size1;
+}
+#endif
 
 /*
  * mem_init() -
arch/arm/cpu/armv7/omap3/sdrc.c +38 -0
index 96fd990..3d4836b 100644
@@ -164,6 +164,7 @@ void do_sdrc_init(u32 cs, u32 early)
  * dram_init -
  *  - Sets uboots idea of sdram size
  */
+#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
 int dram_init(void)
 {
 	DECLARE_GLOBAL_DATA_PTR;

@@ -189,6 +190,43 @@ int dram_init(void)
 
 	return 0;
 }
+#else
+int dram_init(void)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+	unsigned int size0 = 0, size1 = 0;
+
+	size0 = get_sdr_cs_size(CS0);
+	/*
+	 * If a second bank of DDR is attached to CS1 this is
+	 * where it can be started.  Early init code will init
+	 * memory on CS0.
+	 */
+	if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype == DDR_STACKED)) {
+		do_sdrc_init(CS1, NOT_EARLY);
+		make_cs1_contiguous();
+
+		size1 = get_sdr_cs_size(CS1);
+	}
+	gd->ram_size = size0 + size1;
+
+	return 0;
+}
+
+void dram_init_banksize (void)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+	unsigned int size0 = 0, size1 = 0;
+
+	size0 = get_sdr_cs_size(CS0);
+	size1 = get_sdr_cs_size(CS1);
+
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = size0;
+	gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1);
+	gd->bd->bi_dram[1].size = size1;
+}
+#endif
 
 /*
  * mem_init -
arch/arm/cpu/armv7/start.S +187 -4

244 lines not on this page · raw message

arch/arm/cpu/armv7/u-boot.lds +13 -1
index 9e5b5a9..d4fd3fc 100644
@@ -42,10 +42,22 @@ SECTIONS
 	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
 
 	. = ALIGN(4);
-	.data : { *(.data) }
+	.data : {
+		*(.data)
+	__datarel_start = .;
+		*(.data.rel)
+	__datarelrolocal_start = .;
+		*(.data.rel.ro.local)
+	__datarellocal_start = .;
+		*(.data.rel.local)
+	__datarelro_start = .;
+		*(.data.rel.ro)
+	}
 
+	__got_start = .;
 	. = ALIGN(4);
 	.got : { *(.got) }
+	__got_end = .;
 
 	__u_boot_cmd_start = .;
 	.u_boot_cmd : { *(.u_boot_cmd) }
board/ti/beagle/config.mk +1 -1
index 879b2e2..6fb10e3 100644
@@ -30,4 +30,4 @@
 # (mem base + reserved)
 
 # For use with external or internal boots.
-TEXT_BASE = 0x80e80000
+TEXT_BASE = 0x80008000
include/configs/omap3_beagle.h +5 -0
index b066d4d..9ae40ec 100644
@@ -336,4 +336,9 @@ extern unsigned int boot_flash_sec;
 extern unsigned int boot_flash_type;
 #endif
 
+/* additions for new relocation code, must added to all boards */
+#undef CONFIG_SYS_ARM_WITHOUT_RELOC /* This board is tested with relocation support */
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_SP_ADDR		(LOW_LEVEL_SRAM_STACK - CONFIG_SYS_GBL_DATA_SIZE)
+
 #endif /* __CONFIG_H */
Signature · 5 lines
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