Question wrt custom LCD controller protocol
Subsystems (3)
Hi,
I'm trying to add SLCD support for the Jz4740 LCD controller, which has a "custom" interface allowing communication (8-18bit, serial/parallel) from CPU to LCD panel through some registers.
As this differs from how other LCD panels are currently implemented in Linux (mostly using SPI), and as my board needs LCD initialization, I've exported functions from the jz4740 FB driver which can be used by drivers/video/backlight/*.c users.
However, the problem I'm currently facing is that the LCD panel driver gets loaded prior to the framebuffer, which obviously can't work as the LCD controller IP hasn't been initialized yet.
I've considered the possibility of emulating an SPI master driver on-top of the LCD controller, but this seems like a lot of boiler-plate for not much added benefit.
I've looked into tricking the driver base code getting to probe the framebuffer before the LCD panel driver, but AFAICS this can only be reliably done by making the framebuffer a bus and the LCD panel its child (simply setting the framebuffer as its parent doesn't work).
I've attached a patch containing my current implementation.
Any pointers would be appreciated.
Signature · 1 line
Maurus Cuelenaere
arch/mips/include/asm/mach-jz4740/jz4740_fb.h +20 -0
@@ -30,8 +30,17 @@ enum jz4740_fb_lcd_type {JZ_LCD_TYPE_DUAL_COLOR_STN =10 ,JZ_LCD_TYPE_DUAL_MONOCHROME_STN =11 ,JZ_LCD_TYPE_8BIT_SERIAL =12 , + +JZ_SLCD_TYPE_PARALLEL_8_BIT =1 | (1 <<5 ), +JZ_SLCD_TYPE_PARALLEL_16_BIT =0 | (1 <<5 ), +JZ_SLCD_TYPE_PARALLEL_18_BIT =2 | (1 <<5 ), +JZ_SLCD_TYPE_SERIAL_8_BIT =1 | (3 <<5 ), +JZ_SLCD_TYPE_SERIAL_16_BIT =0 | (3 <<5 ), + JZ_SLCD_TYPE_SERIAL_18_BIT = 2 | (3 << 5), }; +#define JZ4740_FB_IS_SLCD_TYPE (type) ((type) & (1 << 5)) +#define JZ4740_FB_IS_SLCD_SERIAL_TYPE (type) ((type) & (2 << 5))#define JZ4740_FB_SPECIAL_TFT_CONFIG (start, stop) (((start) << 16) | (stop))/*
@@ -62,6 +71,20 @@ struct jz4740_fb_platform_data { unsigned pixclk_falling_edge:1; unsigned date_enable_active_low:1; + unsigned chip_select_active_low:1; + unsigned register_select_active_low:1; }; +struct platform_device ; + +extern void jz4740_fb_slcd_disable_transfer (struct platform_device *pdev); +extern void jz4740_fb_slcd_enable_transfer (struct platform_device *pdev); +extern void jz4740_fb_slcd_send_cmd_data (struct platform_device *pdev, +unsigned int cmd,unsigned int data); +extern void jz4740_fb_slcd_send_cmd (struct platform_device *pdev, +unsigned int cmd); +#endif
arch/mips/jz4740/Kconfig +3 -0
@@ -6,6 +6,9 @@ choice config JZ4740_QI_LB60 bool "Qi Hardware Ben NanoNote" +config JZ4740_ONDAVX747 + bool "Onda VX747" + endchoice config HAVE_PWM
arch/mips/jz4740/Makefile +1 -0
@@ -12,6 +12,7 @@ obj-$(CONFIG_DEBUG_FS) += clock-debugfs.o # board specific support obj-$(CONFIG_JZ4740_QI_LB60) += board-qi_lb60.o +obj-$(CONFIG_JZ4740_ONDAVX747) += board-ondavx747.o # PM support
arch/mips/jz4740/board-ondavx747.c new file +79 -0
79 lines not on this page · raw message
drivers/video/backlight/Kconfig +7 -0
@@ -109,6 +109,13 @@ config LCD_S6E63M0 If you have an S6E63M0 LCD Panel, say Y to enable its LCD control driver. +config LCD_G240400 + tristate "Truly G240400RTSW LCD Driver" + depends on MACH_JZ4740 + help + If you have a Truly G2400400RTSW LCD panel, say Y to enable its LCD + control driver. + endif # LCD_CLASS_DEVICE #
drivers/video/backlight/Makefile +1 -0
@@ -12,6 +12,7 @@ obj-$(CONFIG_LCD_VGG2432A4) += vgg2432a4.o obj-$(CONFIG_LCD_TDO24M) += tdo24m.o obj-$(CONFIG_LCD_TOSA) += tosa_lcd.o obj-$(CONFIG_LCD_S6E63M0) += s6e63m0.o +obj-$(CONFIG_LCD_G240400) += truly_g240400rtsw.o obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o obj-$(CONFIG_BACKLIGHT_ATMEL_PWM) += atmel-pwm-bl.o
drivers/video/backlight/truly_g240400rtsw.c new file +431 -0
431 lines not on this page · raw message
drivers/video/jz4740_fb.c +438 -87
700 lines not on this page · raw message
include/video/truly_g240400rtsw.h new file +14 -0
@@ -0,0 +1,31 @@ +#ifndef __VIDEO_TRULY_G240400RTSW_H__ +#define __VIDEO_TRULY_G240400RTSW_H__ + +struct platform_device ; +struct fb_videomode ; + +struct g240400_pdata { +struct platform_device *jz4740_fb; +struct fb_videomode *default_mode; +int gpio_reset; +int gpio_cs; +}; + +#endif /* __VIDEO_TRULY_G240400RTSW_H__ */