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dw_mmc: set the debounce value and remove duplicated offset

PATCH In review Jaehoon Chung 2 participants 3 messages Feb 21, 2011 – Feb 22, 2011

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Jaehoon Chung

author maintainer
#0 lore raw

PATCH 1/1 dw_mmc: set the debounce value and remove duplicated offset

This patch is set the debouce value..
This value do not need to be changed with every command. So we set the value in probe function.

And DATA register offset is duplicated..

---
 drivers/mmc/host/dw_mmc.c |    3 +++
 drivers/mmc/host/dw_mmc.h |    1 -
 2 files changed, 3 insertions(+), 1 deletions(-)
drivers/mmc/host/dw_mmc.c +3 -0
index 62c8440..b3f94ff 100644
@@ -1623,6 +1623,9 @@ static int dw_mci_probe(struct platform_device *pdev)
 	/* Put in max timeout */
 	mci_writel(host, TMOUT, 0xFFFFFFFF);
 
+	/* Set the debounce value */
+	mci_writel(host, DEBNCE, 0xFFFFFF);
+
 	/*
 	 * FIFO threshold settings  RxMark  = fifo_size / 2 - 1,
 	 *                          Tx Mark = fifo_size / 2 DMA Size = 8
drivers/mmc/host/dw_mmc.h +0 -1
index 5dd55a7..f492837 100644
@@ -51,7 +51,6 @@
 #define SDMMC_DSCADDR		0x094
 #define SDMMC_BUFADDR		0x098
 #define SDMMC_DATA		0x100
-#define SDMMC_DATA_ADR		0x100
 
 /* shift bit field */
 #define _SBF(f, v)		((v) << (f))
Acked-by on v1 1/1
#1 lore raw
Quoted 18 lines · Jaehoon Chung

This patch is set the debouce value..
This value do not need to be changed with every command. So we set the value in probe function.

And DATA register offset is duplicated..

---
 drivers/mmc/host/dw_mmc.c |    3 +++
 drivers/mmc/host/dw_mmc.h |    1 -

 2 files changed, 3 insertions(+), 1 deletions(-)
drivers/mmc/host/dw_mmc.c +0 -0
index 62c8440..b3f94ff 100644

drivers/mmc/host/dw_mmc.c static int dw_mci_probe(struct platform_device *pdev) · line 1628

Quoted 6 lines
drivers/mmc/host/dw_mmc.c +3 -0
@@ -1623,6 +1623,9 @@ static int dw_mci_probe(struct platform_device *pdev)
        /* Put in max timeout */
        mci_writel(host, TMOUT, 0xFFFFFFFF);
 
+       /* Set the debounce value */
+       mci_writel(host, DEBNCE, 0xFFFFFF);
+

As I understand it this is the reset value of the DEBNCE register? Why do we need to set it at all?

drivers/mmc/host/dw_mmc.h line 54

Quoted 12 lines
drivers/mmc/host/dw_mmc.c +0 -0
        /*
         * FIFO threshold settings  RxMark  = fifo_size / 2 - 1,
         *                          Tx Mark = fifo_size / 2 DMA Size = 8
drivers/mmc/host/dw_mmc.h +0 -1
index 5dd55a7..f492837 100644
@@ -51,7 +51,6 @@
  #define SDMMC_DSCADDR          0x094
  #define SDMMC_BUFADDR          0x098
  #define SDMMC_DATA             0x100
-#define SDMMC_DATA_ADR         0x100

This part is fine.

author maintainer
#2 lore raw
Quoted 22 lines · Will Newton
Quoted 21 lines · Jaehoon Chung

This patch is set the debouce value..
This value do not need to be changed with every command. So we set the value in probe function.

And DATA register offset is duplicated..

---
 drivers/mmc/host/dw_mmc.c |    3 +++
 drivers/mmc/host/dw_mmc.h |    1 -
 2 files changed, 3 insertions(+), 1 deletions(-)
drivers/mmc/host/dw_mmc.c +0 -0
index 62c8440..b3f94ff 100644
@@ -1623,6 +1623,9 @@ static int dw_mci_probe(struct platform_device *pdev)
       /* Put in max timeout */
       mci_writel(host, TMOUT, 0xFFFFFFFF);
 
Quoted 6 lines

drivers/mmc/host/dw_mmc.c static int dw_mci_probe(struct platform_device *pdev) · line 1628

Quoted 3 lines
drivers/mmc/host/dw_mmc.c +3 -0
+       /* Set the debounce value */
+       mci_writel(host, DEBNCE, 0xFFFFFF);
+

As I understand it this is the reset value of the DEBNCE register? Why do we need to set it at all?

If need to set other value, we can change the debounce value (5~25ms). This value is default reset value.

Quoted 22 lines

drivers/mmc/host/dw_mmc.h line 54

Quoted 13 lines
drivers/mmc/host/dw_mmc.c +0 -0
       /*
        * FIFO threshold settings  RxMark  = fifo_size / 2 - 1,
        *                          Tx Mark = fifo_size / 2 DMA Size = 8
drivers/mmc/host/dw_mmc.h +0 -1
index 5dd55a7..f492837 100644
@@ -51,7 +51,6 @@
 #define SDMMC_DSCADDR          0x094
 #define SDMMC_BUFADDR          0x098
 #define SDMMC_DATA             0x100
-#define SDMMC_DATA_ADR         0x100

This part is fine.

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