i.MX51 & MMU
Hi,
has anyone recently tested barebox master on a babbage board with MMU enabled ? Here (not on a babbage, with a TO2 i.MX515 with 1 bank of DDR2), enabling MMU crash the board (which works fine with barebox with MMU disabled and with Linux 2.6.38-rc6 so the hardware seems not to be the root of the problem).
Thanks,
Eric
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Hi Eric,
Quoted 7 lines · Eric Benard
Hi,
has anyone recently tested barebox master on a babbage board with MMU enabled ? Here (not on a babbage, with a TO2 i.MX515 with 1 bank of DDR2), enabling MMU crash the board (which works fine with barebox with MMU disabled and with Linux 2.6.38-rc6 so the hardware seems not to be the root of the problem).
The memory space of the i.MX51 is a bit tight. It may be that you shadow registers with the dma coherent memory space. Can you please post your mmu setup code sniplet?
The babbage works with mmu enabled.
Sascha
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Hi Sascha,
Quoted 9 lines · Sascha Hauer
Quoted 7 lines · Eric Benard
Hi,
has anyone recently tested barebox master on a babbage board with MMU enabled ? Here (not on a babbage, with a TO2 i.MX515 with 1 bank of DDR2), enabling MMU crash the board (which works fine with barebox with MMU disabled and with Linux 2.6.38-rc6 so the hardware seems not to be the root of the problem).
Quoted 5 lines
The memory space of the i.MX51 is a bit tight. It may be that you shadow registers with the dma coherent memory space. Can you please post your mmu setup code sniplet?
The babbage works with mmu enabled.
OK so the problem is on my side. For the moment the mmu part is the one of the babbage. But I must investigate as I only have one DDR2 bank on this board (for a 256MB total size) when the babbage has 2 (for a 512MB total size).
Thanks,
Eric
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Quoted 9 lines · Sascha Hauer
Quoted 7 lines · Eric Benard
Hi,
has anyone recently tested barebox master on a babbage board with MMU enabled ? Here (not on a babbage, with a TO2 i.MX515 with 1 bank of DDR2), enabling MMU crash the board (which works fine with barebox with MMU disabled and with Linux 2.6.38-rc6 so the hardware seems not to be the root of the problem).
Quoted 5 lines
The memory space of the i.MX51 is a bit tight. It may be that you shadow registers with the dma coherent memory space. Can you please post your mmu setup code sniplet?
The babbage works with mmu enabled.
btw: NAND support for i.MX51 works fine here (with a 8 bits width 2k pages size NAND).
Eric
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