FPU LWP 2/5: add mask option to xsave/xrstor

diff -r 4ed4e3d9106e -r f5c4d99cde69 xen/arch/x86/i387.c
@@ -127,36 +127,42 @@
     return cpu_has_xsave;	
 }
 
-static void xsave(struct vcpu *v)
+static void xsave(struct vcpu *v, uint64_t mask)
 {
     struct xsave_struct *ptr = v->arch.xsave_area;
+    uint32_t hmask = mask >> 32;
+    uint32_t lmask = mask;
 
     asm volatile (
         ".byte " REX_PREFIX "0x0f,0xae,0x27"
         :
-        : "a" (-1), "d" (-1), "D"(ptr)
+        : "a" (lmask), "d" (hmask), "D"(ptr)
         : "memory" );
 }
 
-static void xsaveopt(struct vcpu *v)
+static void xsaveopt(struct vcpu *v, uint64_t mask)
 {
     struct xsave_struct *ptr = v->arch.xsave_area;
+    uint32_t hmask = mask >> 32;
+    uint32_t lmask = mask;
 
     asm volatile (
         ".byte " REX_PREFIX "0x0f,0xae,0x37"
         :
-        : "a" (-1), "d" (-1), "D"(ptr)
+        : "a" (lmask), "d" (hmask), "D"(ptr)
         : "memory" );
 }
 
-static void xrstor(struct vcpu *v)
+static void xrstor(struct vcpu *v, uint64_t mask)
 {
     struct xsave_struct *ptr = v->arch.xsave_area;
+    uint32_t hmask = mask >> 32;
+    uint32_t lmask = mask;
 
     asm volatile (
         ".byte " REX_PREFIX "0x0f,0xae,0x2f"
         :
-        : "m" (*ptr), "a" (-1), "d" (-1), "D"(ptr) );
+        : "m" (*ptr), "a" (lmask), "d" (hmask), "D"(ptr) );
 }
 
 /******************************/

@@ -185,7 +191,7 @@
      * we set all supported feature mask before doing save/restore.
      */
     set_xcr0(v->arch.xcr0_accum);
-    xrstor(v);
+    xrstor(v, XCNTXT_MASK);
     set_xcr0(v->arch.xcr0);
 }
 

@@ -270,10 +276,10 @@
      */
     set_xcr0(v->arch.xcr0_accum);
     if ( cpu_has_xsaveopt )
-        xsaveopt(v);
+        xsaveopt(v, XCNTXT_MASK);
     else
-        xsave(v);
-    set_xcr0(v->arch.xcr0);    
+        xsave(v, XCNTXT_MASK);
+    set_xcr0(v->arch.xcr0);
 }
 
 /* Save x87 FPU, MMX, SSE and SSE2 state */

diff -r 4ed4e3d9106e -r f5c4d99cde69 xen/include/asm-x86/i387.h
@@ -23,15 +23,17 @@
 extern u64 xfeature_mask;
 
 #define XSAVE_AREA_MIN_SIZE (512 + 64) /* FP/SSE + XSAVE.HEADER */
-#define XSTATE_FP       (1ULL << 0)
-#define XSTATE_SSE      (1ULL << 1)
-#define XSTATE_YMM      (1ULL << 2)
-#define XSTATE_LWP      (1ULL << 62) /* AMD lightweight profiling */
-#define XSTATE_FP_SSE   (XSTATE_FP | XSTATE_SSE)
-#define XCNTXT_MASK     (XSTATE_FP | XSTATE_SSE | XSTATE_YMM | XSTATE_LWP)
-#define XSTATE_YMM_OFFSET  XSAVE_AREA_MIN_SIZE
-#define XSTATE_YMM_SIZE    256
-#define XSAVEOPT        (1 << 0)
+#define XSTATE_YMM_OFFSET   XSAVE_AREA_MIN_SIZE
+#define XSTATE_YMM_SIZE     256
+
+#define XSTATE_FP           (1ULL << 0)
+#define XSTATE_SSE          (1ULL << 1)
+#define XSTATE_YMM          (1ULL << 2)
+#define XSTATE_LWP          (1ULL << 62) /* AMD lightweight profiling */
+#define XSTATE_FP_SSE       (XSTATE_FP | XSTATE_SSE)
+#define XCNTXT_MASK         (XSTATE_FP | XSTATE_SSE | XSTATE_YMM | XSTATE_LWP)
+
+#define XSAVEOPT            (1 << 0)
 
 #define XCR_XFEATURE_ENABLED_MASK   0