Skip to contentSkip to conversation

nestedsvm: fix shadow-on-hap

PATCH In review Christoph Egger 2 participants 3 messages May 11, 2011

lore
Share & tools
lore

Christoph Egger

author
#0 lore raw

PATCH 1/1 nestedsvm: fix shadow-on-hap

Hi,

attached patch lets l2 guest actually run with shadow-on-hap.

Signed-off-by Christoph Egger <[email protected]>
Signature · 6 lines
---to satisfy European Law for business letters:
Advanced Micro Devices GmbH
Einsteinring 24, 85689 Dornach b. Muenchen
Geschaeftsfuehrer: Alberto Bozzo, Andrew Bowd
Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen
Registergericht Muenchen, HRB Nr. 43632
xen/arch/x86/hvm/svm/entry.S +4 -0
diff -r 0c60c61ff836 xen/arch/x86/hvm/svm/entry.S
@@ -65,12 +65,16 @@ ENTRY(svm_asm_do_resume)
         testl $~0,(r(dx),r(ax),1)
         jnz  .Lsvm_process_softirqs
 
+        testb $0, VCPU_nsvm_hap_enabled(r(bx))
+        jz  .Lsvm_asid_handle
+        
         mov  VCPU_nhvm_p2m(r(bx)),r(ax)
         test r(ax),r(ax)
         sete %al
         andb VCPU_nhvm_guestmode(r(bx)),%al
         jnz  .Lsvm_nsvm_no_p2m
 
+.Lsvm_asid_handle:
         call svm_asid_handle_vmrun
 
         cmpb $0,addr_of(tb_init_done)
xen/arch/x86/hvm/svm/nestedsvm.c +1 -0
diff -r 0c60c61ff836 xen/arch/x86/hvm/svm/nestedsvm.c
@@ -546,6 +547,7 @@ static int nsvm_vmcb_prepare4vmrun(struc
         /* host nested paging + guest shadow paging. */
         n2vmcb->_np_enable = 1;
         /* Keep h_cr3 as it is. */
+        n2vmcb->_h_cr3 = n1vmcb->_h_cr3;
         /* When l1 guest does shadow paging
          * we assume it intercepts page faults.
          */

_______________________________________________
Xen-devel mailing list
[email protected]
http://lists.xensource.com/xen-devel

author
#1 lore raw
Quoted 8 lines · Christoph Egger

Hi,

attached patch lets l2 guest actually run with shadow-on-hap.

Signed-off-by Christoph Egger<[email protected]>

New version. Old version missed some hunks to compile. Sorry about this.

Signed-off-by Christoph Egger <[email protected]>
Signature · 6 lines
---to satisfy European Law for business letters:
Advanced Micro Devices GmbH
Einsteinring 24, 85689 Dornach b. Muenchen
Geschaeftsfuehrer: Alberto Bozzo, Andrew Bowd
Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen
Registergericht Muenchen, HRB Nr. 43632
xen/arch/x86/hvm/svm/entry.S +4 -0
diff -r 0c60c61ff836 xen/arch/x86/hvm/svm/entry.S
@@ -65,12 +65,16 @@ ENTRY(svm_asm_do_resume)
         testl $~0,(r(dx),r(ax),1)
         jnz  .Lsvm_process_softirqs
 
+        testb $0, VCPU_nsvm_hap_enabled(r(bx))
+        jz  .Lsvm_asid_handle
+        
         mov  VCPU_nhvm_p2m(r(bx)),r(ax)
         test r(ax),r(ax)
         sete %al
         andb VCPU_nhvm_guestmode(r(bx)),%al
         jnz  .Lsvm_nsvm_no_p2m
 
+.Lsvm_asid_handle:
         call svm_asid_handle_vmrun
 
         cmpb $0,addr_of(tb_init_done)
xen/arch/x86/hvm/svm/nestedsvm.c +1 -0
diff -r 0c60c61ff836 xen/arch/x86/hvm/svm/nestedsvm.c
@@ -546,6 +547,7 @@ static int nsvm_vmcb_prepare4vmrun(struc
         /* host nested paging + guest shadow paging. */
         n2vmcb->_np_enable = 1;
         /* Keep h_cr3 as it is. */
+        n2vmcb->_h_cr3 = n1vmcb->_h_cr3;
         /* When l1 guest does shadow paging
          * we assume it intercepts page faults.
          */
xen/arch/x86/x86_32/asm-offsets.c +1 -0
diff -r 0c60c61ff836 xen/arch/x86/x86_32/asm-offsets.c
@@ -95,6 +95,7 @@ void __dummy__(void)
 
     OFFSET(VCPU_nhvm_guestmode, struct vcpu, arch.hvm_vcpu.nvcpu.nv_guestmode);
     OFFSET(VCPU_nhvm_p2m, struct vcpu, arch.hvm_vcpu.nvcpu.nv_p2m);
+    OFFSET(VCPU_nsvm_hap_enabled, struct vcpu, arch.hvm_vcpu.nvcpu.u.nsvm.ns_hap_enabled);
     BLANK();
 
     OFFSET(VMCB_rax, struct vmcb_struct, rax);
xen/arch/x86/x86_64/asm-offsets.c +1 -0
diff -r 0c60c61ff836 xen/arch/x86/x86_64/asm-offsets.c
@@ -117,6 +117,7 @@ void __dummy__(void)
 
     OFFSET(VCPU_nhvm_guestmode, struct vcpu, arch.hvm_vcpu.nvcpu.nv_guestmode);
     OFFSET(VCPU_nhvm_p2m, struct vcpu, arch.hvm_vcpu.nvcpu.nv_p2m);
+    OFFSET(VCPU_nsvm_hap_enabled, struct vcpu, arch.hvm_vcpu.nvcpu.u.nsvm.ns_hap_enabled);
     BLANK();
 
     OFFSET(DOMAIN_is_32bit_pv, struct domain, arch.is_32bit_pv);

_______________________________________________
Xen-devel mailing list
[email protected]
http://lists.xensource.com/xen-devel

Acked-by
#2 lore raw
Quoted 7 lines · Christoph Egger

diff -r 0c60c61ff836 xen/arch/x86/hvm/svm/entry.S

xen/arch/x86/hvm/svm/entry.S +0 -0
@@ -65,12 +65,16 @@ ENTRY(svm_asm_do_resume)
         testl $~0,(r(dx),r(ax),1)
         jnz  .Lsvm_process_softirqs

xen/arch/x86/hvm/svm/entry.S ENTRY(svm_asm_do_resume) · line 77

Quoted 10 lines
xen/arch/x86/hvm/svm/entry.S +4 -0
+        testb $0, VCPU_nsvm_hap_enabled(r(bx))
+        jz  .Lsvm_asid_handle
+        
         mov  VCPU_nhvm_p2m(r(bx)),r(ax)
         test r(ax),r(ax)
         sete %al
         andb VCPU_nhvm_guestmode(r(bx)),%al
         jnz  .Lsvm_nsvm_no_p2m
 
+.Lsvm_asid_handle:

It would be neater to AND nsvm_hap_enabled into the no-p2m calculation rather than have another jump, but unless you feel like fixing that, this and your other 3 recent nested-SVM patches are

Acked-by Tim Deegan <[email protected]>

Tim.

Signature · 3 lines
Tim Deegan <[email protected]>
Principal Software Engineer, Xen Platform Team
Citrix Systems UK Ltd.  (Company #02937203, SL9 0BG)