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target-i386: fix cmpxchg

PATCH In review Christoph Egger 2 participants 2 messages Jun 17, 2011

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Christoph Egger

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PATCH 1/1 target-i386: fix cmpxchg

Correct emulation of i386 cmpxchg instruction in the case where the comparison outcome is unequal and the memory write causes a page fault.

From: Andreas Gustafsson <[email protected]>

Signed-off-by Christoph Egger <[email protected]>
target-i386/translate.c +7 -4
index 10bd72a..69a878f 100644
@@ -4857,20 +4857,23 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
             tcg_gen_sub_tl(t2, cpu_regs[R_EAX], t0);
             gen_extu(ot, t2);
             tcg_gen_brcondi_tl(TCG_COND_EQ, t2, 0, label1);
+            label2 = gen_new_label();
             if (mod == 3) {
-                label2 = gen_new_label();
                 gen_op_mov_reg_v(ot, R_EAX, t0);
                 tcg_gen_br(label2);
                 gen_set_label(label1);
                 gen_op_mov_reg_v(ot, rm, t1);
-                gen_set_label(label2);
             } else {
-                tcg_gen_mov_tl(t1, t0);
+                /* perform no-op store cycle like physical cpu; must be
+                 * before changing accumulator to ensure idempotency if
+                 * the store faults and the instruction is restarted */
+                gen_op_st_v(ot + s->mem_index, t0, a0);
                 gen_op_mov_reg_v(ot, R_EAX, t0);
+                tcg_gen_br(label2);
                 gen_set_label(label1);
-                /* always store */
                 gen_op_st_v(ot + s->mem_index, t1, a0);
             }
+            gen_set_label(label2);
             tcg_gen_mov_tl(cpu_cc_src, t0);
             tcg_gen_mov_tl(cpu_cc_dst, t2);
             s->cc_op = CC_OP_SUBB + ot;
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