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mips_fulong2e: Reorder ISA bus and i8259 creation

PATCH Applied Jan Kiszka 2 participants 2 messages Sep 28, 2011 – Oct 1, 2011

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Jan Kiszka

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#0 lore raw

PATCH 1/1 mips_fulong2e: Reorder ISA bus and i8259 creation

Missed during memory region conversion: The i8259 now depends on the ISA bus being created first. Reorder the initialization.

---

I had a reordering patch in my i8259-qdev queue as well, and these bits were left over after rebasing over current master.

 hw/mips_fulong2e.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)
hw/mips_fulong2e.c +4 -4
index f52b8c5..04921c1 100644
@@ -331,10 +331,6 @@ static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device,
     cpu_mips_irq_init_cpu(env);
     cpu_mips_clock_init(env);
 
-    /* Interrupt controller */
-    /* The 8259 -> IP5  */
-    i8259 = i8259_init(env->irq[5]);
-
     /* North bridge, Bonito --> IP2 */
     pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
 
@@ -347,7 +343,11 @@ static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device,
         exit(1);
     }
 
+    /* Interrupt controller */
+    /* The 8259 -> IP5  */
+    i8259 = i8259_init(env->irq[5]);
     isa_bus_irqs(i8259);
+
     vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(FULONG2E_VIA_SLOT, 1));
     usb_uhci_vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 2));
     usb_uhci_vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 3));
Signature · 1 line
1.7.3.4
Applied
#1 lore raw

Thanks, applied.

Quoted 43 lines · Jan Kiszka

Missed during memory region conversion: The i8259 now depends on the ISA bus being created first. Reorder the initialization.

---

I had a reordering patch in my i8259-qdev queue as well, and these bits were left over after rebasing over current master.

 hw/mips_fulong2e.c |    8 ++++----

 1 files changed, 4 insertions(+), 4 deletions(-)
hw/mips_fulong2e.c +4 -5
index f52b8c5..04921c1 100644
@@ -331,10 +331,6 @@ static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device,
     cpu_mips_irq_init_cpu(env);
     cpu_mips_clock_init(env);
 
-    /* Interrupt controller */
-    /* The 8259 -> IP5  */
-    i8259 = i8259_init(env->irq[5]);
-
     /* North bridge, Bonito --> IP2 */
     pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
 
@@ -347,7 +343,11 @@ static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device,
         exit(1);
     }
 
+    /* Interrupt controller */
+    /* The 8259 -> IP5  */
+    i8259 = i8259_init(env->irq[5]);
     isa_bus_irqs(i8259);
+
     vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(FULONG2E_VIA_SLOT, 1));
     usb_uhci_vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 2));
     usb_uhci_vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 3));
--

1.7.3.4