intel-dri: Fix initialization if startup happens in interlaced mode
Subsystems (2)
PATCH 1/1 intel-dri: Fix initialization if startup happens in interlaced mode
My EFI BIOS starts the graphics card up in my projector's preferred EDID mode, 1080@60i. The Intel driver does not clear the interlaced bit:
#define PIPECONF_PROGRESSIVE (0 << 21) #define PIPECONF_INTERLACE_W_FIELD_INDICATION (6 << 21) #define PIPECONF_INTERLACE_FIELD_0_ONLY (7 << 21)
Likewise, I suppose that this bit is not set for interlaced modes either, however interlaced modes are discarded anyway.
drivers/gpu/drm/i915/intel_display.c +1 -1
@@ -5136,7 +5136,7 @@ adjusted_mode->crtc_vsync_end -=1 ; adjusted_mode->crtc_vsync_start -=1 ; }else - pipeconf &= ~PIPECONF_INTERLACE_W_FIELD_INDICATION ;/* progressive */ + pipeconf &= ~PIPECONF_INTERLACE_FIELD_0_ONLY ;/* progressive */ I915_WRITE(HTOTAL(pipe), (adjusted_mode->crtc_hdisplay - 1) |
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Quoted 9 lines · Christian Schmidt
My EFI BIOS starts the graphics card up in my projector's preferred EDID mode, 1080@60i. The Intel driver does not clear the interlaced bit:
#define PIPECONF_PROGRESSIVE (0 << 21) #define PIPECONF_INTERLACE_W_FIELD_INDICATION (6 << 21) #define PIPECONF_INTERLACE_FIELD_0_ONLY (7 << 21)Likewise, I suppose that this bit is not set for interlaced modes either, however interlaced modes are discarded anyway.
The patch is correct, we do need to clear all 3 bits to restore progressive mode. However it would be better to add a new #define PIPECONF_INTERLACE_MASK (7 << 21)
so that we do not confuse clearing all interlace bits with unsetting a particular mode.
-Chris
Signature · 1 line
Chris Wilson, Intel Open Source Technology Centre