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gpio/omap: Fix IRQ handling for SPARSE_IRQ

RFC PATCH New Cousson, Benoit 4 participants 12 messages Feb 23, 2012 – Feb 24, 2012

Subsystems (4)
Arm (32-bit) Arm sub-architectures GPIO OMAP GPIO driver
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Cousson, Benoit

author
#0 lore raw

RFC PATCH 1/1 gpio/omap: Fix IRQ handling for SPARSE_IRQ

The GPIO driver is still relying on internal OMAP IRQ defines that are not relevant anymore if OMAP is built with SPARSE_IRQ.

Replace the defines with the proper IRQ base number. Clean some comment style issue.
Remove some hidden and ugly cpu_class_is_omap1() inside the gpio header.

XXX: That fix might be broken for OMAP1 MPUIO case.

Signed-off-by Benoit Cousson <[email protected]>

---

Hi Tony,

Please note that this patch is still RFC, because I do not know how to fix properly the ugly cpu_class_is_omap1 and the dependency with IH_MPUIO_BASE to detect a MPUIO.

I'm still sending it, because it is needed to have SPARSE_IRQ working on OMAP4 with the previous series I've just sent.

Regards,
Benoit

 arch/arm/plat-omap/include/plat/gpio.h |   22 ++------------------
 drivers/gpio/gpio-omap.c               |   33 ++++++++++++++++---------------
 2 files changed, 20 insertions(+), 35 deletions(-)
arch/arm/plat-omap/include/plat/gpio.h +3 -19
index cb75b65..b8a96c6 100644
@@ -218,30 +218,14 @@ extern void omap_set_gpio_debounce(int gpio, int enable);
 extern void omap_set_gpio_debounce_time(int gpio, int enable);
 /*-------------------------------------------------------------------------*/
 
-/* Wrappers for "new style" GPIO calls, using the new infrastructure
+/*
+ * Wrappers for "new style" GPIO calls, using the new infrastructure
  * which lets us plug in FPGA, I2C, and other implementations.
- * *
+ *
  * The original OMAP-specific calls should eventually be removed.
  */
 
 #include <linux/errno.h>
 #include <asm-generic/gpio.h>
 
-static inline int irq_to_gpio(unsigned irq)
-{
-	int tmp;
-
-	/* omap1 SOC mpuio */
-	if (cpu_class_is_omap1() && (irq < (IH_MPUIO_BASE + 16)))
-		return (irq - IH_MPUIO_BASE) + OMAP_MAX_GPIO_LINES;
-
-	/* SOC gpio */
-	tmp = irq - IH_GPIO_BASE;
-	if (tmp < OMAP_MAX_GPIO_LINES)
-		return tmp;
-
-	/* we don't supply reverse mappings for non-SOC gpios */
-	return -EIO;
-}
-
 #endif
drivers/gpio/gpio-omap.c +17 -16
index bc2bd69..afef0f7 100644
@@ -93,6 +93,11 @@ struct gpio_bank {
 #define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
 #define GPIO_MOD_CTRL_BIT	BIT(0)
 
+static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq)
+{
+	return gpio_irq - bank->irq_base + bank->chip.base;
+}
+
 static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
 {
 	void __iomem *reg = bank->base;

@@ -369,7 +374,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
 
 static int gpio_irq_type(struct irq_data *d, unsigned type)
 {
-	struct gpio_bank *bank;
+	struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
 	unsigned gpio;
 	int retval;
 	unsigned long flags;

@@ -377,13 +382,11 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)
 	if (!cpu_class_is_omap2() && d->irq > IH_MPUIO_BASE)
 		gpio = OMAP_MPUIO(d->irq - IH_MPUIO_BASE);
 	else
-		gpio = d->irq - IH_GPIO_BASE;
+		gpio = irq_to_gpio(bank, d->irq);
 
 	if (type & ~IRQ_TYPE_SENSE_MASK)
 		return -EINVAL;
 
-	bank = irq_data_get_irq_chip_data(d);
-
 	if (!bank->regs->leveldetect0 &&
 		(type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
 		return -EINVAL;

@@ -524,14 +527,10 @@ static void _reset_gpio(struct gpio_bank *bank, int gpio)
 /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */
 static int gpio_wake_enable(struct irq_data *d, unsigned int enable)
 {
-	unsigned int gpio = d->irq - IH_GPIO_BASE;
-	struct gpio_bank *bank;
-	int retval;
-
-	bank = irq_data_get_irq_chip_data(d);
-	retval = _set_gpio_wakeup(bank, gpio, enable);
+	struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
+	unsigned int gpio = irq_to_gpio(bank, d->irq);
 
-	return retval;
+	return _set_gpio_wakeup(bank, gpio, enable);
 }
 
 static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)

@@ -675,11 +674,13 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 
 		gpio_irq = bank->irq_base;
 		for (; isr != 0; isr >>= 1, gpio_irq++) {
-			gpio_index = GPIO_INDEX(bank, irq_to_gpio(gpio_irq));
+			int gpio = irq_to_gpio(bank, gpio_irq);
 
 			if (!(isr & 1))
 				continue;
 
+			gpio_index = GPIO_INDEX(bank, gpio);
+
 			/*
 			 * Some chips can't respond to both rising and falling
 			 * at the same time.  If this irq was requested with

@@ -705,8 +706,8 @@ exit:
 
 static void gpio_irq_shutdown(struct irq_data *d)
 {
-	unsigned int gpio = d->irq - IH_GPIO_BASE;
 	struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
+	unsigned int gpio = irq_to_gpio(bank, d->irq);
 	unsigned long flags;
 
 	spin_lock_irqsave(&bank->lock, flags);

@@ -716,16 +717,16 @@ static void gpio_irq_shutdown(struct irq_data *d)
 
 static void gpio_ack_irq(struct irq_data *d)
 {
-	unsigned int gpio = d->irq - IH_GPIO_BASE;
 	struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
+	unsigned int gpio = irq_to_gpio(bank, d->irq);
 
 	_clear_gpio_irqstatus(bank, gpio);
 }
 
 static void gpio_mask_irq(struct irq_data *d)
 {
-	unsigned int gpio = d->irq - IH_GPIO_BASE;
 	struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
+	unsigned int gpio = irq_to_gpio(bank, d->irq);
 	unsigned long flags;
 
 	spin_lock_irqsave(&bank->lock, flags);

@@ -736,8 +737,8 @@ static void gpio_mask_irq(struct irq_data *d)
 
 static void gpio_unmask_irq(struct irq_data *d)
 {
-	unsigned int gpio = d->irq - IH_GPIO_BASE;
 	struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
+	unsigned int gpio = irq_to_gpio(bank, d->irq);
 	unsigned int irq_mask = GPIO_BIT(bank, gpio);
 	u32 trigger = irqd_get_trigger_type(d);
 	unsigned long flags;
Signature · 1 line
1.7.0.4
#1 lore raw

RFC PATCH 1/1 gpio/omap: Fix IRQ handling for SPARSE_IRQ

Quoted 2 lines · Cousson, Benoit

The GPIO driver is still relying on internal OMAP IRQ defines that are not relevant anymore if OMAP is built with SPARSE_IRQ.

Great :)

Quoted 3 lines

Please note that this patch is still RFC, because I do not know how to fix properly the ugly cpu_class_is_omap1 and the dependency with IH_MPUIO_BASE to detect a MPUIO.

Sounds like gpio_to_irq() needs to be set in the
arch/arm/*omap*/gpio*.c then.

Tony

author
#2 lore raw

RFC PATCH 1/1 gpio/omap: Fix IRQ handling for SPARSE_IRQ

+ Tarun

Quoted 4 lines · Tony Lindgren
Quoted 2 lines · Cousson, Benoit

The GPIO driver is still relying on internal OMAP IRQ defines that are not relevant anymore if OMAP is built with SPARSE_IRQ.

Quoted 8 lines

Great :)

Quoted 3 lines

Please note that this patch is still RFC, because I do not know how to fix properly the ugly cpu_class_is_omap1 and the dependency with IH_MPUIO_BASE to detect a MPUIO.

Sounds like gpio_to_irq() needs to be set in the
arch/arm/*omap*/gpio*.c then.

In fact, after a second thought, that might even work for OMAP1 because I'm using the proper base (IRQ and GPIO) to convert the IRQ number.

static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq)

{
	return gpio_irq - bank->irq_base + bank->chip.base;
}

But it might be good to test it on OMAP1 platform.

Tarun,

Do you have an OMAP1 board to test that.

Regards,
Benoit

#3 lore raw

RFC PATCH 1/1 gpio/omap: Fix IRQ handling for SPARSE_IRQ

Quoted 32 lines · Benoit

+ Tarun

Quoted 9 lines · Tony Lindgren
Quoted 3 lines · Cousson, Benoit

The GPIO driver is still relying on internal OMAP IRQ defines that are not relevant anymore if OMAP is built with SPARSE_IRQ.

Great :)

Quoted 7 lines
Quoted 3 lines

Please note that this patch is still RFC, because I do not know how to fix properly the ugly cpu_class_is_omap1 and the dependency with IH_MPUIO_BASE to detect a MPUIO.

Sounds like gpio_to_irq() needs to be set in the
arch/arm/*omap*/gpio*.c then.

In fact, after a second thought, that might even work for OMAP1 because I'm using the proper base (IRQ and GPIO) to convert the IRQ number.

static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq) {

? ? ? ?return gpio_irq - bank->irq_base + bank->chip.base; }

Quoted 6 lines

But it might be good to test it on OMAP1 platform.

Tarun,

Do you have an OMAP1 board to test that.

Yes, I will test on OMAP1 board.
--
Tarun

Quoted 3 lines

Regards,
Benoit

#4 lore raw

RFC PATCH 1/1 gpio/omap: Fix IRQ handling for SPARSE_IRQ

Hi Benoit,

Quoted 33 lines · Tarun Kanti
Quoted 32 lines · Benoit

+ Tarun

Quoted 9 lines · Tony Lindgren
Quoted 3 lines · Cousson, Benoit

The GPIO driver is still relying on internal OMAP IRQ defines that are not relevant anymore if OMAP is built with SPARSE_IRQ.

Great :)

Quoted 7 lines
Quoted 3 lines

Please note that this patch is still RFC, because I do not know how to fix properly the ugly cpu_class_is_omap1 and the dependency with IH_MPUIO_BASE to detect a MPUIO.

Sounds like gpio_to_irq() needs to be set in the
arch/arm/*omap*/gpio*.c then.

In fact, after a second thought, that might even work for OMAP1 because I'm using the proper base (IRQ and GPIO) to convert the IRQ number.

static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq) {

? ? ? ?return gpio_irq - bank->irq_base + bank->chip.base; }

Quoted 7 lines
Quoted 6 lines

But it might be good to test it on OMAP1 platform.

Tarun,

Do you have an OMAP1 board to test that.

Yes, I will test on OMAP1 board.

I have booted the image on OMAP1 with following change. I guess bank->irq_base was a typo?

static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq)

{
        //return gpio_irq - bank->irq_base + bank->chip.base;
        return gpio_irq - bank->virtual_irq_start + bank->chip.base;
}

--
Tarun

author
#5 lore raw

RFC PATCH 1/1 gpio/omap: Fix IRQ handling for SPARSE_IRQ

Quoted 40 lines · Tarun Kanti

Hi Benoit,

Quoted 36 lines · Tarun Kanti
Quoted 35 lines · Benoit

+ Tarun

Quoted 9 lines · Tony Lindgren
Quoted 3 lines · Cousson, Benoit

The GPIO driver is still relying on internal OMAP IRQ defines that are not relevant anymore if OMAP is built with SPARSE_IRQ.

Great :)

Quoted 7 lines
Quoted 3 lines

Please note that this patch is still RFC, because I do not know how to fix properly the ugly cpu_class_is_omap1 and the dependency with IH_MPUIO_BASE to detect a MPUIO.

Sounds like gpio_to_irq() needs to be set in the
arch/arm/*omap*/gpio*.c then.

In fact, after a second thought, that might even work for OMAP1 because I'm using the proper base (IRQ and GPIO) to convert the IRQ number.

static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq) {

        return gpio_irq - bank->irq_base + bank->chip.base;
}

But it might be good to test it on OMAP1 platform.

Quoted 6 lines
Quoted 4 lines
Quoted 3 lines

Tarun,

Do you have an OMAP1 board to test that.

Yes, I will test on OMAP1 board.

I have booted the image on OMAP1 with following change. I guess bank->irq_base was a typo?

Not at all :-), it was done on purpose to get rid if the static IRQ definition.
I was expecting that kind of issue because OMAP1 is populating virtual_irq_start with the IH_MPUIO_BASE, but was expecting the dynamic alloc_decs to still provide the good value. The easy fix is to still use that for OMAP1 GPIO since nobody will want to spend time fixing OMAP1 boards to do that properly :-(

I'll update the patch accordingly.

Quoted 6 lines

static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq)

{
         //return gpio_irq - bank->irq_base + bank->chip.base;
         return gpio_irq - bank->virtual_irq_start + bank->chip.base;
}

--

Thanks for the help,
Benoit

#6 lore raw

RFC PATCH 1/1 gpio/omap: Fix IRQ handling for SPARSE_IRQ

Quoted 55 lines · Benoit
Quoted 54 lines · Tarun Kanti

Hi Benoit,

Quoted 49 lines · On Fri, Feb 24, 2012 at 4:07 PM, DebBarma, Tarun Kanti <[email protected]>…
Quoted 45 lines · On Fri, Feb 24, 2012 at 3:41 PM, Cousson, Benoit<[email protected]> ?wrote:

+ Tarun

Quoted 12 lines · Tony Lindgren
Quoted 4 lines · Cousson, Benoit

The GPIO driver is still relying on internal OMAP IRQ defines that are not relevant anymore if OMAP is built with SPARSE_IRQ.

Great :)

Quoted 8 lines
Quoted 3 lines

Please note that this patch is still RFC, because I do not know how to fix properly the ugly cpu_class_is_omap1 and the dependency with IH_MPUIO_BASE to detect a MPUIO.

Sounds like gpio_to_irq() needs to be set in the
arch/arm/*omap*/gpio*.c then.

In fact, after a second thought, that might even work for OMAP1 because I'm
using the proper base (IRQ and GPIO) to convert the IRQ number.

static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq) {

? ? ? ?return gpio_irq - bank->irq_base + bank->chip.base; }

But it might be good to test it on OMAP1 platform.

Tarun,

Do you have an OMAP1 board to test that.

Quoted 8 lines
Quoted 4 lines
Quoted 1 line

Yes, I will test on OMAP1 board.

I have booted the image on OMAP1 with following change. I guess bank->irq_base was a typo?

Not at all :-), it was done on purpose to get rid if the static IRQ definition.

BTW, it was giving me following compilation error... drivers/gpio/gpio-omap.c: In function 'irq_to_gpio':
drivers/gpio/gpio-omap.c:90: error: 'struct gpio_bank' has no member named 'irq_base'
make[2]: *** [drivers/gpio/gpio-omap.o] Error 1
--
Tarun

Quoted 21 lines

I was expecting that kind of issue because OMAP1 is populating virtual_irq_start with the IH_MPUIO_BASE, but was expecting the dynamic alloc_decs to still provide the good value. The easy fix is to still use that for OMAP1 GPIO since nobody will want to spend time fixing OMAP1 boards to do that properly :-(

I'll update the patch accordingly.

Quoted 6 lines

static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq) {
? ? ? ? //return gpio_irq - bank->irq_base + bank->chip.base; ? ? ? ? return gpio_irq - bank->virtual_irq_start + bank->chip.base; }
--

Thanks for the help,
Benoit

author
#7 lore raw

RFC PATCH 1/1 gpio/omap: Fix IRQ handling for SPARSE_IRQ

Quoted 62 lines · Tarun Kanti
Quoted 61 lines · Benoit
Quoted 58 lines · Tarun Kanti

Hi Benoit,

Quoted 42 lines · Tarun Kanti
Quoted 39 lines · Benoit

+ Tarun

Quoted 12 lines · Tony Lindgren
Quoted 4 lines · Cousson, Benoit

The GPIO driver is still relying on internal OMAP IRQ defines that are not relevant anymore if OMAP is built with SPARSE_IRQ.

Great :)

Quoted 8 lines
Quoted 3 lines

Please note that this patch is still RFC, because I do not know how to fix properly the ugly cpu_class_is_omap1 and the dependency with IH_MPUIO_BASE to detect a MPUIO.

Sounds like gpio_to_irq() needs to be set in the
arch/arm/*omap*/gpio*.c then.

In fact, after a second thought, that might even work for OMAP1 because I'm
using the proper base (IRQ and GPIO) to convert the IRQ number.

static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq) {

        return gpio_irq - bank->irq_base + bank->chip.base;
}
Quoted 8 lines
Quoted 6 lines

But it might be good to test it on OMAP1 platform.

Tarun,

Do you have an OMAP1 board to test that.

Yes, I will test on OMAP1 board.

I have booted the image on OMAP1 with following change. I guess bank->irq_base was a typo?

Quoted 7 lines
Quoted 2 lines

Not at all :-), it was done on purpose to get rid if the static IRQ definition.

BTW, it was giving me following compilation error... drivers/gpio/gpio-omap.c: In function 'irq_to_gpio':
drivers/gpio/gpio-omap.c:90: error: 'struct gpio_bank' has no member named 'irq_base'
make[2]: *** [drivers/gpio/gpio-omap.o] Error 1

Oh, that's different... you are missing the cleanup patches from the DT series I did before this one:

eaabbb0 gpio/omap: Fix IRQ handling for SPARSE_IRQ fa560a7 arm/dts: OMAP3: Add gpio nodes
bfeb298 arm/dts: OMAP4: Add gpio nodes
3062158 gpio/omap: Add DT support to GPIO driver a140d12 gpio/omap: Use devm_ API and add request_mem_region 0416689 gpio/omap: Remove bank->id information and misc cleanup 249f60c Merge branch 'for_3.4/gpio_cleanup_fixes_v9' of
git://gitorious.org/~tarunkanti/omap-sw-deve

I'll push a temp branch for you.

Benoit

#8 lore raw

RFC PATCH 1/1 gpio/omap: Fix IRQ handling for SPARSE_IRQ

Hi Benoit,

Quoted 99 lines · Benoit
Quoted 76 lines · Tarun Kanti
Quoted 74 lines · On Fri, Feb 24, 2012 at 7:02 PM, Cousson, Benoit<[email protected]> ?wrote:
Quoted 69 lines · Tarun Kanti

Hi Benoit,

Quoted 53 lines · On Fri, Feb 24, 2012 at 4:07 PM, DebBarma, Tarun Kanti <[email protected]> ?…
Quoted 49 lines · On Fri, Feb 24, 2012 at 3:41 PM, Cousson, Benoit<[email protected]> ?wrote:

+ Tarun

Quoted 22 lines · Tony Lindgren
Quoted 5 lines · Cousson, Benoit

The GPIO driver is still relying on internal OMAP IRQ defines that are not relevant anymore if OMAP is built with SPARSE_IRQ.

Great :)

Quoted 3 lines

Please note that this patch is still RFC, because I do not know how to fix properly the ugly cpu_class_is_omap1 and the dependency with IH_MPUIO_BASE to detect a MPUIO.

Quoted 2 lines

Sounds like gpio_to_irq() needs to be set in the
arch/arm/*omap*/gpio*.c then.

In fact, after a second thought, that might even work for OMAP1 because
I'm
using the proper base (IRQ and GPIO) to convert the IRQ number.

static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq) {

? ? ? ?return gpio_irq - bank->irq_base + bank->chip.base; }

But it might be good to test it on OMAP1 platform.

Quoted 6 lines
Quoted 3 lines

Tarun,

Do you have an OMAP1 board to test that.

Yes, I will test on OMAP1 board.

I have booted the image on OMAP1 with following change. I guess bank->irq_base was a typo?

Quoted 8 lines
Quoted 2 lines

Not at all :-), it was done on purpose to get rid if the static IRQ definition.

BTW, it was giving me following compilation error... drivers/gpio/gpio-omap.c: In function 'irq_to_gpio':
drivers/gpio/gpio-omap.c:90: error: 'struct gpio_bank' has no member named 'irq_base'
make[2]: *** [drivers/gpio/gpio-omap.o] Error 1

Oh, that's different... you are missing the cleanup patches from the DT series I did before this one:

eaabbb0 gpio/omap: Fix IRQ handling for SPARSE_IRQ fa560a7 arm/dts: OMAP3: Add gpio nodes
bfeb298 arm/dts: OMAP4: Add gpio nodes
3062158 gpio/omap: Add DT support to GPIO driver a140d12 gpio/omap: Use devm_ API and add request_mem_region 0416689 gpio/omap: Remove bank->id information and misc cleanup 249f60c Merge branch 'for_3.4/gpio_cleanup_fixes_v9' of
git://gitorious.org/~tarunkanti/omap-sw-deve

Quoted 1 line

I'll push a temp branch for you.

I have pulled from git://gitorious.org/omap-pm/linux.git for_3.4/dt_gpio_dt. It is working on OMAP1710.
--
Tarun

author
#9 lore raw

RFC PATCH 1/1 gpio/omap: Fix IRQ handling for SPARSE_IRQ

Quoted 102 lines · Tarun Kanti

Hi Benoit,

Quoted 99 lines · Benoit
Quoted 76 lines · Tarun Kanti
Quoted 74 lines · Benoit
Quoted 69 lines · Tarun Kanti

Hi Benoit,

Quoted 53 lines · Tarun Kanti
Quoted 49 lines · Benoit

+ Tarun

Quoted 22 lines · Tony Lindgren
Quoted 5 lines · Cousson, Benoit

The GPIO driver is still relying on internal OMAP IRQ defines that are not relevant anymore if OMAP is built with SPARSE_IRQ.

Great :)

Quoted 3 lines

Please note that this patch is still RFC, because I do not know how to fix properly the ugly cpu_class_is_omap1 and the dependency with IH_MPUIO_BASE to detect a MPUIO.

Quoted 2 lines

Sounds like gpio_to_irq() needs to be set in the
arch/arm/*omap*/gpio*.c then.

In fact, after a second thought, that might even work for OMAP1 because
I'm
using the proper base (IRQ and GPIO) to convert the IRQ number.

static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq) {

        return gpio_irq - bank->irq_base + bank->chip.base;
}

But it might be good to test it on OMAP1 platform.

Quoted 6 lines
Quoted 3 lines

Tarun,

Do you have an OMAP1 board to test that.

Yes, I will test on OMAP1 board.

I have booted the image on OMAP1 with following change. I guess bank->irq_base was a typo?

Quoted 8 lines
Quoted 2 lines

Not at all :-), it was done on purpose to get rid if the static IRQ definition.

BTW, it was giving me following compilation error... drivers/gpio/gpio-omap.c: In function 'irq_to_gpio':
drivers/gpio/gpio-omap.c:90: error: 'struct gpio_bank' has no member named 'irq_base'
make[2]: *** [drivers/gpio/gpio-omap.o] Error 1

Oh, that's different... you are missing the cleanup patches from the DT series I did before this one:

eaabbb0 gpio/omap: Fix IRQ handling for SPARSE_IRQ fa560a7 arm/dts: OMAP3: Add gpio nodes
bfeb298 arm/dts: OMAP4: Add gpio nodes
3062158 gpio/omap: Add DT support to GPIO driver a140d12 gpio/omap: Use devm_ API and add request_mem_region 0416689 gpio/omap: Remove bank->id information and misc cleanup 249f60c Merge branch 'for_3.4/gpio_cleanup_fixes_v9' of
git://gitorious.org/~tarunkanti/omap-sw-deve

Quoted 4 lines
Quoted 1 line

I'll push a temp branch for you.

I have pulled from git://gitorious.org/omap-pm/linux.git for_3.4/dt_gpio_dt. It is working on OMAP1710.

Hehe, that's cool.

I'll repost the gpio DT series and add that one in it.

Thanks a lot.
Benoit

#10 lore raw

RFC PATCH 1/1 gpio/omap: Fix IRQ handling for SPARSE_IRQ

In reply to Cousson, Benoit
Quoted 69 lines · Benoit

The GPIO driver is still relying on internal OMAP IRQ defines that are not relevant anymore if OMAP is built with SPARSE_IRQ.

Replace the defines with the proper IRQ base number. Clean some comment style issue.
Remove some hidden and ugly cpu_class_is_omap1() inside the gpio header.

XXX: That fix might be broken for OMAP1 MPUIO case.

Signed-off-by Benoit Cousson <[email protected]>

---

Hi Tony,

Please note that this patch is still RFC, because I do not know how to fix properly the ugly cpu_class_is_omap1 and the dependency with IH_MPUIO_BASE to detect a MPUIO.

I'm still sending it, because it is needed to have SPARSE_IRQ working on OMAP4 with the previous series I've just sent.

Regards,
Benoit

 arch/arm/plat-omap/include/plat/gpio.h |   22 ++------------------
 drivers/gpio/gpio-omap.c               |   33 ++++++++++++++++---------------
 2 files changed, 20 insertions(+), 35 deletions(-)
arch/arm/plat-omap/include/plat/gpio.h +3 -19
index cb75b65..b8a96c6 100644
@@ -218,30 +218,14 @@ extern void omap_set_gpio_debounce(int gpio, int enable);
 extern void omap_set_gpio_debounce_time(int gpio, int enable);
 /*-------------------------------------------------------------------------*/
 
-/* Wrappers for "new style" GPIO calls, using the new infrastructure
+/*
+ * Wrappers for "new style" GPIO calls, using the new infrastructure
  * which lets us plug in FPGA, I2C, and other implementations.
- * *
+ *
  * The original OMAP-specific calls should eventually be removed.
  */
 
 #include <linux/errno.h>
 #include <asm-generic/gpio.h>
 
-static inline int irq_to_gpio(unsigned irq)
-{
-	int tmp;
-
-	/* omap1 SOC mpuio */
-	if (cpu_class_is_omap1() && (irq < (IH_MPUIO_BASE + 16)))
-		return (irq - IH_MPUIO_BASE) + OMAP_MAX_GPIO_LINES;
-
-	/* SOC gpio */
-	tmp = irq - IH_GPIO_BASE;
-	if (tmp < OMAP_MAX_GPIO_LINES)
-		return tmp;
-
-	/* we don't supply reverse mappings for non-SOC gpios */
-	return -EIO;
-}
-
 #endif
drivers/gpio/gpio-omap.c +0 -0
index bc2bd69..afef0f7 100644

drivers/gpio/gpio-omap.c struct gpio_bank { · line 98

Quoted 6 lines
drivers/gpio/gpio-omap.c +3 -0
@@ -93,6 +93,11 @@ struct gpio_bank {
 #define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
 #define GPIO_MOD_CTRL_BIT	BIT(0)
 
+static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq)
+{
+	return gpio_irq - bank->irq_base + bank->chip.base;

Ideally, you could do something like this when you have a domain setup:

irq_get_irq_data(gpio_irq)->hw_irq + bank->chip.base

Also, with sparse irq you need to have a call to irq_alloc_desc. You can avoid that by setting NR_IRQS or machine .nr_irqs, but that needs to go away.

Otherwise, it certainly is a step in the right direction.

Rob

author
#11 lore raw

RFC PATCH 1/1 gpio/omap: Fix IRQ handling for SPARSE_IRQ

Quoted 1 line · Rob Herring

On 02/23/2012 04:46 PM, Cousson, Benoit wrote:

...

Quoted 8 lines
Quoted 8 lines
drivers/gpio/gpio-omap.c +0 -0
index bc2bd69..afef0f7 100644
@@ -93,6 +93,11 @@ struct gpio_bank {
  #define GPIO_BIT(bank, gpio) (1<<  GPIO_INDEX(bank, gpio))
  #define GPIO_MOD_CTRL_BIT	BIT(0)
Quoted 7 lines

drivers/gpio/gpio-omap.c struct gpio_bank { · line 98

Quoted 3 lines
drivers/gpio/gpio-omap.c +3 -0
+static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq)
+{
+	return gpio_irq - bank->irq_base + bank->chip.base;

Ideally, you could do something like this when you have a domain setup:

irq_get_irq_data(gpio_irq)->hw_irq + bank->chip.base

OK, good to know. I still plan to move the current irq_domain basic support to the irqchip stuff you have done. I'll do that after 3.4.

Quoted 1 line

Also, with sparse irq you need to have a call to irq_alloc_desc.

irq_alloc_desc was already added as part of the DT migration patch. It was not explicit in the changelog, but that patch is based on GPIO cleanup + DT migration series.

Quoted 2 lines

You can avoid that by setting NR_IRQS or machine .nr_irqs, but that needs to go away.

Based on a recommendation you did in the commit to fix GIC I did that in the SPARSE_IRQ series I've just sent before that RFC patch:

+#ifdef CONFIG_SPARSE_IRQ
+#define NR_IRQS NR_IRQS_LEGACY
+#else
#define NR_IRQS OMAP_GPMC_IRQ_END
+#endif

Quoted 1 line

Otherwise, it certainly is a step in the right direction.

Yeah, there is still a long way to clean all the old nasty IRQ stuff in OMAP :-)

Thanks,
Benoit