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EXYNOS: definitions of system resgister and power management registers.

PATCH Superseded Donghwa Lee 2 participants 2 messages Apr 5, 2012

Subsystems (2)
Arm (32-bit) Arm Samsung Exynos

v1 of 2 Superseded Latest is v2 →

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Donghwa Lee

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PATCH 1/7 EXYNOS: definitions of system resgister and power management registers.

This is definitions of system registers and power mananagement registers for EXYNOS SoC.

Signed-off-by Donghwa Lee <[email protected]>
Signed-off-by Kyungmin Park <[email protected]>
Signed-off-by Inki Dae <[email protected]>
---
 arch/arm/cpu/armv7/exynos/Makefile        |    2 +-
 arch/arm/cpu/armv7/exynos/power.c         |   54 +++++++++++++++++++++++++++++
 arch/arm/cpu/armv7/exynos/system.c        |   48 +++++++++++++++++++++++++
 arch/arm/include/asm/arch-exynos/cpu.h    |    5 +++
 arch/arm/include/asm/arch-exynos/power.h  |    6 +++
 arch/arm/include/asm/arch-exynos/system.h |   53 ++++++++++++++++++++++++++++
 6 files changed, 167 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/exynos/power.c
 create mode 100644 arch/arm/cpu/armv7/exynos/system.c
 create mode 100644 arch/arm/include/asm/arch-exynos/system.h
arch/arm/cpu/armv7/exynos/Makefile +1 -1
index 124c380..90ec2bd 100644
@@ -22,7 +22,7 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(SOC).o
 
-COBJS	+= clock.o soc.o
+COBJS	+= clock.o power.o soc.o system.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS) $(SOBJS))
arch/arm/cpu/armv7/exynos/power.c new file +54 -0

54 lines not on this page · raw message

arch/arm/cpu/armv7/exynos/system.c new file +48 -0

48 lines not on this page · raw message

arch/arm/include/asm/arch-exynos/cpu.h +5 -0
index 89f2c2e..ac4ddc7 100644
@@ -29,6 +29,7 @@
 /* EXYNOS4 */
 #define EXYNOS4_GPIO_PART3_BASE		0x03860000
 #define EXYNOS4_PRO_ID			0x10000000
+#define EXYNOS4_SYSREG_BASE		0x10010000
 #define EXYNOS4_POWER_BASE		0x10020000
 #define EXYNOS4_SWRESET			0x10020400
 #define EXYNOS4_CLOCK_BASE		0x10030000

@@ -40,6 +41,7 @@
 #define EXYNOS4_GPIO_PART2_BASE		0x11000000
 #define EXYNOS4_GPIO_PART1_BASE		0x11400000
 #define EXYNOS4_FIMD_BASE		0x11C00000
+#define EXYNOS4_MIPI_DSIM_BASE		0x11C80000
 #define EXYNOS4_USBOTG_BASE		0x12480000
 #define EXYNOS4_MMC_BASE		0x12510000
 #define EXYNOS4_SROMC_BASE		0x12570000

@@ -65,6 +67,7 @@
 #define EXYNOS5_GPIO_PART3_BASE		0x10D10000
 #define EXYNOS5_DMC_CTRL_BASE		0x10DD0000
 #define EXYNOS5_GPIO_PART1_BASE		0x11400000
+#define EXYNOS5_MIPI_DSIM_BASE		0x11D00000
 #define EXYNOS5_MMC_BASE		0x12200000
 #define EXYNOS5_SROMC_BASE		0x12250000
 #define EXYNOS5_USBOTG_BASE		0x12480000

@@ -127,7 +130,9 @@ static inline unsigned int samsung_get_base_##device(void)	\
 
 SAMSUNG_BASE(adc, ADC_BASE)
 SAMSUNG_BASE(clock, CLOCK_BASE)
+SAMSUNG_BASE(sysreg, SYSREG_BASE)
 SAMSUNG_BASE(fimd, FIMD_BASE)
+SAMSUNG_BASE(mipi_dsim, MIPI_DSIM_BASE)
 SAMSUNG_BASE(gpio_part1, GPIO_PART1_BASE)
 SAMSUNG_BASE(gpio_part2, GPIO_PART2_BASE)
 SAMSUNG_BASE(gpio_part3, GPIO_PART3_BASE)
arch/arm/include/asm/arch-exynos/power.h +6 -0
index fb442f7..6d99d54 100644
@@ -227,4 +227,10 @@ struct exynos4_power {
 };
 #endif	/* __ASSEMBLY__ */
 
+void set_mipi_phy_ctrl(unsigned int enable, unsigned int dev_index);
+
+#define EXYNOS_MIPI_PHY_ENABLE		(1 << 0)
+#define EXYNOS_MIPI_PHY_SRESETN		(1 << 1)
+#define EXYNOS_MIPI_PHY_MRESETN		(1 << 2)
+
 #endif
arch/arm/include/asm/arch-exynos/system.h new file +53 -0

53 lines not on this page · raw message

Signature · 1 line
1.7.4.1
#1 lore raw

PATCH 1/7 EXYNOS: definitions of system resgister and power management registers.

Quoted 42 lines · Donghwa Lee

This is definitions of system registers and power mananagement registers for EXYNOS SoC.

Signed-off-by Donghwa Lee <[email protected]>
Signed-off-by Kyungmin Park <[email protected]>
Signed-off-by Inki Dae <[email protected]>

---

?arch/arm/cpu/armv7/exynos/Makefile ? ? ? ?| ? ?2 +-
?arch/arm/cpu/armv7/exynos/power.c ? ? ? ? | ? 54 +++++++++++++++++++++++++++++
?arch/arm/cpu/armv7/exynos/system.c ? ? ? ?| ? 48 +++++++++++++++++++++++++
?arch/arm/include/asm/arch-exynos/cpu.h ? ?| ? ?5 +++
?arch/arm/include/asm/arch-exynos/power.h ?| ? ?6 +++
?arch/arm/include/asm/arch-exynos/system.h | ? 53 ++++++++++++++++++++++++++++

?6 files changed, 167 insertions(+), 1 deletions(-) ?create mode 100644 arch/arm/cpu/armv7/exynos/power.c ?create mode 100644 arch/arm/cpu/armv7/exynos/system.c ?create mode 100644 arch/arm/include/asm/arch-exynos/system.h

arch/arm/cpu/armv7/exynos/power.c new file +19 -0
new file mode 100644
index 0000000..af7aecf
@@ -0,0 +1,54 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ * Donghwa Lee <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. ?See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software

arch/arm/cpu/armv7/exynos/power.c line 29

Quoted 10 lines
arch/arm/cpu/armv7/exynos/power.c new file +10 -0
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/power.h>
+
+static void exynos4_mipi_phy_control(unsigned int enable,
+ ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? unsigned int dev_index)

Please reorder parameters, dev_index should be first parameter.

arch/arm/cpu/armv7/exynos/power.c line 35

Quoted 6 lines
arch/arm/cpu/armv7/exynos/power.c new file +6 -0
+{
+ ? ? ? struct exynos4_power *pmu =
+ ? ? ? ? ? (struct exynos4_power *)samsung_get_base_power();
+ ? ? ? unsigned int addr, cfg = 0;
+
+ ? ? ? if (dev_index < 1)

I think dev_index == 0 is better.

Quoted 9 lines
arch/arm/cpu/armv7/exynos/power.c new file +9 -0
+ ? ? ? ? ? ? ? addr = (unsigned int)&pmu->mipi_phy0_control;
+ ? ? ? else
+ ? ? ? ? ? ? ? addr = (unsigned int)&pmu->mipi_phy1_control;
+
+
+ ? ? ? cfg = readl(addr);
+ ? ? ? if (enable)
+ ? ? ? ? ? ? ? cfg |= (EXYNOS_MIPI_PHY_MRESETN | EXYNOS_MIPI_PHY_ENABLE);
+ ? ? ? else

arch/arm/cpu/armv7/exynos/power.c line 54

Quoted 10 lines
arch/arm/cpu/armv7/exynos/power.c new file +10 -0
+ ? ? ? ? ? ? ? cfg &= ~(EXYNOS_MIPI_PHY_MRESETN | EXYNOS_MIPI_PHY_ENABLE);
+
+ ? ? ? writel(cfg, addr);
+}
+
+void set_mipi_phy_ctrl(unsigned int enable, unsigned int dev_index)
+{
+ ? ? ? if (cpu_is_exynos4())
+ ? ? ? ? ? ? ? exynos4_mipi_phy_control(enable, dev_index);
+}

Thanks.
Minkyu Kang.

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