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Freescale fec.c driver breakage

DISCUSSION Greg Ungerer 4 participants 16 messages Jun 4, 2012 – Jun 7, 2012

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#0 lore raw

Hi Sascha,

Commit f4d40de39a23f0c39cca55ac63e1175c69c3d2f7 ("net fec: do not depend on grouped clocks") breaks compilation of the FEC driver for non iMX platforms in linux-3.5-rc1. For example when compiling for ColdFire I get:

	  LD      vmlinux
     drivers/built-in.o: In function `fec_probe':
     fec.c:(.devinit.text+0x1e0): undefined reference to `devm_clk_get'

Trivially we could conditionalize the code block that calls devm_clk_get() in the probe routine, but that is kind of ugly.

Can you come up with a better fix?

Regards
Greg

Signature · 5 lines
------------------------------------------------------------------------
Greg Ungerer  --  Principal Engineer        EMAIL:     gerg at snapgear.com
SnapGear Group, McAfee                      PHONE:       +61 7 3435 2888
8 Gardner Close                             FAX:         +61 7 3217 5323
Milton, QLD, 4064, Australia                WEB: http://www.SnapGear.com
#1 lore raw

Hi Greg,

Quoted 11 lines · Greg Ungerer

Hi Sascha,

Commit f4d40de39a23f0c39cca55ac63e1175c69c3d2f7 ("net fec: do not depend on grouped clocks") breaks compilation of the FEC driver for non iMX platforms in linux-3.5-rc1. For example when compiling for ColdFire I get:

	  LD      vmlinux
    drivers/built-in.o: In function `fec_probe':
    fec.c:(.devinit.text+0x1e0): undefined reference to `devm_clk_get'

Sorry, I forgot that this driver is used on coldfire.

Quoted 3 lines

Trivially we could conditionalize the code block that calls devm_clk_get() in the probe routine, but that is kind of ugly.

It's ugly, but the only other solution I see is that you could provide a dummy devm_clk_get() for coldfire. Added Mark to Cc, maybe he has another idea?

Sascha

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Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
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#2 lore raw
Quoted 8 lines · Sascha Hauer
Quoted 2 lines · Greg Ungerer

Trivially we could conditionalize the code block that calls devm_clk_get() in the probe routine, but that is kind of ugly.

It's ugly, but the only other solution I see is that you could provide a dummy devm_clk_get() for coldfire. Added Mark to Cc, maybe he has another idea?

Not really, I think if the clock API is going to be usable we really
need the platforms to all be implementing it. Part of this is getting
the stubs for !HAVE_CLK cases implemented (which doesn't seem to have
happened :/) ). We do need to address this at the framework level,
having to put ifdefs in all the drivers is obviously awful.
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#3 lore raw
Quoted 10 lines · Mark Brown
Quoted 8 lines · Sascha Hauer
Quoted 2 lines · Greg Ungerer

Trivially we could conditionalize the code block that calls devm_clk_get() in the probe routine, but that is kind of ugly.

It's ugly, but the only other solution I see is that you could provide a dummy devm_clk_get() for coldfire. Added Mark to Cc, maybe he has another idea?

Quoted 5 lines

Not really, I think if the clock API is going to be usable we really need the platforms to all be implementing it. Part of this is getting the stubs for !HAVE_CLK cases implemented (which doesn't seem to have happened :/) ). We do need to address this at the framework level, having to put ifdefs in all the drivers is obviously awful.

Is this something you intend "fixing" then?

I don't mind putting a simplistic (but do nothing) place holder for this function along with the other stubbed clk functions in the m68k/ coldfire code.

But more generally I am wondering does it make sense to be working on specific platform clocks in a multi-platform/arch driver?

Regards
Greg

Signature · 5 lines
------------------------------------------------------------------------
Greg Ungerer  --  Principal Engineer        EMAIL:     gerg at snapgear.com
SnapGear Group, McAfee                      PHONE:       +61 7 3435 2888
8 Gardner Close                             FAX:         +61 7 3217 5323
Milton, QLD, 4064, Australia                WEB: http://www.SnapGear.com
#4 lore raw
Quoted 9 lines · Greg Ungerer
Quoted 5 lines · Mark Brown

Not really, I think if the clock API is going to be usable we really need the platforms to all be implementing it. Part of this is getting the stubs for !HAVE_CLK cases implemented (which doesn't seem to have happened :/) ). We do need to address this at the framework level, having to put ifdefs in all the drivers is obviously awful.

Is this something you intend "fixing" then?

No, if I were going to do anything here it'd be converting everything over to the common clock API so we didn't have to deal with this sort of issue, it really makes the clock API unusable for generic code.

Quoted 6 lines

I don't mind putting a simplistic (but do nothing) place holder for this function along with the other stubbed clk functions in the m68k/ coldfire code.

But more generally I am wondering does it make sense to be working on specific platform clocks in a multi-platform/arch driver?

Yes, if it's a reusable IP then it's going to have a fixed set of clocks
which go into it regardless of which platform it's hooked up to. clkdev
provides an abstraction which can map these onto the platform, even if
you don't use the generic clk API clkdev is still very useful and will
help with a lot of these issues.
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#5 lore raw
Quoted 19 lines · Mark Brown
Quoted 9 lines · Greg Ungerer
Quoted 5 lines · Mark Brown

Not really, I think if the clock API is going to be usable we really need the platforms to all be implementing it. Part of this is getting the stubs for !HAVE_CLK cases implemented (which doesn't seem to have happened :/) ). We do need to address this at the framework level, having to put ifdefs in all the drivers is obviously awful.

Is this something you intend "fixing" then?

No, if I were going to do anything here it'd be converting everything over to the common clock API so we didn't have to deal with this sort of issue, it really makes the clock API unusable for generic code.

Quoted 3 lines

I don't mind putting a simplistic (but do nothing) place holder for this function along with the other stubbed clk functions in the m68k/ coldfire code.

Quoted 5 lines
Quoted 2 lines

But more generally I am wondering does it make sense to be working on specific platform clocks in a multi-platform/arch driver?

Yes, if it's a reusable IP then it's going to have a fixed set of clocks which go into it regardless of which platform it's hooked up to.

I really don't think you can make that assumption here. Freescale have come up with a number of weird and slightly different permutations of this ethernet core.

Quoted 4 lines

clkdev
provides an abstraction which can map these onto the platform, even if you don't use the generic clk API clkdev is still very useful and will help with a lot of these issues.

In this specific case I don't know what the ipg or ahb clocks are on iMX (Sascha?), but there is nothing equivalent to them in the FEC cores used on existing ColdFire CPUs. They seem to be platform specific (iMX) more than FEC driver specific.

Regards
Greg

------------------------------------------------------------------------

Greg Ungerer  --  Principal Engineer        EMAIL:     gerg at snapgear.com
SnapGear Group, McAfee                      PHONE:       +61 7 3435 2888
8 Gardner Close,                            FAX:         +61 7 3891 3630
Milton, QLD, 4064, Australia                WEB: http://www.SnapGear.com
#6 lore raw
Quoted 8 lines · Greg Ungerer
Quoted 2 lines · Mark Brown

Yes, if it's a reusable IP then it's going to have a fixed set of clocks which go into it regardless of which platform it's hooked up to.

I really don't think you can make that assumption here. Freescale have come up with a number of weird and slightly different permutations of this ethernet core.

That's just sounding like a standard "driver needs to take care of chip revisions" thing though?

Quoted 9 lines
Quoted 4 lines

clkdev
provides an abstraction which can map these onto the platform, even if you don't use the generic clk API clkdev is still very useful and will help with a lot of these issues.

In this specific case I don't know what the ipg or ahb clocks are on iMX (Sascha?), but there is nothing equivalent to them in the FEC cores used on existing ColdFire CPUs. They seem to be platform specific (iMX) more than FEC driver specific.

It's possible both are just always on in the ColdFire systems, at least when Linux is running. The AHB will be the I/O bus for the device (AHB is a standard for interfacing between IPs) and I suspect IPG is the main clock for the IP, both of which sound like they will always be there even if there's no soft control of them.

FWIW I'm about to send a patch which will make devm_clk_get() available
with HAVE_CLK, though it would still be good to start looking at moving
ColdFire to the common clock infrastructure.
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#7 lore raw
Quoted 23 lines · Mark Brown
Quoted 8 lines · Greg Ungerer
Quoted 2 lines · Mark Brown

Yes, if it's a reusable IP then it's going to have a fixed set of clocks which go into it regardless of which platform it's hooked up to.

I really don't think you can make that assumption here. Freescale have come up with a number of weird and slightly different permutations of this ethernet core.

That's just sounding like a standard "driver needs to take care of chip revisions" thing though?

Quoted 9 lines
Quoted 4 lines

clkdev
provides an abstraction which can map these onto the platform, even if you don't use the generic clk API clkdev is still very useful and will help with a lot of these issues.

In this specific case I don't know what the ipg or ahb clocks are on iMX (Sascha?), but there is nothing equivalent to them in the FEC cores used on existing ColdFire CPUs. They seem to be platform specific (iMX) more than FEC driver specific.

Quoted 5 lines

It's possible both are just always on in the ColdFire systems, at least when Linux is running. The AHB will be the I/O bus for the device (AHB is a standard for interfacing between IPs) and I suspect IPG is the main clock for the IP, both of which sound like they will always be there even if there's no soft control of them.

I am pretty sure AHB was bolted on later. This FEC core has progressed from very old Motorola PowerPC platforms to ColdFire/M68k to ARM, over something coming close to a 20 year period. In the earlier uses of it there is quite a few differences (including some quite odd register layout differences).

There may be other things that are somewhat like an ahb clock and ipg clock, but really these are things that have come along later with a specific platform implementation.

Quoted 3 lines

FWIW I'm about to send a patch which will make devm_clk_get() available with HAVE_CLK, though it would still be good to start looking at moving ColdFire to the common clock infrastructure.

Sure, agreed.

Regards
Greg

------------------------------------------------------------------------

Greg Ungerer  --  Principal Engineer        EMAIL:     gerg at snapgear.com
SnapGear Group, McAfee                      PHONE:       +61 7 3435 2888
8 Gardner Close,                            FAX:         +61 7 3891 3630
Milton, QLD, 4064, Australia                WEB: http://www.SnapGear.com
#8 lore raw
Quoted 9 lines · Greg Ungerer

I am pretty sure AHB was bolted on later. This FEC core has progressed from very old Motorola PowerPC platforms to ColdFire/M68k to ARM, over something coming close to a 20 year period. In the earlier uses of it there is quite a few differences (including some quite odd register layout differences).

There may be other things that are somewhat like an ahb clock and ipg clock, but really these are things that have come along later with a specific platform implementation.

For AHB that sounds plausible, but for the IPG clock (assuming I've
identified the function correctly) I've got a very hard time believing
that the IP ever didn't need a clock - my understanding is that it's the
master clock for the IP ("IP gate").
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#9 lore raw
In reply to Greg Ungerer
Quoted 10 lines · Greg Ungerer
Quoted 5 lines

clkdev
provides an abstraction which can map these onto the platform, even if you don't use the generic clk API clkdev is still very useful and will help with a lot of these issues.

In this specific case I don't know what the ipg or ahb clocks are on iMX (Sascha?), but there is nothing equivalent to them in the FEC cores used on existing ColdFire CPUs. They seem to be platform specific (iMX) more than FEC driver specific.

I am sure the Coldfire FEC also needs clocks to work. Just like Mark said, they may be not software controllable. The names 'ipg' and 'ahb' may be i.MX specific though.

Sascha

Signature · 4 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
#10 lore raw
Quoted 7 lines · Sascha Hauer
Quoted 6 lines · Greg Ungerer
Quoted 5 lines

clkdev
provides an abstraction which can map these onto the platform, even if you don't use the generic clk API clkdev is still very useful and will help with a lot of these issues.

Quoted 8 lines
Quoted 4 lines

In this specific case I don't know what the ipg or ahb clocks are on iMX (Sascha?), but there is nothing equivalent to them in the FEC cores used on existing ColdFire CPUs. They seem to be platform specific (iMX) more than FEC driver specific.

I am sure the Coldfire FEC also needs clocks to work. Just like Mark said, they may be not software controllable. The names 'ipg' and 'ahb' may be i.MX specific though.

Well, yeah, of course there are clocks involved. But you pretty much hit the point here. 'ipg' and 'ahb' here are platform specific.

Regards
Greg

------------------------------------------------------------------------

Greg Ungerer  --  Principal Engineer        EMAIL:     gerg at snapgear.com
SnapGear Group, McAfee                      PHONE:       +61 7 3435 2888
8 Gardner Close,                            FAX:         +61 7 3891 3630
Milton, QLD, 4064, Australia                WEB: http://www.SnapGear.com
#11 lore raw
Quoted 2 lines · Greg Ungerer

Well, yeah, of course there are clocks involved. But you pretty much hit the point here. 'ipg' and 'ahb' here are platform specific.

What should be happening for that is that the driver requests with some generic name which is referenced to the IP (unfortunately these are usually not documented for the public...) and then clkdev or some platform specific code is used to map the names onto the underlying clocks.

If 'ahb' isn't suitable how about 'bus', and for 'ipg' how about 'mclk'
or something?
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#15 lore raw
In reply to Greg Ungerer
Quoted 13 lines · Greg Ungerer
Quoted 12 lines · Sascha Hauer
Quoted 10 lines · Greg Ungerer
Quoted 5 lines

clkdev
provides an abstraction which can map these onto the platform, even if you don't use the generic clk API clkdev is still very useful and will help with a lot of these issues.

In this specific case I don't know what the ipg or ahb clocks are on iMX (Sascha?), but there is nothing equivalent to them in the FEC cores used on existing ColdFire CPUs. They seem to be platform specific (iMX) more than FEC driver specific.

Quoted 6 lines
Quoted 3 lines

I am sure the Coldfire FEC also needs clocks to work. Just like Mark said, they may be not software controllable. The names 'ipg' and 'ahb' may be i.MX specific though.

Well, yeah, of course there are clocks involved. But you pretty much hit the point here. 'ipg' and 'ahb' here are platform specific.

Are there any FEC specific names? If yes, we could use these instead, otherwise if we have to make up names ourselves I think 'ipg' and 'ahb' are fine.

Sascha

Signature · 4 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
#12 lore raw
In reply to Mark Brown
Quoted 4 lines · Mark Brown
Quoted 2 lines · Greg Ungerer

Well, yeah, of course there are clocks involved. But you pretty much hit the point here. 'ipg' and 'ahb' here are platform specific.

Quoted 8 lines

What should be happening for that is that the driver requests with some generic name which is referenced to the IP (unfortunately these are usually not documented for the public...) and then clkdev or some platform specific code is used to map the names onto the underlying clocks.

If 'ahb' isn't suitable how about 'bus', and for 'ipg' how about 'mclk' or something?

Some of the newer Coldfire parts such as the m54455/m5441x do have software controllable clocks; but they keep it simple with one clock per fec, and names in the documentation like 'fec0, fec1' for the m54455
and 'macnet0,macnet1' for the m5441x.

#13 lore raw
Quoted 11 lines · Steven King
Quoted 10 lines · Mark Brown
Quoted 2 lines · Greg Ungerer

Well, yeah, of course there are clocks involved. But you pretty much hit the point here. 'ipg' and 'ahb' here are platform specific.

What should be happening for that is that the driver requests with some generic name which is referenced to the IP (unfortunately these are usually not documented for the public...) and then clkdev or some platform specific code is used to map the names onto the underlying clocks.

Quoted 7 lines
Quoted 2 lines

If 'ahb' isn't suitable how about 'bus', and for 'ipg' how about 'mclk' or something?

Some of the newer Coldfire parts such as the m54455/m5441x do have software controllable clocks; but they keep it simple with one clock per fec, and names in the documentation like 'fec0, fec1' for the m54455
and 'macnet0,macnet1' for the m5441x.

Most of the older ones don't. Most of the older parts that have a FEC core have a single clock-in for the chip, possibly a PLL and often a fixed divisor for distribuion to all on-chip peripherals. I have seen it named various names, 'bclko', 'mclk', "fsys/2", nothing seems consistent.

I think very generic namse might be the best solution here.

Regards
Greg

------------------------------------------------------------------------

Greg Ungerer  --  Principal Engineer        EMAIL:     gerg at snapgear.com
SnapGear Group, McAfee                      PHONE:       +61 7 3435 2888
8 Gardner Close                             FAX:         +61 7 3217 5323
Milton, QLD, 4064, Australia                WEB: http://www.SnapGear.com
#14 lore raw
Quoted 6 lines · Greg Ungerer

Most of the older ones don't. Most of the older parts that have a FEC core have a single clock-in for the chip, possibly a PLL and often a fixed divisor for distribuion to all on-chip peripherals. I have seen it named various names, 'bclko', 'mclk', "fsys/2", nothing seems consistent.

I think very generic namse might be the best solution here.

Bear in mind that the IP level names shouldn't need to correspond to the
names used in the overall system integration.
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