EXYNOS5: support display system register control

PATCH New Donghwa Lee 1 participant 1 message Jul 2, 2012

Subsystems (2)

Arm (32-bit) Arm Samsung Exynos

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Donghwa Lee

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2012-07-02 11:15 UTC #0 lore raw

PATCH 2/8 EXYNOS5: support display system register control

This patch supports display block system regisger control.

Signed-off-by Donghwa Lee <[email protected]>

Signed-off-by Kyungmin Park <[email protected]>

---
 arch/arm/cpu/armv7/exynos/system.c |   18 ++++++++++++++++++
 1 files changed, 18 insertions(+), 0 deletions(-)

arch/arm/cpu/armv7/exynos/system.c +18 -0

index cc6ee03..5a6747a 100644
@@ -63,8 +63,26 @@ static void exynos4_set_system_display(void)
 	writel(cfg, &sysreg->display_ctrl);
 }
 
+static void exynos5_set_system_display(void)
+{
+	struct exynos5_sysreg *sysreg =
+	    (struct exynos5_sysreg *)samsung_get_base_sysreg();
+	unsigned int cfg = 0;
+
+	/*
+	 * system register path set
+	 * 0: MIE/MDNIE
+	 * 1: FIMD Bypass
+	 */
+	cfg = readl(&sysreg->disp1blk_cfg);
+	cfg |= (1 << 15);
+	writel(cfg, &sysreg->disp1blk_cfg);
+}
+
 void set_system_display_ctrl(void)
 {
 	if (cpu_is_exynos4())
 		exynos4_set_system_display();
+	else
+		exynos5_set_system_display();
 }

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