mvsas: expander write performance enhancement

PATCH New [email protected] 1 participant 1 message Sep 28, 2011 SCSI

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2011-09-28 16:35 UTC #0 lore raw

PATCH 6/8 mvsas: expander write performance enhancement

From: Xiangliang Yu <[email protected]>

-- with 1 expander, connect 8 HDD, the write performance will be
improved by 80%.

Signed-off-by Xiangliang Yu <[email protected]>

---
 drivers/scsi/mvsas/mv_94xx.c |    9 +++++++++
 drivers/scsi/mvsas/mv_defs.h |    1 +
 2 files changed, 10 insertions(+), 0 deletions(-)

drivers/scsi/mvsas/mv_94xx.c +9 -0

index 4d1a8c7..ba667db 100644
@@ -511,6 +511,15 @@ static int __devinit mvs_94xx_init(struct mvs_info *mvi)
 	tmp |= CINT_PHY_MASK;
 	mw32(MVS_INT_MASK, tmp);
 
+	/* tune STP performance */
+	tmp = 0x003F003F;
+	mvs_cw32(mvi, CMD_PL_TIMER, tmp);
+
+	/* This can improve expander large block size seq write performance */
+	tmp = mvs_cr32(mvi, CMD_PORT_LAYER_TIMER1);
+	tmp |= 0xFFFF007F;
+	mvs_cw32(mvi, CMD_PORT_LAYER_TIMER1, tmp);
+
 	/* change the connection open-close behavior (bit 9) 
 	 * set bit8 to 1 for performance tuning */
 	tmp = mvs_cr32(mvi, CMD_SL_MODE0);

drivers/scsi/mvsas/mv_defs.h +1 -0

index dec7cad..8e21482 100644
@@ -387,6 +387,7 @@ enum sas_cmd_port_registers {
 	CMD_SL_MODE0		= 0x1BC, /* SL Mode 0 */
 	CMD_SL_MODE1		= 0x1C0, /* SL Mode 1 */
 	CMD_PND_FIFO_CTL1	= 0x1C4, /* Pending FIFO Control 1 */
+	CMD_PORT_LAYER_TIMER1	= 0x1E0, /* Port Layer Timer 1 */
 };
 
 enum mvs_info_flags {

Signature · 1 line

1.7.4.4