mmc: s5p_sdhci: add the set_mmc_clk for cmu control

PATCH New Jaehoon Chung 1 participant 1 message Jul 20, 2012 MMC, SD and SDIO

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Jaehoon Chung

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2012-07-20 04:59 UTC #0 lore raw

PATCH 3/3 mmc: s5p_sdhci: add the set_mmc_clk for cmu control

Samsung SoC use the cmu control to set clock.

Signed-off-by Jaehoon Chung <[email protected]>

Signed-off-by Kyungmin Park <[email protected]>

---
 drivers/mmc/s5p_sdhci.c |    3 +++
 drivers/mmc/sdhci.c     |    3 +++
 include/sdhci.h         |    2 ++
 3 files changed, 8 insertions(+), 0 deletions(-)

drivers/mmc/s5p_sdhci.c +3 -0

index d7e92a4..d98c8cb 100644
@@ -21,6 +21,7 @@
 #include <malloc.h>
 #include <sdhci.h>
 #include <asm/arch/mmc.h>
+#include <asm/arch/clk.h>
 
 static char *S5P_NAME = "SAMSUNG SDHCI";
 static void s5p_sdhci_set_control_reg(struct sdhci_host *host)

@@ -90,6 +91,8 @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width)
 		host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
 
 	host->set_control_reg = &s5p_sdhci_set_control_reg;
+	host->set_clock = set_mmc_clk;
+	host->index = index;
 
 	host->host_caps = MMC_MODE_HC;

drivers/mmc/sdhci.c +3 -0

index 1709643..ac39e48 100644
@@ -279,6 +279,9 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
 	}
 	div >>= 1;
 
+	if (host->set_clock)
+		host->set_clock(host->index, div);
+
 	clk = (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
 	clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
 		<< SDHCI_DIVIDER_HI_SHIFT;

include/sdhci.h +2 -0

index 9d37183..4351a62 100644
@@ -248,8 +248,10 @@ struct sdhci_host {
 	unsigned int clock;
 	struct mmc *mmc;
 	const struct sdhci_ops *ops;
+	int index;
 
 	void (*set_control_reg)(struct sdhci_host *host);
+	void (*set_clock)(int dev_index, unsigned int div);
 	uint	voltages;
 };

Signature · 1 line

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