cxd2820r: TS clock inversion in config
Subsystems (2)
PATCH 1/1 cxd2820r: TS clock inversion in config
TS clock inversion in config.
Signed-off-by Evgeny Plehov <[email protected]>
--- drivers/media/dvb-frontends/cxd2820r.h | 6 ++++++ drivers/media/dvb-frontends/cxd2820r_c.c | 1 + drivers/media/dvb-frontends/cxd2820r_t.c | 1 + drivers/media/dvb-frontends/cxd2820r_t2.c | 1 + 4 files changed, 9 insertions(+)
drivers/media/dvb-frontends/cxd2820r.h +6 -0
@@ -52,6 +52,12 @@ struct cxd2820r_config {*/ u8 ts_mode; +/* TS clock inverted. +* Default: 0 +* Values: 0, 1 +*/ +bool ts_clock_inv; +/* IF AGC polarity. * Default: 0 * Values: 0, 1
drivers/media/dvb-frontends/cxd2820r_c.c +1 -0
@@ -45,6 +45,7 @@ int cxd2820r_set_frontend_c(struct dvb_frontend *fe) { 0x1008b, 0x07, 0xff }, { 0x1001f, priv->cfg.if_agc_polarity << 7, 0x80 }, { 0x10070, priv->cfg.ts_mode, 0xff }, + { 0x10071, !priv->cfg.ts_clock_inv << 4, 0x10 }, }; dev_dbg(&priv->i2c->dev, "%s: frequency=%d symbol_rate=%d\n", __func__,
drivers/media/dvb-frontends/cxd2820r_t.c +1 -0
@@ -46,6 +46,7 @@ int cxd2820r_set_frontend_t(struct dvb_frontend *fe) { 0x00088, 0x01, 0xff }, { 0x00070, priv->cfg.ts_mode, 0xff }, + { 0x00071, !priv->cfg.ts_clock_inv << 4, 0x10 }, { 0x000cb, priv->cfg.if_agc_polarity << 6, 0x40 }, { 0x000a5, 0x00, 0x01 }, { 0x00082, 0x20, 0x60 },
drivers/media/dvb-frontends/cxd2820r_t2.c +1 -0
@@ -47,6 +47,7 @@ int cxd2820r_set_frontend_t2(struct dvb_frontend *fe) { 0x02083, 0x0a, 0xff }, { 0x020cb, priv->cfg.if_agc_polarity << 6, 0x40 }, { 0x02070, priv->cfg.ts_mode, 0xff }, + { 0x02071, !priv->cfg.ts_clock_inv << 6, 0x40 }, { 0x020b5, priv->cfg.spec_inv << 4, 0x10 }, { 0x02567, 0x07, 0x0f }, { 0x02569, 0x03, 0x03 },
Signature · 1 line
1.9.1
Reviewed-by Antti Palosaari <[email protected]>
Acked-by Antti Palosaari <[email protected]>
Quoted 64 lines · CrazyCat
TS clock inversion in config.
Signed-off-by Evgeny Plehov <[email protected]>--- drivers/media/dvb-frontends/cxd2820r.h | 6 ++++++ drivers/media/dvb-frontends/cxd2820r_c.c | 1 + drivers/media/dvb-frontends/cxd2820r_t.c | 1 + drivers/media/dvb-frontends/cxd2820r_t2.c | 1 + 4 files changed, 9 insertions(+)drivers/media/dvb-frontends/cxd2820r.h +6
-0@@ -52,6 +52,12 @@ struct cxd2820r_config {*/ u8 ts_mode; +/* TS clock inverted. +* Default: 0 +* Values: 0, 1 +*/ +bool ts_clock_inv; +/* IF AGC polarity. * Default: 0 * Values: 0, 1 drivers/media/dvb-frontends/cxd2820r_c.c +1
-0@@ -45,6 +45,7 @@ int cxd2820r_set_frontend_c(struct dvb_frontend *fe) { 0x1008b, 0x07, 0xff }, { 0x1001f, priv->cfg.if_agc_polarity << 7, 0x80 }, { 0x10070, priv->cfg.ts_mode, 0xff }, + { 0x10071, !priv->cfg.ts_clock_inv << 4, 0x10 }, }; dev_dbg(&priv->i2c->dev, "%s: frequency=%d symbol_rate=%d\n", __func__,drivers/media/dvb-frontends/cxd2820r_t.c +1
-0@@ -46,6 +46,7 @@ int cxd2820r_set_frontend_t(struct dvb_frontend *fe) { 0x00088, 0x01, 0xff }, { 0x00070, priv->cfg.ts_mode, 0xff }, + { 0x00071, !priv->cfg.ts_clock_inv << 4, 0x10 }, { 0x000cb, priv->cfg.if_agc_polarity << 6, 0x40 }, { 0x000a5, 0x00, 0x01 }, { 0x00082, 0x20, 0x60 },drivers/media/dvb-frontends/cxd2820r_t2.c +1
-0@@ -47,6 +47,7 @@ int cxd2820r_set_frontend_t2(struct dvb_frontend *fe) { 0x02083, 0x0a, 0xff }, { 0x020cb, priv->cfg.if_agc_polarity << 6, 0x40 }, { 0x02070, priv->cfg.ts_mode, 0xff }, + { 0x02071, !priv->cfg.ts_clock_inv << 6, 0x40 }, { 0x020b5, priv->cfg.spec_inv << 4, 0x10 }, { 0x02567, 0x07, 0x0f }, { 0x02569, 0x03, 0x03 },
Signature · 1 line
http://palosaari.fi/