mmc: dw-mmc: add the header file for exynos specific code.

PATCH In review Jaehoon Chung 4 participants 7 messages Aug 28, 2012 – Sep 5, 2012

Subsystems (2)

Arm Samsung Exynos MMC, SD and SDIO

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Jaehoon Chung

author

2012-08-28 07:55 UTC #0 lore raw

PATCH v2 3/5 mmc: dw-mmc: add the header file for exynos specific code.

Signed-off-by Jaehoon Chung <[email protected]>

Signed-off-by Kyungmin Park <[email protected]>

---
 include/linux/mmc/exynos-dw_mmc.h |   61 +++++++++++++++++++++++++++++++++++++
 1 files changed, 61 insertions(+), 0 deletions(-)
 create mode 100644 include/linux/mmc/exynos-dw_mmc.h

include/linux/mmc/exynos-dw_mmc.h new file +61 -0

new file mode 100644
index 0000000..3a6b08b
@@ -0,0 +1,61 @@
+/*
+ * Synopsys DesignWare Multimedia Card Interface driver
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * Header file for Exynos specific register
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _EXYNOS_DW_MMC_H
+#define _EXYNOS_DW_MMC_H
+#include <linux/mmc/dw_mmc.h>
+#include <linux/mmc/host.h>
+
+#define SDMMC_EXYNOS_CLKSEL	0x09C
+
+#define SDMMC_GET_CLK_DRV(x)		((x) >> 16 & 0x7)
+#define SDMMC_GET_CLK_SAMPLE(x)		((x) & 0x7)
+#define SDMCM_GET_DIVRATIO(x)		((x) >> 24 & 0x7)
+#define SDMMC_CLK_RESET_DRV_SAMPLE	(0x07070007);
+
+#define mci_readl(dev, reg)			\
+	__raw_readl((dev)->regs + SDMMC_##reg)
+#define mci_writel(dev, reg, value)			\
+	__raw_writel((value), (dev)->regs + SDMMC_##reg)
+
+static inline int exynos_get_clk_drv(struct dw_mci *host)
+{
+	return SDMMC_GET_CLK_DRV(mci_readl(host, EXYNOS_CLKSEL));
+}
+
+static inline int exynos_get_clk_sample(struct dw_mci *host)
+{
+	return SDMMC_GET_CLK_DRV(mci_readl(host, EXYNOS_CLKSEL));
+}
+
+static inline void exynos_set_clk_drv_sample(struct dw_mci *host,
+		struct mmc_ios *ios)
+{
+	u32 regs, ratio;
+
+	regs = mci_readl(host, EXYNOS_CLKSEL);
+	ratio = SDMMC_GET_DIV_RATIO(reg);
+	if (!ratio) {
+		regs &= ~SDMMC_CLK_RESET_DRV_SAMPLE;
+		regs |= ratio;
+		if (ios->timing == MMC_TIMING_UHS_DDR50)
+			regs |= host->pdata->ddr_timing;
+		else
+			regs |= host->pdata->sdr_timing;
+	} else
+		regs &= ~SDMMC_CLK_RESET_DRV_SAMPLE;
+
+	mci_writel(host, EXYNOS_CLKSEL, regs);
+}
+
+#endif /* _EXYNOS_DW_MMC_H */

Signature · 1 line

1.7.4.1

The device tree support patches for dw-mmc gets this done in the exynos specific extension callbacks. Personally, I prefer that over this patch. And, I did not see this code getting used in the other patches of this series.

Thanks,
Thomas.

Seungwon Jeon

2012-08-29 01:22 UTC #3 lore raw

In reply to Jaehoon Chung

On Tuesday, August 28, 2012, Jaehoon Chung <[email protected]> wrote:
Commit message is no need?

Quoted 51 lines

Signed-off-by Jaehoon Chung <[email protected]>

Signed-off-by Kyungmin Park <[email protected]>

---
 include/linux/mmc/exynos-dw_mmc.h |   61 +++++++++++++++++++++++++++++++++++++
 1 files changed, 61 insertions(+), 0 deletions(-)
 create mode 100644 include/linux/mmc/exynos-dw_mmc.h

include/linux/mmc/exynos-dw_mmc.h new file +38 -0

new file mode 100644
index 0000000..3a6b08b
@@ -0,0 +1,61 @@
+/*
+ * Synopsys DesignWare Multimedia Card Interface driver
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * Header file for Exynos specific register
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _EXYNOS_DW_MMC_H
+#define _EXYNOS_DW_MMC_H
+#include <linux/mmc/dw_mmc.h>
+#include <linux/mmc/host.h>
+
+#define SDMMC_EXYNOS_CLKSEL	0x09C
+
+#define SDMMC_GET_CLK_DRV(x)		((x) >> 16 & 0x7)
+#define SDMMC_GET_CLK_SAMPLE(x)		((x) & 0x7)
+#define SDMCM_GET_DIVRATIO(x)		((x) >> 24 & 0x7)
+#define SDMMC_CLK_RESET_DRV_SAMPLE	(0x07070007);
+
+#define mci_readl(dev, reg)			\
+	__raw_readl((dev)->regs + SDMMC_##reg)
+#define mci_writel(dev, reg, value)			\
+	__raw_writel((value), (dev)->regs + SDMMC_##reg)
+
+static inline int exynos_get_clk_drv(struct dw_mci *host)
+{
+	return SDMMC_GET_CLK_DRV(mci_readl(host, EXYNOS_CLKSEL));
+}
+
+static inline int exynos_get_clk_sample(struct dw_mci *host)
+{
+	return SDMMC_GET_CLK_DRV(mci_readl(host, EXYNOS_CLKSEL));

include/linux/mmc/exynos-dw_mmc.h line 48

Quoted 10 lines

include/linux/mmc/exynos-dw_mmc.h new file +10 -0

+}
+
+static inline void exynos_set_clk_drv_sample(struct dw_mci *host,
+		struct mmc_ios *ios)
+{
+	u32 regs, ratio;
+
+	regs = mci_readl(host, EXYNOS_CLKSEL);
+	ratio = SDMMC_GET_DIV_RATIO(reg);
+	if (!ratio) {

Perhaps, "if (ratio)" is right?
Anyway, I feel this patch with "mmc: dw-mmc: add the platdata related with clock" is overlapped. It needs to be adjusted.

Quoted 15 lines

include/linux/mmc/exynos-dw_mmc.h new file +13 -1

+		regs &= ~SDMMC_CLK_RESET_DRV_SAMPLE;
+		regs |= ratio;
+		if (ios->timing == MMC_TIMING_UHS_DDR50)
+			regs |= host->pdata->ddr_timing;
+		else
+			regs |= host->pdata->sdr_timing;
+	} else
+		regs &= ~SDMMC_CLK_RESET_DRV_SAMPLE;
+
+	mci_writel(host, EXYNOS_CLKSEL, regs);
+}
+
+#endif /* _EXYNOS_DW_MMC_H */
--

1.7.4.1

Jaehoon Chung

author

2012-08-29 02:12 UTC #4 lore raw

Quoted 57 lines · Seungwon Jeon

On Tuesday, August 28, 2012, Jaehoon Chung <[email protected]> wrote:
Commit message is no need?

Quoted 54 lines

Signed-off-by Jaehoon Chung <[email protected]>

Signed-off-by Kyungmin Park <[email protected]>

---
 include/linux/mmc/exynos-dw_mmc.h |   61 +++++++++++++++++++++++++++++++++++++
 1 files changed, 61 insertions(+), 0 deletions(-)
 create mode 100644 include/linux/mmc/exynos-dw_mmc.h

include/linux/mmc/exynos-dw_mmc.h new file +41 -0

new file mode 100644
index 0000000..3a6b08b
@@ -0,0 +1,61 @@
+/*
+ * Synopsys DesignWare Multimedia Card Interface driver
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * Header file for Exynos specific register
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _EXYNOS_DW_MMC_H
+#define _EXYNOS_DW_MMC_H
+#include <linux/mmc/dw_mmc.h>
+#include <linux/mmc/host.h>
+
+#define SDMMC_EXYNOS_CLKSEL	0x09C
+
+#define SDMMC_GET_CLK_DRV(x)		((x) >> 16 & 0x7)
+#define SDMMC_GET_CLK_SAMPLE(x)		((x) & 0x7)
+#define SDMCM_GET_DIVRATIO(x)		((x) >> 24 & 0x7)
+#define SDMMC_CLK_RESET_DRV_SAMPLE	(0x07070007);
+
+#define mci_readl(dev, reg)			\
+	__raw_readl((dev)->regs + SDMMC_##reg)
+#define mci_writel(dev, reg, value)			\
+	__raw_writel((value), (dev)->regs + SDMMC_##reg)
+
+static inline int exynos_get_clk_drv(struct dw_mci *host)
+{
+	return SDMMC_GET_CLK_DRV(mci_readl(host, EXYNOS_CLKSEL));
+}
+
+static inline int exynos_get_clk_sample(struct dw_mci *host)
+{
+	return SDMMC_GET_CLK_DRV(mci_readl(host, EXYNOS_CLKSEL));
+}
+
+static inline void exynos_set_clk_drv_sample(struct dw_mci *host,

Quoted 8 lines

include/linux/mmc/exynos-dw_mmc.h line 48
Quoted 7 lines
include/linux/mmc/exynos-dw_mmc.h new file +7 -0
+		struct mmc_ios *ios)
+{
+	u32 regs, ratio;
+
+	regs = mci_readl(host, EXYNOS_CLKSEL);
+	ratio = SDMMC_GET_DIV_RATIO(reg);
+	if (!ratio) {
Perhaps, "if (ratio)" is right?

Right ratio is set to 0, drv/sample value must set to 0. It's my mistake.

Quoted 2 lines

Anyway, I feel this patch with "mmc: dw-mmc: add the platdata related with clock" is overlapped. It needs to be adjusted.

Ok, thanks for comment.

Best Regards,
Jaehoon Chung

Quoted 23 lines

Quoted 16 lines
include/linux/mmc/exynos-dw_mmc.h new file +13 -1
+		regs &= ~SDMMC_CLK_RESET_DRV_SAMPLE;
+		regs |= ratio;
+		if (ios->timing == MMC_TIMING_UHS_DDR50)
+			regs |= host->pdata->ddr_timing;
+		else
+			regs |= host->pdata->sdr_timing;
+	} else
+		regs &= ~SDMMC_CLK_RESET_DRV_SAMPLE;
+
+	mci_writel(host, EXYNOS_CLKSEL, regs);
+}
+
+#endif /* _EXYNOS_DW_MMC_H */
--
Quoted 1 line
1.7.4.1
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Jaehoon Chung

author

2012-08-29 02:17 UTC #2 lore raw

In reply to Thomas Abraham

Quoted 74 lines · Thomas Abraham

Quoted 73 lines · Jaehoon Chung

Signed-off-by Jaehoon Chung <[email protected]>

Signed-off-by Kyungmin Park <[email protected]>

---
 include/linux/mmc/exynos-dw_mmc.h |   61 +++++++++++++++++++++++++++++++++++++
 1 files changed, 61 insertions(+), 0 deletions(-)
 create mode 100644 include/linux/mmc/exynos-dw_mmc.h

include/linux/mmc/exynos-dw_mmc.h new file +60 -0

new file mode 100644
index 0000000..3a6b08b
@@ -0,0 +1,61 @@
+/*
+ * Synopsys DesignWare Multimedia Card Interface driver
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *             http://www.samsung.com
+ *
+ * Header file for Exynos specific register
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _EXYNOS_DW_MMC_H
+#define _EXYNOS_DW_MMC_H
+#include <linux/mmc/dw_mmc.h>
+#include <linux/mmc/host.h>
+
+#define SDMMC_EXYNOS_CLKSEL    0x09C
+
+#define SDMMC_GET_CLK_DRV(x)           ((x) >> 16 & 0x7)
+#define SDMMC_GET_CLK_SAMPLE(x)                ((x) & 0x7)
+#define SDMCM_GET_DIVRATIO(x)          ((x) >> 24 & 0x7)
+#define SDMMC_CLK_RESET_DRV_SAMPLE     (0x07070007);
+
+#define mci_readl(dev, reg)                    \
+       __raw_readl((dev)->regs + SDMMC_##reg)
+#define mci_writel(dev, reg, value)                    \
+       __raw_writel((value), (dev)->regs + SDMMC_##reg)
+
+static inline int exynos_get_clk_drv(struct dw_mci *host)
+{
+       return SDMMC_GET_CLK_DRV(mci_readl(host, EXYNOS_CLKSEL));
+}
+
+static inline int exynos_get_clk_sample(struct dw_mci *host)
+{
+       return SDMMC_GET_CLK_DRV(mci_readl(host, EXYNOS_CLKSEL));
+}
+
+static inline void exynos_set_clk_drv_sample(struct dw_mci *host,
+               struct mmc_ios *ios)
+{
+       u32 regs, ratio;
+
+       regs = mci_readl(host, EXYNOS_CLKSEL);
+       ratio = SDMMC_GET_DIV_RATIO(reg);
+       if (!ratio) {
+               regs &= ~SDMMC_CLK_RESET_DRV_SAMPLE;
+               regs |= ratio;
+               if (ios->timing == MMC_TIMING_UHS_DDR50)
+                       regs |= host->pdata->ddr_timing;
+               else
+                       regs |= host->pdata->sdr_timing;
+       } else
+               regs &= ~SDMMC_CLK_RESET_DRV_SAMPLE;
+
+       mci_writel(host, EXYNOS_CLKSEL, regs);
+}
+

Quoted 8 lines

Quoted 3 lines
include/linux/mmc/exynos-dw_mmc.h new file +1 -1
+#endif /* _EXYNOS_DW_MMC_H */
--
1.7.4.1
The device tree support patches for dw-mmc gets this done in the exynos specific extension callbacks. Personally, I prefer that over this patch. And, I did not see this code getting used in the other patches of this series.

this patch is preparation patch to use the CLKSEL register for EXYNOS.

Best Regards,
Jaehoon Chung

Quoted 8 lines

Thanks,
Thomas.
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James Hogan

2012-09-04 10:04 UTC #5 lore raw

In reply to Jaehoon Chung

Quoted 57 lines · Jaehoon Chung

Signed-off-by Jaehoon Chung <[email protected]>

Signed-off-by Kyungmin Park <[email protected]>

---
 include/linux/mmc/exynos-dw_mmc.h |   61 +++++++++++++++++++++++++++++++++++++
 1 files changed, 61 insertions(+), 0 deletions(-)
 create mode 100644 include/linux/mmc/exynos-dw_mmc.h

include/linux/mmc/exynos-dw_mmc.h new file +44 -0

new file mode 100644
index 0000000..3a6b08b
@@ -0,0 +1,61 @@
+/*
+ * Synopsys DesignWare Multimedia Card Interface driver
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * Header file for Exynos specific register
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _EXYNOS_DW_MMC_H
+#define _EXYNOS_DW_MMC_H
+#include <linux/mmc/dw_mmc.h>
+#include <linux/mmc/host.h>
+
+#define SDMMC_EXYNOS_CLKSEL	0x09C
+
+#define SDMMC_GET_CLK_DRV(x)		((x) >> 16 & 0x7)
+#define SDMMC_GET_CLK_SAMPLE(x)		((x) & 0x7)
+#define SDMCM_GET_DIVRATIO(x)		((x) >> 24 & 0x7)
+#define SDMMC_CLK_RESET_DRV_SAMPLE	(0x07070007);
+
+#define mci_readl(dev, reg)			\
+	__raw_readl((dev)->regs + SDMMC_##reg)
+#define mci_writel(dev, reg, value)			\
+	__raw_writel((value), (dev)->regs + SDMMC_##reg)
+
+static inline int exynos_get_clk_drv(struct dw_mci *host)
+{
+	return SDMMC_GET_CLK_DRV(mci_readl(host, EXYNOS_CLKSEL));
+}
+
+static inline int exynos_get_clk_sample(struct dw_mci *host)
+{
+	return SDMMC_GET_CLK_DRV(mci_readl(host, EXYNOS_CLKSEL));
+}
+
+static inline void exynos_set_clk_drv_sample(struct dw_mci *host,
+		struct mmc_ios *ios)
+{
+	u32 regs, ratio;

include/linux/mmc/exynos-dw_mmc.h line 54

Quoted 10 lines

include/linux/mmc/exynos-dw_mmc.h new file +10 -0

+
+	regs = mci_readl(host, EXYNOS_CLKSEL);
+	ratio = SDMMC_GET_DIV_RATIO(reg);
+	if (!ratio) {
+		regs &= ~SDMMC_CLK_RESET_DRV_SAMPLE;
+		regs |= ratio;
+		if (ios->timing == MMC_TIMING_UHS_DDR50)
+			regs |= host->pdata->ddr_timing;
+		else
+			regs |= host->pdata->sdr_timing;

Ah right, I see you're using them from a different patch. It feels wrong to platform specific data within the general platform data structure as it would be there unused for every other platform. Perhaps it would be better to have an outer exynos platform data struct which contains the standard one, and then use container_of to access it using the pointer to the inner one. Does that make sense?

Quoted 8 lines

include/linux/mmc/exynos-dw_mmc.h new file +7 -0

+	} else
+		regs &= ~SDMMC_CLK_RESET_DRV_SAMPLE;
+
+	mci_writel(host, EXYNOS_CLKSEL, regs);
+}
+
+#endif /* _EXYNOS_DW_MMC_H */

Jaehoon Chung

author

2012-09-05 08:33 UTC #6 lore raw

Quoted 14 lines

include/linux/mmc/exynos-dw_mmc.h new file +13 -0

+static inline void exynos_set_clk_drv_sample(struct dw_mci *host,
+		struct mmc_ios *ios)
+{
+	u32 regs, ratio;
+
+	regs = mci_readl(host, EXYNOS_CLKSEL);
+	ratio = SDMMC_GET_DIV_RATIO(reg);
+	if (!ratio) {
+		regs &= ~SDMMC_CLK_RESET_DRV_SAMPLE;
+		regs |= ratio;
+		if (ios->timing == MMC_TIMING_UHS_DDR50)
+			regs |= host->pdata->ddr_timing;
+		else

Quoted 8 lines

include/linux/mmc/exynos-dw_mmc.h line 54
Quoted 1 line
include/linux/mmc/exynos-dw_mmc.h new file +1 -0
+			regs |= host->pdata->sdr_timing;
Ah right, I see you're using them from a different patch. It feels wrong to platform specific data within the general platform data structure as it would be there unused for every other platform. Perhaps it would be better to have an outer exynos platform data struct which contains the standard one, and then use container_of to access it using the pointer to the inner one. Does that make sense?

I will check this. thanks for comment..

Best Regards,
Jaehoon Chung

Quoted 15 lines

include/linux/mmc/exynos-dw_mmc.h line 61
Quoted 9 lines
include/linux/mmc/exynos-dw_mmc.h new file +7 -0
+	} else
+		regs &= ~SDMMC_CLK_RESET_DRV_SAMPLE;
+
+	mci_writel(host, EXYNOS_CLKSEL, regs);
+}
+
+#endif /* _EXYNOS_DW_MMC_H */
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