dw_dmac: max_mem_width limits value for SRC/DST_TR_WID register
PATCH v2 2/2 dw_dmac: max_mem_width limits value for SRC/DST_TR_WID register
The dw_dmac driver was earlier adapted to do 64-bit transfers on the memory side (https://lkml.org/lkml/2012/1/18/52)
This works on ARM platforms but for AVR32 (AP700x) the maximum allowed transfer size is 32-bits.
This patch allows the arch to set a new slave property max_mem_width to limit the size.
Allowable values are:
#define DW_MEM_WIDTH_64 0
#define DW_MEM_WIDTH_32 1 /* e.g. for avr32 */
Signed-off-by Hein Tibosch <[email protected]>
--- drivers/dma/dw_dmac.c | 10 +++++++--- include/linux/dw_dmac.h | 3 +++ 2 files changed, 10 insertions(+), 3 deletions(-)
drivers/dma/dw_dmac.c +7 -3
@@ -618,6 +618,7 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, size_t len, unsigned long flags) {struct dw_dma_chan *dwc =to_dw_dma_chan (chan); +struct dw_dma_slave *dws = chan->private;struct dw_desc *desc;struct dw_desc *first;struct dw_desc *prev;
@@ -639,7 +640,8 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,* We can be a lot more clever here, but this should take care * of the most common optimization. */ -if (!((src | dest | len) &7 )) +if (dws->max_mem_width ==DW_MEM_WIDTH_64 && + !((src | dest | len) &7 )) src_width = dst_width =3 ;else if (!((src | dest | len) &3 )) src_width = dst_width =2 ;
@@ -746,7 +748,8 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, mem =sg_dma_address (sg); len =sg_dma_len (sg); -if (!((mem | len) &7 )) +if (dws->max_mem_width ==DW_MEM_WIDTH_64 && + !((mem | len) &7 )) mem_width =3 ;else if (!((mem | len) &3 )) mem_width =2 ;
@@ -813,7 +816,8 @@ slave_sg_todev_fill_desc: mem =sg_dma_address (sg); len =sg_dma_len (sg); -if (!((mem | len) &7 )) +if (dws->max_mem_width ==DW_MEM_WIDTH_64 && + !((mem | len) &7 )) mem_width =3 ;else if (!((mem | len) &3 )) mem_width =2 ;
include/linux/dw_dmac.h +3 -0
@@ -58,6 +58,9 @@ struct dw_dma_slave {u32 cfg_lo;u8 src_master;u8 dst_master; +#define DW_MEM_WIDTH_64 0 +#define DW_MEM_WIDTH_32 1/* e.g. for avr32 */ +u8 max_mem_width; };/* Platform-configurable bits in CFG_HI */
Signature · 1 line
1.7.8.0