Write buffer programming for AMD flash chips
A message that is not in the archive (sent off-list or not yet received): 51DB8827D393D411BB69003048003F46018FE4E6@tvesntr
Hi Thomas,
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I had a look at your patch and I believe that it does almost the same than mine. From a point of readability and extendability I would prefer it, whereas my patch would save some memory.
So on, IMHO memory saving may be preferable in this case. However, maybe someone else in the list (Wolfgang?) has anything to say.
If this is the way we decide to go, I can apply your patch and make changes for 8 bit support.
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A missing part in your patch is checking whether data to be written are aligned with the flash chips write buffer. This is done with the following hunk for the
write_bufffunction:(quoted diff) +4
-1buffered_size = (info->portwidth / info->chipwidth); buffered_size *= info->buffer_size; while (cnt >= info->portwidth) { - i = buffered_size > cnt ? cnt : buffered_size; + /* write buffer until next buffered_size aligned boundary */ + i = buffered_size - (wp % buffered_size); + if (i>cnt) + i = cnt; if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK) return rc; i -= (i % info->portwidth);
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In our case, the lack of this code lead to errors when writing the environment to flash. The reason is that environment writing is done in 3 steps and this results in not buffer-aligned write cycles. The code above calculates the correct buffer size (i) depending on the first address (wp) to be written
OK. I will change this.
Best Regards,
Alex