KVM: MMU: fix check the reserved bits on the gpte of L2

Current code always uses arch.mmu to check the reserved bits on guest gpte which is valid only for L1 guest, we should use arch.nested_mmu instead when we translate gva to gpa for the L2 guest

Fix it by using @mmu instead since it is adapted to the current mmu mode automatically

The bug can be triggered when nested npt is used and L1 guest and L2 guest use different mmu mode

Reported-by Jan Kiszka <[email protected]>

Signed-off-by Xiao Guangrong <[email protected]>

---
 arch/x86/kvm/paging_tmpl.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

arch/x86/kvm/paging_tmpl.h +1 -2

index 7769699..3a75828 100644
@@ -218,8 +218,7 @@ retry_walk:
 		if (unlikely(!is_present_gpte(pte)))
 			goto error;
 
-		if (unlikely(is_rsvd_bits_set(&vcpu->arch.mmu, pte,
-					      walker->level))) {
+		if (unlikely(is_rsvd_bits_set(mmu, pte, walker->level))) {
 			errcode |= PFERR_RSVD_MASK | PFERR_PRESENT_MASK;
 			goto error;
 		}

Signature · 1 line

1.8.1.4

Current code always uses arch.mmu to check the reserved bits on guest gpte which is valid only for L1 guest, we should use arch.nested_mmu instead when we translate gva to gpa for the L2 guest

Fix it by using @mmu instead since it is adapted to the current mmu mode automatically

The bug can be triggered when nested npt is used and L1 guest and L2 guest use different mmu mode

Reported-by Jan Kiszka <[email protected]>

Signed-off-by Xiao Guangrong <[email protected]>

---
  arch/x86/kvm/paging_tmpl.h | 3 +--
  1 file changed, 1 insertion(+), 2 deletions(-)

arch/x86/kvm/paging_tmpl.h +0 -0

index 7769699..3a75828 100644