KVM: nVMX: Support direct APIC access from L2
PATCH 1/1 KVM: nVMX: Support direct APIC access from L2
It's a pathological case, but still a valid one: If L1 disables APIC virtualization and also allows L2 to directly write to the APIC page, we have to forcibly enable APIC virtualization while in L2 if the in-kernel APIC is in use.
This allows to run the direct interrupt test case in the vmx unit test without x2APIC.
--- arch/x86/kvm/vmx.c | 5 +++++ 1 file changed, 5 insertions(+)
arch/x86/kvm/vmx.c +5 -0
@@ -7771,6 +7771,11 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)else vmcs_write64 (APIC_ACCESS_ADDR ,page_to_phys (vmx->nested.apic_access_page)); + }else if (vm_need_virtualize_apic_accesses (vmx->vcpu.kvm)) { + exec_control |= +SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES ; +vmcs_write64 (APIC_ACCESS_ADDR , +page_to_phys (vcpu->kvm->arch.apic_access_page)); }vmcs_write32 (SECONDARY_VM_EXEC_CONTROL , exec_control);
Signature · 1 line
1.8.1.1.298.ge7eed54
Il 16/12/2013 12:55, Jan Kiszka ha scritto:
Quoted 20 lines
It's a pathological case, but still a valid one: If L1 disables APIC virtualization and also allows L2 to directly write to the APIC page, we have to forcibly enable APIC virtualization while in L2 if the in-kernel APIC is in use.
This allows to run the direct interrupt test case in the vmx unit test without x2APIC.
Signed-off-by Jan Kiszka <[email protected]>--- arch/x86/kvm/vmx.c | 5 +++++ 1 file changed, 5 insertions(+)arch/x86/kvm/vmx.c +0
-0@@ -7771,6 +7771,11 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)else
arch/x86/kvm/vmx.c static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12) · line 7781
Quoted 10 lines
arch/x86/kvm/vmx.c +5
-0vmcs_write64 (APIC_ACCESS_ADDR ,page_to_phys (vmx->nested.apic_access_page)); + }else if (vm_need_virtualize_apic_accesses (vmx->vcpu.kvm)) { + exec_control |= +SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES ; +vmcs_write64 (APIC_ACCESS_ADDR , +page_to_phys (vcpu->kvm->arch.apic_access_page)); }vmcs_write32 (SECONDARY_VM_EXEC_CONTROL , exec_control);
Applied, thanks.
Paolo