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Support for Micron N25Q512

DISCUSSION Chuck Peplinski 1 participant 1 message Dec 31, 2013 Memory technology devices (MTD)

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Hello-
We have a board that contains a TI ARM and the Micron N25Q512 and I've been working to support it using the mtd driver in a recent Linux distribution. I'd like to bring my code more into alignment with your code. I see a number of things that confuse me. I understand that this is the place to discuss.

I'm working with TI Linux code based on Linux 2.6. When I refer to "your codebase", I mean

    git://git.infradead.org/linux-mtd.git, SHA1 ID 15b540c.

I have diff'ed this code against what is provided to me in the older 2.6 version and I understand the differences. They don't seem to make the code work on my board.

Searching the archives, I see that there has recently been activity to support a device with this name. I also see an interesting thread about a new framework for SPI-NOR. And I see reference to a file
drivers/mtd/devices/st_spi_fsm.c
But I don't see this file in the head of the code base.

- The JEDEC ID that I read is 0x20ba20, while the version in your codebase names it 0x20bb20.
- To make the device work, I've had to add code to read the "flag status register" and wait for transactions to complete. This is as illustrated in the micron example code available from their web site. As I hacked this into m25p80.c, it is quite specific to my device and not generic. So that can't be the right way to do it.

I'm familiar with the differences between kernel versions. I realize my code is not the latest, but I am ready to handle things like this. How can I get connected to the latest work in the mtd driver and synchronize my work with it?

Chuck

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Chuck Peplinski
Momentum Data Systems