pciutils: Support for MSI-X capability
PATCH 1/1 pciutils: Support for MSI-X capability
Hi, here is a patch to pciutils that adds parsing of MSI-X capability entries. With this patch, an MSI-X capability will be dumped with -v as
Capabilities: [40] MSI-X: Enable- Mask- TabSize=32
and with -vv as
Capabilities: [40] MSI-X: Enable- Mask- TabSize=32 Vector table: BAR=0 offset=00082000 PBA: BAR=0 offset=00082200
Please let me know if you need any changes/fixes before you can apply.
Thanks,
Roland
lib/header.h +9 -0
@@ -185,6 +185,7 @@#define PCI_CAP_ID_CHSWP 0x06/* CompactPCI HotSwap */ #define PCI_CAP_ID_PCIX 0x07/* PCI-X */ #define PCI_CAP_ID_HT 0x08/* HyperTransport */ +#define PCI_CAP_ID_MSIX 0x11/* MSI-X */ #define PCI_CAP_LIST_NEXT 1/* Next capability in the list */ #define PCI_CAP_FLAGS 2/* Capability defined flags (16 bits) */ #define PCI_CAP_SIZEOF 4
@@ -661,6 +662,14 @@#define PCI_HT_RM_CNT1 10/* Retry Count 1 Register */ #define PCI_HT_RM_SIZEOF 12 +/* MSI-X */ +#define PCI_MSIX_ENABLE 0x8000 +#define PCI_MSIX_MASK 0x4000 +#define PCI_MSIX_TABSIZE 0x03ff +#define PCI_MSIX_TABLE 4 +#define PCI_MSIX_PBA 8 +#define PCI_MSIX_BIR 0x7 +/* * The PCI interface treats multi-function devices as independent * devices. The slot/function address of each device is encoded
lspci.c +25 -0
@@ -924,6 +924,28 @@ }static void +show_msix (struct device *d,int where,int cap) +{ +u32 off; + +printf ("MSI-X: Enable%c Mask%c TabSize=%d\n" , +FLAG (cap,PCI_MSIX_ENABLE ), +FLAG (cap,PCI_MSIX_MASK ), + (cap &PCI_MSIX_TABSIZE ) +1 ); +if (verbose <2 ) +return ; + +config_fetch (d, where +PCI_MSIX_TABLE ,4 ); + off =get_conf_long (d, where +PCI_MSIX_TABLE ); +printf ("\t\tVector table: BAR=%d offset=%08x\n" , + off &PCI_MSIX_BIR , off & ~PCI_MSIX_BIR ); +config_fetch (d, where +PCI_MSIX_PBA ,4 ); + off =get_conf_long (d, where +PCI_MSIX_PBA ); +printf ("\t\tPBA: BAR=%d offset=%08x\n" , + off &PCI_MSIX_BIR , off & ~PCI_MSIX_BIR ); +} + +static void show_slotid (int cap) {int esr = cap &0xff ;
@@ -982,6 +1004,9 @@case PCI_CAP_ID_HT :show_ht (d, where, cap);break ; +case PCI_CAP_ID_MSIX : +show_msix (d, where, cap); +break ;default :printf ("#%02x [%04x]\n" , id, cap); }
Quoted 2 lines · Roland Dreier
Hi, here is a patch to pciutils that adds parsing of MSI-X capability entries. With this patch, an MSI-X capability will be dumped with -v as
Thanks for doing this, Roland. I was going to get to it in a few days. Unfortunately, it's going to conflict in a few textual ways with one or two of the [RFC] patches I posted.
Martin, how can we make this easiest for you? Do you want to merge Roland's fully-fledged MSI-X patch and put out a new -test release that I can send half-baked PCI-E patches against until everybody's happy with the outcome?
Signature · 6 lines
"Next the statesmen will invent cheap lies, putting the blame upon the nation that is attacked, and every man will be glad of those conscience-soothing falsities, and will diligently study them, and refuse to examine any refutations of them; and thus he will by and by convince himself that the war is just, and will thank God for the better sleep he enjoys after this process of grotesque self-deception." -- Mark Twain
Matthew> Martin, how can we make this easiest for you? Do you Matthew> want to merge Roland's fully-fledged MSI-X patch and put Matthew> out a new -test release that I can send half-baked PCI-E Matthew> patches against until everybody's happy with the outcome?
Ahh... I'll hold off on writing my PCI-e capability parser then :)
- Roland
Quoted 6 lines · Roland Dreier
Matthew> Martin, how can we make this easiest for you? Do you Matthew> want to merge Roland's fully-fledged MSI-X patch and put Matthew> out a new -test release that I can send half-baked PCI-E Matthew> patches against until everybody's happy with the outcome?
Ahh... I'll hold off on writing my PCI-e capability parser then :)
Did you not see the one I posted to linux-pci yesterday? As I say, it's only half-done. I wanted to get a feel for whether people like the direction I'm taking.
Unfortunately, I can't see a web archive of linux-pci anywhere -- even on MArc. I can forward the patches though.
Signature · 6 lines
"Next the statesmen will invent cheap lies, putting the blame upon the nation that is attacked, and every man will be glad of those conscience-soothing falsities, and will diligently study them, and refuse to examine any refutations of them; and thus he will by and by convince himself that the war is just, and will thank God for the better sleep he enjoys after this process of grotesque self-deception." -- Mark Twain
Matthew> Did you not see the one I posted to linux-pci yesterday? Matthew> As I say, it's only half-done. I wanted to get a feel Matthew> for whether people like the direction I'm taking.
Matthew> Unfortunately, I can't see a web archive of linux-pci Matthew> anywhere -- even on MArc. I can forward the patches Matthew> though.
Sorry, I'm not subscribed to linux-pci, so I missed them.
I would be interested in taking a look at your patches. Are you handling the full 4K extended config space, or just the PCI-e capability in the standard config space?
Thanks,
Roland
Quoted 8 lines · Roland Dreier
Matthew> Did you not see the one I posted to linux-pci yesterday? Matthew> As I say, it's only half-done. I wanted to get a feel Matthew> for whether people like the direction I'm taking.
Matthew> Unfortunately, I can't see a web archive of linux-pci Matthew> anywhere -- even on MArc. I can forward the patches Matthew> though.
Quoted 5 lines
Sorry, I'm not subscribed to linux-pci, so I missed them.
I would be interested in taking a look at your patches. Are you handling the full 4K extended config space, or just the PCI-e capability in the standard config space?
OK. I'll send them to you privately as replies to this mail.
The first patch (which needs a little tightening up) adds support for accessing and printing all 4k of configuration space with the -xxx option.
The second patch (incomplete) adds support for the Express capability. There's some stuff it doesn't decode yet. I'll be updating this patch on Monday, I expect.
The third patch (even more incomplete) adds infrastructure for walking and decoding extended capabilities.
Signature · 6 lines
"Next the statesmen will invent cheap lies, putting the blame upon the nation that is attacked, and every man will be glad of those conscience-soothing falsities, and will diligently study them, and refuse to examine any refutations of them; and thus he will by and by convince himself that the war is just, and will thank God for the better sleep he enjoys after this process of grotesque self-deception." -- Mark Twain
Hi!
Quoted 5 lines
Hi, here is a patch to pciutils that adds parsing of MSI-X capability entries. With this patch, an MSI-X capability will be dumped with -v as
Capabilities: [40] MSI-X: Enable- Mask- TabSize=32
Quoted 7 lines
and with -vv as
Capabilities: [40] MSI-X: Enable- Mask- TabSize=32 Vector table: BAR=0 offset=00082000 PBA: BAR=0 offset=00082200Please let me know if you need any changes/fixes before you can apply.
Applied and will appear in -test6 soon.
Could you please add a couple of comments to the capability defines in header.h?
Have a nice fortnight
Signature · 3 lines
Martin `MJ' Mares <[email protected]> http://atrey.karlin.mff.cuni.cz/~mj/ Faculty of Math and Physics, Charles University, Prague, Czech Rep., Earth Q: Do you believe in One God? A: Yes, up to isomorphism.
Martin> Applied and will appear in -test6 soon.
Martin> Could you please add a couple of comments to the Martin> capability defines in header.h?
Thanks, sorry about leaving out the comments. Here is a patch. I also added _CAP_ to the capability register defines so that I match the naming convention better.
Best,
Roland
lib/header.h +6 -6
@@ -727,12 +727,12 @@#define PCI_EXP_RTSTA 0x20/* Root Status */ /* MSI-X */ -#define PCI_MSIX_ENABLE 0x8000 -#define PCI_MSIX_MASK 0x4000 -#define PCI_MSIX_TABSIZE 0x03ff -#define PCI_MSIX_TABLE 4 -#define PCI_MSIX_PBA 8 -#define PCI_MSIX_BIR 0x7 +#define PCI_MSIX_CAP_ENABLE 0x8000/* MSI-X enabled */ +#define PCI_MSIX_CAP_MASK 0x4000/* All vectors masked */ +#define PCI_MSIX_CAP_TABSIZE 0x03ff/* Mask for (table_size - 1) */ +#define PCI_MSIX_TABLE 4/* Vector table offset/BAR register */ +#define PCI_MSIX_PBA 8/* PBA offset/BAR register */ +#define PCI_MSIX_BIR_MASK 0x7/* Mask of BAR index for table/PBA */ /* * The PCI interface treats multi-function devices as independent
lspci.c +5 -5
@@ -990,18 +990,18 @@u32 off;printf ("MSI-X: Enable%c Mask%c TabSize=%d\n" , -FLAG (cap,PCI_MSIX_ENABLE ), -FLAG (cap,PCI_MSIX_MASK ), - (cap &PCI_MSIX_TABSIZE ) +1 ); +FLAG (cap,PCI_MSIX_CAP_ENABLE ), +FLAG (cap,PCI_MSIX_CAP_MASK ), + (cap &PCI_MSIX_CAP_TABSIZE ) +1 );if (verbose <2 || !config_fetch (d, where +PCI_MSIX_TABLE ,8 ))return ; off =get_conf_long (d, where +PCI_MSIX_TABLE );printf ("\t\tVector table: BAR=%d offset=%08x\n" , - off &PCI_MSIX_BIR , off & ~PCI_MSIX_BIR ); + off &PCI_MSIX_BIR_MASK , off & ~PCI_MSIX_BIR_MASK ); off =get_conf_long (d, where +PCI_MSIX_PBA );printf ("\t\tPBA: BAR=%d offset=%08x\n" , - off &PCI_MSIX_BIR , off & ~PCI_MSIX_BIR ); + off &PCI_MSIX_BIR_MASK , off & ~PCI_MSIX_BIR_MASK ); } static void