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sparc32 : Signed integer division overflow

PATCH Superseded Olivier Danet 2 participants 2 messages Mar 12, 2014 – Mar 18, 2014

v1 of 2 Superseded Latest is v2 →

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#0 lore raw

PATCH 1/1 sparc32 : Signed integer division overflow

I wanted to test an integer divider for SPARC32, and tried the stress test program on QEMU, which choked on the division -0x8000_0000_0000_0000 / -1 (QEMU compiled on x86_64).

Excerpt from the test program :
-------------------------------------------------------------------
#include <stdio.h>

typedef unsigned uint32;
typedef unsigned long long uint64;
typedef signed int32;
typedef signed long long int64;

void sdiv(int64 x, int32 y, int32 *q, uint32 *ov)
{
uint32 a,b,c,d,e;
a=x>>32;
b=x;
c=y;

__asm__ __volatile__("wr %2,%%y\n\t"

                       "nop\n\t"
                       "nop\n\t"
                       "nop\n\t"
                       "sdivcc %3,%4,%0\n\t"
                       "or %%r0,0,%1\n\t"
                       "bvc xxa\n\t"
                       "nop\n\t"
                       "add %1,1,%1\n\t"
                       "xxa:bpos xxb\n\t"
                       "nop\n\t"
                       "add %1,2,%1\n\t"
                       "xxb:bne xxc\n\t"
                       "nop\n\t"
                       "add %1,4,%1\n\t"
               "xxc:nop\n\t"
               : "=r"(d),"=r"(e):"r"(a),"r"(b),"r"(c)
               );

*q=d;
*ov=e & 1;
}

void main(void)
{
uint64 x;
uint32 y;
int32 q;
int32 ov;
x = 1LL << 63;
y = -1;
sdiv(x, y, &q, &ov);
}

Here is a patch for handling this corner case on SPARC32.
SPARC64 division already checks this in helper_sdivx(), some other architectures seem to do the same (for example, target-arm/helper.c: HELPER(sdiv))

===================================================================
The integer division 0x8000_0000_0000_0000 / -1 must be handled separately to avoid overflows on the QEMU host.

-------------------------------------------------------------------

target-sparc/helper.c +8 -6
index 57c20af..b6b5937 100644
@@ -116,14 +116,16 @@ static target_ulong helper_sdiv_common(CPUSPARCState *env, target_ulong a,
     if (x1 == 0) {
         cpu_restore_state(env, GETPC());
         helper_raise_exception(env, TT_DIV_ZERO);
-    }
-
-    x0 = x0 / x1;
-    if ((int32_t) x0 != x0) {
-        x0 = x0 < 0 ? 0x80000000 : 0x7fffffff;
+    } else if (x1 == -1 && x0 == 0x8000000000000000) {
+        x0 = 0x7fffffff;
         overflow = 1;
+    } else {
+        x0 = x0 / x1;
+        if ((int32_t) x0 != x0) {
+            x0 = x0 < 0 ? 0x80000000 : 0x7fffffff;
+            overflow = 1;
+        }
     }
-
     if (cc) {
         env->cc_dst = x0;
         env->cc_src2 = overflow;

-------------------------------------------------------------------

#1 lore raw

On 12/03/14 21:26, Olivier Danet wrote:

Hi Olivier,

Quoted 19 lines

Here is a patch for handling this corner case on SPARC32. SPARC64 division already checks this in helper_sdivx(), some other architectures
seem to do the same (for example, target-arm/helper.c: HELPER(sdiv))

===================================================================
The integer division 0x8000_0000_0000_0000 / -1 must be handled separately to avoid overflows on the QEMU host.

-------------------------------------------------------------------

target-sparc/helper.c +0 -0
index 57c20af..b6b5937 100644
@@ -116,14 +116,16 @@ static target_ulong
 helper_sdiv_common(CPUSPARCState *env, target_ulong a,
 if (x1 == 0) {

target-sparc/helper.c static target_ulong · line 122

Quoted 10 lines
target-sparc/helper.c +2 -5
 cpu_restore_state(env, GETPC());
 helper_raise_exception(env, TT_DIV_ZERO);
- }
-
- x0 = x0 / x1;
- if ((int32_t) x0 != x0) {
- x0 = x0 < 0 ? 0x80000000 : 0x7fffffff;
+ } else if (x1 == -1 && x0 == 0x8000000000000000) {
+ x0 = 0x7fffffff;
 overflow = 1;

Thanks for the patch! I think based upon Peter's recent series that the sign constant would need a ULL suffix in order to function correctly on 32-bit platforms.

My personal preference would be for (1ULL << 63) unless Peter (CC added) can think of a reason to leave the hex constant in its current form?

That said, I've tested the patch on a Debian etch Linux image and it works for me.

target-sparc/helper.c static target_ulong helper_sdiv_common(CPUSPARCState *env, target_ulong a, · line 126

Quoted 8 lines
target-sparc/helper.c +6 -1
+ } else {
+ x0 = x0 / x1;
+ if ((int32_t) x0 != x0) {
+ x0 = x0 < 0 ? 0x80000000 : 0x7fffffff;
+ overflow = 1;
+ }
 }
-

Looks like a whitespace change accidentally made it into this patch too.

Quoted 4 lines
target-sparc/helper.c +0 -0
 if (cc) {
 env->cc_dst = x0;

env->cc_src2 = overflow;
-------------------------------------------------------------------

ATB,

Mark.