ARM: dts: imx6: add new board RIoTboard
Subsystems (3)
RFC PATCH 1/1 ARM: dts: imx6: add new board RIoTboard
add element14s RIoTboard http://www.riotboard.org which is an i.MX6Solo based design targeted at makers.
Where upstream drivers exist I've enabled them, the only exception being i2c3 which has been sacrificed for the fec interrupt workaround. i2c3 is only currently being used for element14s LCD8000-97C lvds connected touch screen, but as no upstream driver exists for the touch controller I deem this to be an acceptable compromise for now.
I've also left out enabling ldb due to current problems to coexist with hdmi although I have tested that it can work on the board with hdmi disabled.
The fec interrupt errata seems to suggest that a different gpio could be used but I can't find any documentation or example dts that does so. Suggestions welcome.
--- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6s-riotboard.dts | 23 ++ arch/arm/boot/dts/imx6sdl-riotboard.dtsi | 588 +++++++++++++++++++++++++++++++ 3 files changed, 612 insertions(+) create mode 100644 arch/arm/boot/dts/imx6s-riotboard.dts create mode 100644 arch/arm/boot/dts/imx6sdl-riotboard.dtsi
arch/arm/boot/dts/Makefile +1 -0
@@ -202,6 +202,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ imx6q-sbc6x.dtb \ imx6q-udoo.dtb \ imx6q-wandboard.dtb \ + imx6s-riotboard.dtb \ imx6sl-evk.dtb \ vf610-cosmic.dtb \ vf610-twr.dtb
arch/arm/boot/dts/imx6s-riotboard.dts new file +23 -0
@@ -0,0 +1,23 @@ +/* + * Copyright 2014 Iain Paton <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +/dts-v1/; +#include "imx6dl.dtsi" +#include "imx6sdl-riotboard.dtsi" + +/ { + model = "RIoTboard i.MX6S"; + compatible = "riot,imx6s-riotboard", "fsl,imx6dl"; + + memory { + reg = <0x10000000 0x40000000>; + }; + +}; +
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +588 -0
588 lines not on this page · raw message
Signature · 1 line
1.8.5.1
Fabio Estevam
reviewerRFC PATCH 1/1 ARM: dts: imx6: add new board RIoTboard
arch/arm/boot/dts/imx6sdl-riotboard.dtsi line 20
Quoted 12 lines · Iain Paton
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +12
-0+#include <dt-bindings/gpio/gpio.h> + +/ { + regulators { + compatible = "simple-bus"; + + reg_2p5v: 2p5v { + compatible = "regulator-fixed"; + regulator-name = "2P5V"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-always-on;
No need for this 'regulator-always-on' property, as this is not controlled by a GPIO.
arch/arm/boot/dts/imx6sdl-riotboard.dtsi line 28
Quoted 8 lines
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +8
-0+ }; + + reg_3p3v: 3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on;
Same here.
Quoted 36 lines
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +36
-0+ }; + + reg_usb_otg_vbus: usb_otg_vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 22 0>; + enable-active-high; + }; + + }; + + leds { + compatible = "gpio-leds"; + + led0: user1 { + label = "user1"; + gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + + led1: user2 { + label = "user2"; + gpios = <&gpio3 28 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + }; + + sound { + compatible = "fsl,imx-audio-sgtl5000"; + model = "imx6-riotboard-sgtl5000"; + ssi-controller = <&ssi1>; + audio-codec = <&codec>; + audio-routing =
arch/arm/boot/dts/imx6sdl-riotboard.dtsi line 74
Quoted 10 lines
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +10
-0+ "MIC_IN", "Mic Jack", + "Mic Jack", "Mic Bias", + "Headphone Jack", "HP_OUT"; + mux-int-port = <1>; + mux-ext-port = <3>; + }; + +}; + +
Only one line is enough here.
arch/arm/boot/dts/imx6sdl-riotboard.dtsi line 82
Quoted 8 lines
+&audmux {
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +7
-0+ pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux>; + status = "okay"; +}; + + +
Only one line is enough here.
arch/arm/boot/dts/imx6sdl-riotboard.dtsi line 94
Quoted 12 lines
+&ecspi1 {
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +11
-0+ fsl,spi-num-chipselects = <1>; + cs-gpios = <&gpio5 17 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + status = "okay"; + + spidev at 1 { + spi-max-frequency = <24000000>; + reg = <0>; + compatible = "spidev"; + };
The reg should match the number after the @, but since spidev is not a real hardware I am not sure if this should be part of the dts file.
arch/arm/boot/dts/imx6sdl-riotboard.dtsi line 146
Quoted 3 lines
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +3
-0+ +&hdmi { + compatible = "fsl,imx6dl-hdmi";
You can drop this compatible line.
Quoted 4 lines
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +3
-0+ ddc-i2c-bus = <&i2c2>; + status = "okay"; +};
arch/arm/boot/dts/imx6sdl-riotboard.dtsi line 481
Quoted 10 lines
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +10
-0+ + pinctrl_usdhc4: usdhc4grp { + fsl,pins = < + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 + MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x80000000 /* SD4 RST (eMMC) */
Just curious: do you get eMMC working? I tried it on mx6qsabresd and it is not working for me.
arch/arm/boot/dts/imx6sdl-riotboard.dtsi line 327
Quoted 8 lines
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +8
-0+ >; + }; + + }; +}; + + +
Only one line is enough.
RFC PATCH 1/1 ARM: dts: imx6: add new board RIoTboard
In reply to Iain PatonQuoted 11 lines · Iain Paton
add element14s RIoTboard http://www.riotboard.org which is an i.MX6Solo based design targeted at makers.
Where upstream drivers exist I've enabled them, the only exception being i2c3 which has been sacrificed for the fec interrupt workaround. i2c3 is only currently being used for element14s LCD8000-97C lvds connected touch screen, but as no upstream driver exists for the touch controller I deem this to be an acceptable compromise for now.
I've also left out enabling ldb due to current problems to coexist with hdmi although I have tested that it can work on the board with hdmi disabled.
Quoted 3 lines
The fec interrupt errata seems to suggest that a different gpio could be used but I can't find any documentation or example dts that does so. Suggestions welcome.
Take a look at commit 6261c4c (ARM: dts: imx6qdl-sabrelite: use GPIO_6 for FEC interrupt.). It seems you already has it for your board.
Quoted 6 lines
--- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6s-riotboard.dts | 23 ++ arch/arm/boot/dts/imx6sdl-riotboard.dtsi | 588 +++++++++++++++++++++++++++++++
We do not use imx6s as a SoC name in the kernel tree. It's just an imx6dl with the second CPU core fused out. So please name the file imx6dl-riotboard.dts.
Also, I'm not sure why you need an additional level with that .dtsi file, if it will only be soldered with imx6dl. We have that .dtsi for boards like sabresd, because the board support both imx6q and imx6dl.
Quoted 56 lines
3 files changed, 612 insertions(+) create mode 100644 arch/arm/boot/dts/imx6s-riotboard.dts create mode 100644 arch/arm/boot/dts/imx6sdl-riotboard.dtsiarch/arm/boot/dts/Makefile +1
-0@@ -202,6 +202,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ imx6q-sbc6x.dtb \ imx6q-udoo.dtb \ imx6q-wandboard.dtb \ + imx6s-riotboard.dtb \ imx6sl-evk.dtb \ vf610-cosmic.dtb \ vf610-twr.dtbarch/arm/boot/dts/imx6s-riotboard.dts new file +23
-0@@ -0,0 +1,23 @@ +/* + * Copyright 2014 Iain Paton <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +/dts-v1/; +#include "imx6dl.dtsi" +#include "imx6sdl-riotboard.dtsi" + +/ { + model = "RIoTboard i.MX6S"; + compatible = "riot,imx6s-riotboard", "fsl,imx6dl"; + + memory { + reg = <0x10000000 0x40000000>; + }; + +}; +arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +5
-0@@ -0,0 +1,588 @@ +/* + * Copyright 2014 Iain Paton <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as
arch/arm/boot/dts/imx6sdl-riotboard.dtsi line 15
Quoted 10 lines
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +10
-0+ * published by the Free Software Foundation. + * + */ +#include <dt-bindings/gpio/gpio.h> + +/ { + regulators { + compatible = "simple-bus"; + + reg_2p5v: 2p5v {
Please follow commit 56160e3 (ARM: dts: imx6: use generic node name for fixed regulator) to code fixed regulators.
Quoted 252 lines
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +252
-0+ compatible = "regulator-fixed"; + regulator-name = "2P5V"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + }; + + reg_3p3v: 3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_usb_otg_vbus: usb_otg_vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 22 0>; + enable-active-high; + }; + + }; + + leds { + compatible = "gpio-leds"; + + led0: user1 { + label = "user1"; + gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + + led1: user2 { + label = "user2"; + gpios = <&gpio3 28 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + }; + + sound { + compatible = "fsl,imx-audio-sgtl5000"; + model = "imx6-riotboard-sgtl5000"; + ssi-controller = <&ssi1>; + audio-codec = <&codec>; + audio-routing = + "MIC_IN", "Mic Jack", + "Mic Jack", "Mic Bias", + "Headphone Jack", "HP_OUT"; + mux-int-port = <1>; + mux-ext-port = <3>; + }; + +}; + + +&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux>; + status = "okay"; +}; + + + +&ecspi1 { + fsl,spi-num-chipselects = <1>; + cs-gpios = <&gpio5 17 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + status = "okay"; + + spidev at 1 { + spi-max-frequency = <24000000>; + reg = <0>; + compatible = "spidev"; + }; +}; + +&ecspi2 { + fsl,spi-num-chipselects = <2>; + cs-gpios = <&gpio5 9 0>, <&gpio5 12 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi2>; + status = "okay"; + + spidev at 1 { + spi-max-frequency = <24000000>; + reg = <0>; + compatible = "spidev"; + }; + spidev at 2 { + spi-max-frequency = <24000000>; + reg = <1>; + compatible = "spidev"; + }; +}; + +&ecspi3 { + fsl,spi-num-chipselects = <2>; + cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi3>; + status = "okay"; + + spidev at 1 { + spi-max-frequency = <24000000>; + reg = <0>; + compatible = "spidev"; + }; + spidev at 2 { + spi-max-frequency = <24000000>; + reg = <1>; + compatible = "spidev"; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rgmii"; + phy-reset-gpios = <&gpio3 31 0>; + interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, + <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; + status = "okay"; +}; + +&hdmi { + compatible = "fsl,imx6dl-hdmi"; + ddc-i2c-bus = <&i2c2>; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; + + codec: sgtl5000 at 0a { + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + clocks = <&clks 201>; + VDDA-supply = <®_2p5v>; + VDDIO-supply = <®_3p3v>; + }; + + pmic: pf0100 at 08 { + compatible = "fsl,pfuze100"; + reg = <0x08>; + interrupt-parent = <&gpio5>; + interrupts = <16 8>; + + regulators { + + reg_vddcore: sw1ab { /* VDDARM_IN */ + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-always-on; + }; + + reg_vddsoc: sw1c { /* VDDSOC_IN */ + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-always-on; + }; + + reg_gen_3v3: sw2 { /* VDDHIGH_IN */ + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_ddr_1v5a: sw3a { /* NVCC_DRAM, NVCC_RGMII */ + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-always-on; + }; + + reg_ddr_1v5b: sw3b { /* NVCC_DRAM, NVCC_RGMII */ + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-always-on; + }; + + reg_ddr_vtt: sw4 { /* MIPI conn */ + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-always-on; + }; + + reg_5v_600mA: swbst { /* not used */ + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + }; + + reg_snvs_3v: vsnvs { /* VDD_SNVS_IN */ + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + + vref_reg: vrefddr { /* VREF_DDR */ + regulator-boot-on; + regulator-always-on; + }; + + reg_vgen1_1v5: vgen1 { /* not used */ + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + reg_vgen2_1v2_eth: vgen2 { /* pcie ? */ + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + regulator-always-on; + }; + + reg_vgen3_2v8: vgen3 { /* not used */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + reg_vgen4_1v8: vgen4 { /* NVCC_SD3 */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_vgen5_2v5_sgtl: vgen5 { /* Pwr LED & 5V0_delayed enable */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_vgen6_3v3: vgen6 { /* #V#_DELAYED enable, MIPI */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; +
arch/arm/boot/dts/imx6sdl-riotboard.dtsi line 277
Quoted 10 lines
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +10
-0+&i2c4 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + clocks = <&clks 116>; + status = "okay"; +}; + + +&iomuxc {
Putting this iomuxc node which has a big mount of data at the bottom of the file can slightly make the dts file more readable.
arch/arm/boot/dts/imx6sdl-riotboard.dtsi line 281
Quoted 4 lines
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +4
-0+ pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + imx6-embest {
Why 'embest'? It's more sensible to use 'riotboard'?
arch/arm/boot/dts/imx6sdl-riotboard.dtsi line 285
Quoted 4 lines
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +4
-0+ pinctrl_hog: hoggrp { + fsl,pins = < + MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 /* user led0 */ + MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x80000000 /* user led1 */
These should be in a pinctrl entry for led rather than hog group.
Quoted 255 lines
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +255
-0+ >; + }; + + pinctrl_audmux: audmuxgrp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x8000000 + MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x8000000 + MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x8000000 + MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x8000000 + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* CAM_MCLK */ + >; + }; + + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 + MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 + MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 + MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x000b1 /* CS0 */ + >; + }; + + pinctrl_ecspi2: ecspi2grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x000b1 /* CS1 */ + MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI 0x100b1 + MX6QDL_PAD_DISP0_DAT17__ECSPI2_MISO 0x100b1 + MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x000b1 /* CS0 */ + MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK 0x100b1 + >; + }; + + pinctrl_ecspi3: ecspi3grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 + MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 + MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 + MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x000b1 /* CS0 */ + MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 0x000b1 /* CS1 */ + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 /* AR8035 pin strapping: IO voltage: pull up */ + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0 /* AR8035 pin strapping: PHYADDR#0: pull down */ + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x130b0 /* AR8035 pin strapping: PHYADDR#1: pull down */ + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 /* AR8035 pin strapping: MODE#1: pull up */ + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 /* AR8035 pin strapping: MODE#3: pull up */ + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0 /* AR8035 pin strapping: MODE#0: pull down */ + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000 /* GPIO16 -> AR8035 25MHz */ + MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0 /* RGMII_nRST */ + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* AR8035 interrupt */ + MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c4: i2c4grp { + fsl,pins = < + MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1 + >; + }; + + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm2: pwm2grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm3: pwm3grp { + fsl,pins = < + MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm4: pwm4grp { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart4: uart4grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart5: uart5grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* MX6QDL_PAD_EIM_D22__USB_OTG_PWR */ + MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x80000000 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 /* SD2 CD */ + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* SD2 WP */ + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3 CD */ + MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x80000000 /* SD3 WP */ + >; + }; + + pinctrl_usdhc4: usdhc4grp { + fsl,pins = < + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 + MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x80000000 /* SD4 RST (eMMC) */ + >; + }; + + }; +}; + + + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; + status = "okay"; +}; + +&pwm3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm3>; + status = "okay"; +}; + +&pwm4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm4>; + status = "okay"; +}; + +&ssi1 { + fsl,mode = "i2s-slave"; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + status = "okay";
arch/arm/boot/dts/imx6sdl-riotboard.dtsi line 550
Quoted 10 lines
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +10
-0+}; + +&uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart5>; + status = "okay"; +}; + +&usbh1 { + status = "okay";
Add 'status' at the end of the property list.
Shawn
Quoted 41 lines
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +38
-0+ dr_mode = "host"; + disable-over-current; +}; + +&usbotg { + vbus-supply = <®_usb_otg_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + disable-over-current; + dr_mode = "otg"; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + cd-gpios = <&gpio1 4 0>; + wp-gpios = <&gpio1 2 0>; + vmmc-supply = <®_3p3v>; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + cd-gpios = <&gpio7 0 0>; + wp-gpios = <&gpio7 1 0>; + vmmc-supply = <®_3p3v>; + status = "okay"; +}; + +&usdhc4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4>; + vmmc-supply = <®_3p3v>; + non-removable; + status = "okay"; +};Signature · 1 line
1.8.5.1
RFC PATCH 1/1 ARM: dts: imx6: add new board RIoTboard
Quoted 7 lines · Shawn Guo
Quoted 3 lines · Iain Paton
The fec interrupt errata seems to suggest that a different gpio could be used but I can't find any documentation or example dts that does so. Suggestions welcome.
Take a look at commit 6261c4c (ARM: dts: imx6qdl-sabrelite: use
GPIO_6for FEC interrupt.). It seems you already has it for your board.
Yep, I'd had a look at those and added it. I'm assuming that using GPIO_6 for this means I can't also use that pad for i2c3 at the same time?
The pad is wired to the lvds connector for use with a touchscreen when configured as i2c3
Quoted 3 lines
We do not use imx6s as a SoC name in the kernel tree. It's just an imx6dl with the second CPU core fused out. So please name the file
imx6dl-riotboard.dts.
Ok.
Quoted 3 lines
Also, I'm not sure why you need an additional level with that .dtsi file, if it will only be soldered with imx6dl. We have that .dtsi for boards like sabresd, because the board support both imx6q and imx6dl.
I probably don't need it then. I believe the board can support both, but I don't know if the manufacturer will ever build any like that.
There's another highly similar board from the same manufacturer that uses a dual. So my thinking was that there's a possibility to have a dtsi with all of the common parts and only differences in the dts.
I'll remove the additional level.
Quoted 7 lines
arch/arm/boot/dts/imx6sdl-riotboard.dtsi line 15
Quoted 4 lines
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +4
-0+ regulators { + compatible = "simple-bus"; + + reg_2p5v: 2p5v {Please follow commit 56160e3 (ARM: dts: imx6: use generic node name for fixed regulator) to code fixed regulators.
Will do.
Quoted 5 lines
Quoted 2 lines
+
+&iomuxc {Putting this iomuxc node which has a big mount of data at the bottom of the file can slightly make the dts file more readable.
Ok, wasn't sure of the convention so just ordered them alphabetically.
Quoted 3 lines
arch/arm/boot/dts/imx6sdl-riotboard.dtsi line 281
Quoted 1 line
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +1
-0+ imx6-embest {Why 'embest'? It's more sensible to use 'riotboard'?
Throwback to a previous iteration. There are two boards with a shared history, RIoTboard and MarSboard, both manufactured by Embest which is subsiduary of element14.
I originally had the common parts of this in a shared dtsi used by both boards.
I'll change it here.
Quoted 7 lines
arch/arm/boot/dts/imx6sdl-riotboard.dtsi line 285
Quoted 5 lines
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +4
-0+ pinctrl_hog: hoggrp { + fsl,pins = < + MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 /* user led0 */ + MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x80000000 /* user led1 */These should be in a pinctrl entry for led rather than hog group.
Ok.
Quoted 4 lines
Review
Quoted 2 lines
+&usbh1 {
(quoted diff) +1
-0+ status = "okay";Add 'status' at the end of the property list.
Ok.
I'll fix up these and Fabios comments and resend.
Thanks for the review!
Iain
RFC PATCH 1/1 ARM: dts: imx6: add new board RIoTboard
In reply to Fabio EstevamQuoted 2 lines · Fabio Estevam
On Tue, May 6, 2014 at 7:03 PM, Iain Paton <[email protected]> wrote:
Fabio, I'll address all your comments and resend. Thanks for reviewing!
Quoted 11 lines
arch/arm/boot/dts/imx6sdl-riotboard.dtsi line 481
Quoted 10 lines
arch/arm/boot/dts/imx6sdl-riotboard.dtsi new file +10
-0+ + pinctrl_usdhc4: usdhc4grp { + fsl,pins = < + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 + MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x80000000 /* SD4 RST (eMMC) */
Quoted 2 lines
Just curious: do you get eMMC working? I tried it on mx6qsabresd and it is not working for me.
Yes, it works on the RIoTboard.
The other element14/embest design, MarSboard uses an i.MX6 Dual, has it's eMMC on usdhc3 instead of 4 and I've been completely unsuccessful getting it to work, have tried most combination of pad settings.
Different vendor of eMMC on the MarS from the RIoTboard.
What's interesting is that on MarS the eMMC works in u-boot with the same pad settings and the MarS eMMC does appear to work in the 3.0.35 BSP, so perhaps it's something in the mmc layer.
I have a note to have a look at http://article.gmane.org/gmane.linux.kernel.mmc/26407
since what Markus reports seeing on RIoT looks very similar to what I see on MarS.
Unfortunately I haven't had time to investigate further.
Iain
PATCH v2 1/1 ARM: dts: imx6: add new board RIoTboard
In reply to Shawn Guoadd element14s RIoTboard http://www.riotboard.org which is an i.MX6Solo based design targeted at makers.
--- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6dl-riotboard.dts | 593 +++++++++++++++++++++++++++++++++ 2 files changed, 594 insertions(+) create mode 100644 arch/arm/boot/dts/imx6dl-riotboard.dts
arch/arm/boot/dts/Makefile +1 -0
@@ -179,6 +179,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ imx6dl-gw54xx.dtb \ imx6dl-hummingboard.dtb \ imx6dl-nitrogen6x.dtb \ + imx6dl-riotboard.dtb \ imx6dl-sabreauto.dtb \ imx6dl-sabrelite.dtb \ imx6dl-sabresd.dtb \
arch/arm/boot/dts/imx6dl-riotboard.dts new file +593 -0
593 lines not on this page · raw message
Signature · 1 line
1.8.5.1
Fabio Estevam
reviewerPATCH v2 1/1 ARM: dts: imx6: add new board RIoTboard
Quoted 4 lines · Iain Paton
add element14s RIoTboard http://www.riotboard.org which is an i.MX6Solo based design targeted at makers.
Signed-off-by Iain Paton<[email protected]>
Looks good. One comment only:
arch/arm/boot/dts/imx6dl-riotboard.dts line 282
Quoted 5 lines
+&i2c4 {
arch/arm/boot/dts/imx6dl-riotboard.dts new file +4
-0+ clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + clocks = <&clks 116>;
You could remove this 'clocks' line.
Thu, 8 May 2014 10:45:39 -0300 ?? Fabio Estevam <[email protected]>:
Quoted 9 lines · Iain Paton
Quoted 4 lines
add element14s RIoTboard http://www.riotboard.org which is an i.MX6Solo based design targeted at makers.
Signed-off-by Iain Paton<[email protected]>Looks good. One comment only:
Quoted 7 lines
arch/arm/boot/dts/imx6dl-riotboard.dts line 282
Quoted 5 lines
+&i2c4 {
arch/arm/boot/dts/imx6dl-riotboard.dts new file +4
-0+ clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + clocks = <&clks 116>;You could remove this 'clocks' line.
As well as "clock-frequency", since 100 kHz is default value.
---
PATCH v2 1/1 ARM: dts: imx6: add new board RIoTboard
In reply to Fabio EstevamQuoted 9 lines · Fabio Estevam
Quoted 4 lines · Iain Paton
add element14s RIoTboard http://www.riotboard.org which is an i.MX6Solo based design targeted at makers.
Signed-off-by Iain Paton<[email protected]>Looks good. One comment only:
Quoted 8 lines
arch/arm/boot/dts/imx6dl-riotboard.dts line 282
Quoted 5 lines
+&i2c4 {
arch/arm/boot/dts/imx6dl-riotboard.dts new file +4
-0+ clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + clocks = <&clks 116>;You could remove this 'clocks' line.
I don't see how.
has the definition of i2c4 as
aips2: aips-bus at 02100000 {
i2c4: i2c at 021f8000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx1-i2c";
reg = <0x021f8000 0x4000>;
interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
};as it has no clocks line I need to add one somewhere otherwise the driver won't bind to i2c4.
The missing clocks line was something I'd ran into earlier which led to this
https://git.kernel.org/cgit/linux/kernel/git/shawnguo/linux.git/commit/?h=for-next&id=22f5176336b4fc859b8b16211bdfe079405a778f
If it's preferable to put the clocks line in imx6dl.dtsi then I can do it there instead.
Seperate patch to be applied before the RIoTboard one would be best?
Iain
Thu, 08 May 2014 15:36:04 +0100 ?? Iain Paton <[email protected]>:
Quoted 39 lines · Fabio Estevam
Quoted 9 lines · Iain Paton
Quoted 4 lines
add element14s RIoTboard http://www.riotboard.org which is an i.MX6Solo based design targeted at makers.
Signed-off-by Iain Paton<[email protected]>Looks good. One comment only:
Quoted 8 lines
arch/arm/boot/dts/imx6dl-riotboard.dts line 282
Quoted 5 lines
+&i2c4 {
arch/arm/boot/dts/imx6dl-riotboard.dts new file +4
-0+ clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + clocks = <&clks 116>;You could remove this 'clocks' line.
I don't see how.
has the definition of i2c4 as
aips2: aips-bus at 02100000 { i2c4: i2c at 021f8000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx1-i2c"; reg = <0x021f8000 0x4000>; interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; };as it has no clocks line I need to add one somewhere otherwise the driver won't bind to i2c4.
Quoted 6 lines
The missing clocks line was something I'd ran into earlier which led to this
https://git.kernel.org/cgit/linux/kernel/git/shawnguo/linux.git/commit/?h=for-next&id=22f5176336b4fc859b8b16211bdfe079405a778fIf it's preferable to put the clocks line in
imx6dl.dtsithen I can do it there instead.
Seperate patch to be applied before the RIoTboard one would be best?
I think you should make patch series:
1. Add missing clock into imx6dl.dtsi
2. Add label to AIPS2 to imx6qdl.dtsi and use this label in imx6dl.dtsi
3. This patch
---
PATCH v2 1/1 ARM: dts: imx6: add new board RIoTboard
Quoted 4 lines · Alexander Shiyan
I think you should make patch series:
1. Add missing clock intoimx6dl.dtsi
2. Add label to AIPS2 toimx6qdl.dtsiand use this label inimx6dl.dtsi
3. This patch
I'm not sure I follow 1/2. You mean something like this
arch/arm/boot/dts/imx6qdl.dtsi +1 -1
@@ -767,7 +767,7 @@ }; }; - aips-bus at 02100000 { /* AIPS2 */ + aips2: aips-bus at 02100000 { /* AIPS2 */ compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>;
followed by
arch/arm/boot/dts/imx6dl.dtsi +12 -10
@@ -80,16 +80,6 @@ }; }; - aips2: aips-bus at 02100000 { - i2c4: i2c at 021f8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx1-i2c"; - reg = <0x021f8000 0x4000>; - interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - }; }; display-subsystem {
@@ -98,6 +88,18 @@ }; }; +&aips2 { + i2c4: i2c at 021f8000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx1-i2c"; + reg = <0x021f8000 0x4000>; + interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks 116>; + status = "disabled"; + }; +}; + &hdmi { compatible = "fsl,imx6dl-hdmi"; };
then the riotboard patch with clock-frequency lines dropped from all i2c sections and clocks line dropped from i2c4?
Ok, I can see how that works, if it's acceptable to everyone I'll post the series shortly.
Thanks,
Iain
Thu, 08 May 2014 18:12:02 +0100 ?? Iain Paton <[email protected]>:
Quoted 48 lines · Alexander Shiyan
Quoted 5 lines
I think you should make patch series:
1. Add missing clock intoimx6dl.dtsi
2. Add label to AIPS2 toimx6qdl.dtsiand use this label inimx6dl.dtsi
3. This patchI'm not sure I follow 1/2. You mean something like this
arch/arm/boot/dts/imx6qdl.dtsi +1
-1@@ -767,7 +767,7 @@ }; }; - aips-bus at 02100000 { /* AIPS2 */ + aips2: aips-bus at 02100000 { /* AIPS2 */ compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>;followed by
arch/arm/boot/dts/imx6dl.dtsi +0
-10@@ -80,16 +80,6 @@ }; }; - aips2: aips-bus at 02100000 { - i2c4: i2c at 021f8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx1-i2c"; - reg = <0x021f8000 0x4000>; - interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - }; }; display-subsystem {
arch/arm/boot/dts/imx6dl.dtsi line 95
Quoted 8 lines
arch/arm/boot/dts/imx6dl.dtsi +5
-0@@ -98,6 +88,18 @@ }; }; +&aips2 { + i2c4: i2c at 021f8000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx1-i2c";
Are you sure about use "fsl,imx1-i2c" instead of "fsl,imx21-i2c"? In any case you should add "fsl-imx6dl-i2c" as first compatible string. The rest looks good.
arch/arm/boot/dts/imx6dl.dtsi line 101
Quoted 6 lines
arch/arm/boot/dts/imx6dl.dtsi +6
-0+ reg = <0x021f8000 0x4000>; + interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks 116>; + status = "disabled"; + }; +};
---
PATCH v2 1/1 ARM: dts: imx6: add new board RIoTboard
Quoted 10 lines · Alexander Shiyan
Thu, 08 May 2014 18:12:02 +0100 ?? Iain Paton <[email protected]>:
arch/arm/boot/dts/imx6dl.dtsi line 95
Quoted 5 lines
+&aips2 {
arch/arm/boot/dts/imx6dl.dtsi +4
-0+ i2c4: i2c at 021f8000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx1-i2c";Are you sure about use "fsl,imx1-i2c" instead of "fsl,imx21-i2c"? In any case you should add "fsl-imx6dl-i2c" as first compatible string. The rest looks good.
Sure? No. However that's what currently exists in imx6dl.dtsi for i2c4.
looking at the other i2c interfaces in imx6qdl.dtsi, they're using fsl,imx6q-i2c as the first compatible string. So I think I should use either fsl,imx6dl-i2c or fsl,imx6q-i2c.
What's the difference between that and your suggested fsl-imx6dl-i2c? If we assume can assume the i2c4 block is functionally identical to i2c[123] then shouldn't I use an identical compatible string?
The driver has the following compatible strings:
fsl,imx1-i2c
fsl,imx21-i2c
fsl,vf610-i2c
the difference between imx1-i2c and imx21-i2c seems to be an added delay before generating the stop bit to workaround a hardware bug.
As it seems likely I'm the first to be trying to enable i2c4 I'd want to check that the hardware bug doesn't apply here and that there's no negative effect.
I think you're probably correct and I should change it, but I'll do the tests anyway and post the series if I don't see any problems.
Thanks,
Iain
Thu, 08 May 2014 20:27:55 +0100 ?? Iain Paton <[email protected]>:
Quoted 12 lines · Alexander Shiyan
Quoted 10 lines
Thu, 08 May 2014 18:12:02 +0100 ?? Iain Paton <[email protected]>:
arch/arm/boot/dts/imx6dl.dtsi line 95
Quoted 5 lines
+&aips2 {
arch/arm/boot/dts/imx6dl.dtsi +4
-0+ i2c4: i2c at 021f8000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx1-i2c";Are you sure about use "fsl,imx1-i2c" instead of "fsl,imx21-i2c"? In any case you should add "fsl-imx6dl-i2c" as first compatible string. The rest looks good.
Quoted 8 lines
Sure? No. However that's what currently exists in
imx6dl.dtsifor i2c4.looking at the other i2c interfaces in
imx6qdl.dtsi, they're using fsl,imx6q-i2c as the first compatible string. So I think I should use either fsl,imx6dl-i2c or fsl,imx6q-i2c.
What's the difference between that and your suggested fsl-imx6dl-i2c? If we assume can assume the i2c4 block is functionally identical to i2c[123] then shouldn't I use an identical compatible string?
Yes. This is just my typo. If all I2C-interfaces is identical in the datasheet, the same compatible string (fsl,imx6q-i2c) should be used.
---
PATCH v2 1/1 ARM: dts: imx6: add new board RIoTboard
In reply to Iain PatonQuoted 56 lines · Iain Paton
Quoted 4 lines · Alexander Shiyan
I think you should make patch series:
1. Add missing clock intoimx6dl.dtsi
2. Add label to AIPS2 toimx6qdl.dtsiand use this label inimx6dl.dtsi
3. This patchI'm not sure I follow 1/2. You mean something like this
arch/arm/boot/dts/imx6qdl.dtsi +1
-1@@ -767,7 +767,7 @@ }; }; - aips-bus at 02100000 { /* AIPS2 */ + aips2: aips-bus at 02100000 { /* AIPS2 */ compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>;followed by
arch/arm/boot/dts/imx6dl.dtsi +5
-10@@ -80,16 +80,6 @@ }; }; - aips2: aips-bus at 02100000 { - i2c4: i2c at 021f8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx1-i2c"; - reg = <0x021f8000 0x4000>; - interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - }; }; display-subsystem {@@ -98,6 +88,18 @@ }; }; +&aips2 { + i2c4: i2c at 021f8000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx1-i2c";
arch/arm/boot/dts/imx6dl.dtsi line 105
Quoted 10 lines
arch/arm/boot/dts/imx6dl.dtsi +7
-0+ reg = <0x021f8000 0x4000>; + interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks 116>; + status = "disabled"; + }; +}; + &hdmi { compatible = "fsl,imx6dl-hdmi"; };
I do not think we need so many changes. The only necessary changes would be something like below.
arch/arm/boot/dts/imx6dl.dtsi +2 -1
@@ -84,9 +84,10 @@ i2c4: i2c at 021f8000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx1-i2c"; + compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; reg = <0x021f8000 0x4000>; interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks 116>; status = "disabled"; }; };
PATCH v2 1/1 ARM: dts: imx6: add new board RIoTboard
In reply to Iain PatonQuoted 71 lines · Iain Paton
add element14s RIoTboard http://www.riotboard.org which is an i.MX6Solo based design targeted at makers.
Signed-off-by Iain Paton<[email protected]>--- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6dl-riotboard.dts | 593 +++++++++++++++++++++++++++++++++ 2 files changed, 594 insertions(+) create mode 100644 arch/arm/boot/dts/imx6dl-riotboard.dtsarch/arm/boot/dts/Makefile +1
-0@@ -179,6 +179,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ imx6dl-gw54xx.dtb \ imx6dl-hummingboard.dtb \ imx6dl-nitrogen6x.dtb \ + imx6dl-riotboard.dtb \ imx6dl-sabreauto.dtb \ imx6dl-sabrelite.dtb \ imx6dl-sabresd.dtb \arch/arm/boot/dts/imx6dl-riotboard.dts new file +42
-0@@ -0,0 +1,593 @@ +/* + * Copyright 2014 Iain Paton <[email protected]> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +/dts-v1/; +#include "imx6dl.dtsi" +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "RIoTboard i.MX6S"; + compatible = "riot,imx6s-riotboard", "fsl,imx6dl"; + + memory { + reg = <0x10000000 0x40000000>; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_2p5v: regulator at 0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "2P5V"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + }; + + reg_3p3v: regulator at 1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +
arch/arm/boot/dts/imx6dl-riotboard.dts line 52
Quoted 10 lines
arch/arm/boot/dts/imx6dl-riotboard.dts new file +10
-0+ reg_usb_otg_vbus: regulator at 2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 22 0>; + enable-active-high; + }; +
Drop this new line.
Quoted 43 lines
arch/arm/boot/dts/imx6dl-riotboard.dts new file +43
-0+ }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_led>; + + led0: user1 { + label = "user1"; + gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + + led1: user2 { + label = "user2"; + gpios = <&gpio3 28 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + }; + + sound { + compatible = "fsl,imx-audio-sgtl5000"; + model = "imx6-riotboard-sgtl5000"; + ssi-controller = <&ssi1>; + audio-codec = <&codec>; + audio-routing = + "MIC_IN", "Mic Jack", + "Mic Jack", "Mic Bias", + "Headphone Jack", "HP_OUT"; + mux-int-port = <1>; + mux-ext-port = <3>; + }; +}; + +&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux>; + status = "okay"; +}; + +&ecspi1 { + fsl,spi-num-chipselects = <1>;
arch/arm/boot/dts/imx6dl-riotboard.dts line 105
Quoted 10 lines
arch/arm/boot/dts/imx6dl-riotboard.dts new file +10
-0+ cs-gpios = <&gpio5 17 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + status = "okay"; + + spidev at 0 { + spi-max-frequency = <24000000>; + reg = <0>; + compatible = "spidev"; + };
What's this? Is this the common way we code spi devices in device tree?
Quoted 67 lines
arch/arm/boot/dts/imx6dl-riotboard.dts new file +67
-0+}; + +&ecspi2 { + fsl,spi-num-chipselects = <2>; + cs-gpios = <&gpio5 9 0>, <&gpio5 12 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi2>; + status = "okay"; + + spidev at 0 { + spi-max-frequency = <24000000>; + reg = <0>; + compatible = "spidev"; + }; + spidev at 1 { + spi-max-frequency = <24000000>; + reg = <1>; + compatible = "spidev"; + }; +}; + +&ecspi3 { + fsl,spi-num-chipselects = <2>; + cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi3>; + status = "okay"; + + spidev at 0 { + spi-max-frequency = <24000000>; + reg = <0>; + compatible = "spidev"; + }; + spidev at 1 { + spi-max-frequency = <24000000>; + reg = <1>; + compatible = "spidev"; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rgmii"; + phy-reset-gpios = <&gpio3 31 0>; + interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, + <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c2>; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; + + codec: sgtl5000 at 0a { + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + clocks = <&clks 201>; + VDDA-supply = <®_2p5v>; + VDDIO-supply = <®_3p3v>;
arch/arm/boot/dts/imx6dl-riotboard.dts line 182
Quoted 10 lines
arch/arm/boot/dts/imx6dl-riotboard.dts new file +10
-0+ }; + + pmic: pf0100 at 08 { + compatible = "fsl,pfuze100"; + reg = <0x08>; + interrupt-parent = <&gpio5>; + interrupts = <16 8>; + + regulators { +
Drop this new line.
Quoted 198 lines
arch/arm/boot/dts/imx6dl-riotboard.dts new file +198
-0+ reg_vddcore: sw1ab { /* VDDARM_IN */ + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-always-on; + }; + + reg_vddsoc: sw1c { /* VDDSOC_IN */ + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-always-on; + }; + + reg_gen_3v3: sw2 { /* VDDHIGH_IN */ + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_ddr_1v5a: sw3a { /* NVCC_DRAM, NVCC_RGMII */ + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-always-on; + }; + + reg_ddr_1v5b: sw3b { /* NVCC_DRAM, NVCC_RGMII */ + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-always-on; + }; + + reg_ddr_vtt: sw4 { /* MIPI conn */ + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-always-on; + }; + + reg_5v_600mA: swbst { /* not used */ + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + }; + + reg_snvs_3v: vsnvs { /* VDD_SNVS_IN */ + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + + vref_reg: vrefddr { /* VREF_DDR */ + regulator-boot-on; + regulator-always-on; + }; + + reg_vgen1_1v5: vgen1 { /* not used */ + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + reg_vgen2_1v2_eth: vgen2 { /* pcie ? */ + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + regulator-always-on; + }; + + reg_vgen3_2v8: vgen3 { /* not used */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + reg_vgen4_1v8: vgen4 { /* NVCC_SD3 */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_vgen5_2v5_sgtl: vgen5 { /* Pwr LED & 5V0_delayed enable */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_vgen6_3v3: vgen6 { /* #V#_DELAYED enable, MIPI */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; + +&i2c4 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + clocks = <&clks 116>; + status = "okay"; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; + status = "okay"; +}; + +&pwm3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm3>; + status = "okay"; +}; + +&pwm4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm4>; + status = "okay"; +}; + +&ssi1 { + fsl,mode = "i2s-slave"; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + status = "okay"; +}; + +&uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart5>; + status = "okay"; +}; + +&usbh1 { + dr_mode = "host"; + disable-over-current; + status = "okay"; +}; + +&usbotg { + vbus-supply = <®_usb_otg_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + disable-over-current; + dr_mode = "otg"; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + cd-gpios = <&gpio1 4 0>; + wp-gpios = <&gpio1 2 0>; + vmmc-supply = <®_3p3v>; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + cd-gpios = <&gpio7 0 0>; + wp-gpios = <&gpio7 1 0>; + vmmc-supply = <®_3p3v>; + status = "okay"; +}; + +&usdhc4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4>;
arch/arm/boot/dts/imx6dl-riotboard.dts line 390
Quoted 10 lines
arch/arm/boot/dts/imx6dl-riotboard.dts new file +10
-0+ vmmc-supply = <®_3p3v>; + non-removable; + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + + imx6-riotboard { + pinctrl_led: ledgrp {
The pinctrl entries are all sorted alphabetically pretty good only except this one.
Shawn
Quoted 207 lines
arch/arm/boot/dts/imx6dl-riotboard.dts new file +203
-0+ fsl,pins = < + MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 /* user led0 */ + MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x80000000 /* user led1 */ + >; + }; + + pinctrl_audmux: audmuxgrp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x8000000 + MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x8000000 + MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x8000000 + MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x8000000 + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* CAM_MCLK */ + >; + }; + + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 + MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 + MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 + MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x000b1 /* CS0 */ + >; + }; + + pinctrl_ecspi2: ecspi2grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x000b1 /* CS1 */ + MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI 0x100b1 + MX6QDL_PAD_DISP0_DAT17__ECSPI2_MISO 0x100b1 + MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x000b1 /* CS0 */ + MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK 0x100b1 + >; + }; + + pinctrl_ecspi3: ecspi3grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 + MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 + MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 + MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x000b1 /* CS0 */ + MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 0x000b1 /* CS1 */ + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 /* AR8035 pin strapping: IO voltage: pull up */ + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0 /* AR8035 pin strapping: PHYADDR#0: pull down */ + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x130b0 /* AR8035 pin strapping: PHYADDR#1: pull down */ + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 /* AR8035 pin strapping: MODE#1: pull up */ + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 /* AR8035 pin strapping: MODE#3: pull up */ + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0 /* AR8035 pin strapping: MODE#0: pull down */ + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000 /* GPIO16 -> AR8035 25MHz */ + MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0 /* RGMII_nRST */ + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* AR8035 interrupt */ + MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c4: i2c4grp { + fsl,pins = < + MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1 + >; + }; + + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm2: pwm2grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm3: pwm3grp { + fsl,pins = < + MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm4: pwm4grp { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart4: uart4grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart5: uart5grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* MX6QDL_PAD_EIM_D22__USB_OTG_PWR */ + MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x80000000 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 /* SD2 CD */ + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* SD2 WP */ + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3 CD */ + MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x80000000 /* SD3 WP */ + >; + }; + + pinctrl_usdhc4: usdhc4grp { + fsl,pins = < + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 + MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x80000000 /* SD4 RST (eMMC) */ + >; + }; + }; +};Signature · 1 line
1.8.5.1
PATCH v2 1/1 ARM: dts: imx6: add new board RIoTboard
Quoted 16 lines · Shawn Guo
arch/arm/boot/dts/imx6dl-riotboard.dts line 105
Quoted 12 lines · Iain Paton
+&ecspi1 {
arch/arm/boot/dts/imx6dl-riotboard.dts new file +11
-0+ fsl,spi-num-chipselects = <1>; + cs-gpios = <&gpio5 17 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + status = "okay"; + + spidev at 0 { + spi-max-frequency = <24000000>; + reg = <0>; + compatible = "spidev"; + };What's this? Is this the common way we code spi devices in device tree?
I'd appreciate your guidance here, what would you prefer?
My reasons for adding spidev were as follows:
1. The SPI pins are not used on the board, they go to an expansion header.
2. Board is targeted at makers who are likely to want to attach external devices.
3. Experience has been that if they don't find an easy and already configured way to use something they reach for devmem2 or similar.
4. devicetree is often seen as being too hard by people who come to these boards from things like arduino
I've already had questions on how to find the physical address of /dev/i2c-0 seemingly due to some of the above.
I'm happy to drop the spidev entries if that's what you'd prefer, but if I do that I'm undecided if I should then just drop the ecspi sections as well and free up more gpio pins on the expansion header for other uses.
I'll tidy up all the other comments, and use your suggested method for the i2c4 changes.
Thanks,
Iain
PATCH v2 1/1 ARM: dts: imx6: add new board RIoTboard
Quoted 30 lines · Iain Paton
Quoted 16 lines · Shawn Guo
arch/arm/boot/dts/imx6dl-riotboard.dts line 105
Quoted 12 lines · Iain Paton
+&ecspi1 {
arch/arm/boot/dts/imx6dl-riotboard.dts new file +11
-0+ fsl,spi-num-chipselects = <1>; + cs-gpios = <&gpio5 17 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + status = "okay"; + + spidev at 0 { + spi-max-frequency = <24000000>; + reg = <0>; + compatible = "spidev"; + };What's this? Is this the common way we code spi devices in device tree?
I'd appreciate your guidance here, what would you prefer?
My reasons for adding spidev were as follows:
1. The SPI pins are not used on the board, they go to an expansion header.
2. Board is targeted at makers who are likely to want to attach external devices.
3. Experience has been that if they don't find an easy and already configured way to use something they reach for devmem2 or similar.
4. devicetree is often seen as being too hard by people who come to these boards from things like arduino
Quoted 6 lines
I've already had questions on how to find the physical address of
/dev/i2c-0seemingly due to some of the above.I'm happy to drop the spidev entries if that's what you'd prefer, but if I do that I'm undecided if I should then just drop the ecspi sections as well and free up more gpio pins on the expansion header for other uses.
You can decide if you want to drop or keep the ecspi sections. I prefer to drop those spidev nodes, before we're not sure this is the right way to go.
Shawn
PATCH v2 1/1 ARM: dts: imx6: add new board RIoTboard
Quoted 34 lines · Shawn Guo
Quoted 33 lines · Iain Paton
Quoted 16 lines · Shawn Guo
arch/arm/boot/dts/imx6dl-riotboard.dts line 105
Quoted 12 lines · Iain Paton
+&ecspi1 {
arch/arm/boot/dts/imx6dl-riotboard.dts new file +11
-0+ fsl,spi-num-chipselects = <1>; + cs-gpios = <&gpio5 17 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + status = "okay"; + + spidev at 0 { + spi-max-frequency = <24000000>; + reg = <0>; + compatible = "spidev"; + };What's this? Is this the common way we code spi devices in device tree?
I'd appreciate your guidance here, what would you prefer?
My reasons for adding spidev were as follows:
1. The SPI pins are not used on the board, they go to an expansion header.
2. Board is targeted at makers who are likely to want to attach external devices.
3. Experience has been that if they don't find an easy and already configured way to use something they reach for devmem2 or similar.
4. devicetree is often seen as being too hard by people who come to these boards from things like arduinoI've already had questions on how to find the physical address of
/dev/i2c-0seemingly due to some of the above.
Quoted 7 lines
Quoted 3 lines
I'm happy to drop the spidev entries if that's what you'd prefer, but if I do that I'm undecided if I should then just drop the ecspi sections as well and free up more gpio pins on the expansion header for other uses.
You can decide if you want to drop or keep the ecspi sections. I prefer to drop those spidev nodes, before we're not sure this is the right way to go.
I'll likely drop them then. Am I ok to leave the pin groups in the iomuxc when nothing uses them, or would you prefer I only include what's actually being used ?
PATCH v2 1/1 ARM: dts: imx6: add new board RIoTboard
Quoted 3 lines · Iain Paton
I'll likely drop them then. Am I ok to leave the pin groups in the iomuxc when nothing uses them, or would you prefer I only include what's actually being used ?
It's okay to keep the pin groups in there.
Shawn
PATCH v3 1/2 ARM: dts: imx6: i2c4 cleanup
add missing i2c4 clock and correct the compatible string to match other imx6 i2c blocks
--- arch/arm/boot/dts/imx6dl.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
arch/arm/boot/dts/imx6dl.dtsi +2 -1
@@ -84,9 +84,10 @@ i2c4: i2c at 021f8000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx1-i2c"; + compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; reg = <0x021f8000 0x4000>; interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks 116>; status = "disabled"; }; };
Signature · 1 line
1.8.5.1
PATCH v3 2/2 ARM: dts: imx6: add new board RIoTboard
In reply to Shawn Guoadd element14s RIoTboard http://www.riotboard.org which is an i.MX6Solo based design targeted at makers.
---
v3. dropped spidev & ecspi nodes
addressed remaining review comments
arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6dl-riotboard.dts | 539 +++++++++++++++++++++++++++++++++ 2 files changed, 540 insertions(+) create mode 100644 arch/arm/boot/dts/imx6dl-riotboard.dts
arch/arm/boot/dts/Makefile +1 -0
@@ -179,6 +179,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ imx6dl-gw54xx.dtb \ imx6dl-hummingboard.dtb \ imx6dl-nitrogen6x.dtb \ + imx6dl-riotboard.dtb \ imx6dl-sabreauto.dtb \ imx6dl-sabrelite.dtb \ imx6dl-sabresd.dtb \
arch/arm/boot/dts/imx6dl-riotboard.dts new file +539 -0
539 lines not on this page · raw message
Signature · 1 line
1.8.5.1
Fabio Estevam
reviewerPATCH v3 1/2 ARM: dts: imx6: i2c4 cleanup
In reply to Iain PatonQuoted 4 lines · Iain Paton
add missing i2c4 clock and correct the compatible string to match other imx6 i2c blocks
Signed-off-by Iain Paton<[email protected]>
Fabio Estevam
reviewerPATCH v3 2/2 ARM: dts: imx6: add new board RIoTboard
In reply to Iain PatonQuoted 4 lines · Iain Paton
add element14s RIoTboard http://www.riotboard.org which is an i.MX6Solo based design targeted at makers.
Signed-off-by Iain Paton<[email protected]>
Shawn Guo
AppliedPATCH v3 1/2 ARM: dts: imx6: i2c4 cleanup
In reply to Iain PatonQuoted 4 lines · Iain Paton
add missing i2c4 clock and correct the compatible string to match other imx6 i2c blocks
Signed-off-by Iain Paton<[email protected]>
Applied, thanks.
Shawn Guo
AppliedPATCH v3 2/2 ARM: dts: imx6: add new board RIoTboard
In reply to Iain PatonQuoted 4 lines · Iain Paton
add element14s RIoTboard http://www.riotboard.org which is an i.MX6Solo based design targeted at makers.
Signed-off-by Iain Paton<[email protected]>
Applied, thanks.