atmel_mxt_ts: defaulting irqflags to IRQF_TRIGGER_FALLING

Nick,

I have been using your for-next branch to base my development of touchscreen support on TI's DRA7x EVM. With the recent updates, it has worked out great and once I got the configuration right, it was just a question of adding DT data for the platform.

Now, there is one problem with Stephen's patch defaulting the irqflags to IRQF_TRIGGER_FALLING. The interrupt controller I am using (ARM GIC) does not seem to support that and the device fails to probe:

[    1.932798] genirq: Setting trigger mode 2 for irq 151 failed (gic_set_type+0x0/0xf0)
[    1.941340] atmel_mxt_ts 0-004a: Failed to register interrupt
[    1.947452] atmel_mxt_ts: probe of 0-004a failed with error -22

Attached patch does the trick for me:

drivers/input/touchscreen/atmel_mxt_ts.c +0 -3

index 71154c2..f2d3f72 100644
@@ -3155,9 +3155,6 @@ static struct mxt_platform_data *mxt_parse_dt(struct i2c_client *client)
 	pdata->gpio_reset = of_get_named_gpio_flags(dev->of_node,
 		"atmel,reset-gpio", 0, NULL);
 
-	/* Default to this. Properties can be added to configure it later */
-	pdata->irqflags = IRQF_TRIGGER_FALLING;
-
 	of_property_read_string(dev->of_node, "atmel,cfg_name",
 				&pdata->cfg_name);
 

Can you switch to leaving the platform to specify flags (at least for the DT case)?

Thanks,
Sekhar

Sekhar Nori wrote at Tuesday, July 01, 2014 3:52 AM:

Quoted 10 lines

Nick,

I have been using your for-next branch to base my development of touchscreen support on TI's DRA7x EVM. With the recent updates, it has worked out great and once I got the configuration right, it was just a question of adding DT data for the platform.

Now, there is one problem with Stephen's patch defaulting the irqflags to IRQF_TRIGGER_FALLING. The interrupt controller I am using (ARM GIC) does not seem to support that and the device fails to probe:

On the Tegra systems I have, IRQF_TRIGGER_FALLING is the correct (or at least a valid) choice. That's probably because the Atmel IRQ signal is routed to our GPIO controller, which is also an IRQ controller, and then "forwarded" up the chain to the GIC, with the polarity the GIC expects.

If IRQ_TRIGGER_FALLING doesn't work everywhere, then we'll need to add some kind of DT property to configure the polarity of the IRQ output.

Quoted 7 lines · Stephen Warren

On the Tegra systems I have, IRQF_TRIGGER_FALLING is the correct (or at least a valid) choice. That's probably because the Atmel IRQ signal is routed to our GPIO controller, which is also an IRQ controller, and then "forwarded" up the chain to the GIC, with the polarity the GIC expects.

If IRQ_TRIGGER_FALLING doesn't work everywhere, then we'll need to add some kind of DT property to configure the polarity of the IRQ output.

Yeah, I think so too.

Nick,

If you are going to rebase your branch, will you be able to fold in the patch in my previous e-mail? Else, I can send a more formal patch to you.

Quoted 9 lines · Sekhar Nori

Quoted 7 lines · Stephen Warren

On the Tegra systems I have, IRQF_TRIGGER_FALLING is the correct (or at least a valid) choice. That's probably because the Atmel IRQ signal is routed to our GPIO controller, which is also an IRQ controller, and then "forwarded" up the chain to the GIC, with the polarity the GIC expects.

If IRQ_TRIGGER_FALLING doesn't work everywhere, then we'll need to add some kind of DT property to configure the polarity of the IRQ output.

Quoted 6 lines

Yeah, I think so too.

Nick,

If you are going to rebase your branch, will you be able to fold in the patch in my previous e-mail? Else, I can send a more formal patch to you.

Either IRQF_TRIGGER_FALLING or IRQF_TRIGGER_LOW will work with these chips (it isn't a question of polarity but whether it's edge- or level- triggered). There isn't a sensible default. Atmel prefer IRQF_TRIGGER_LOW, however I've seen some IRQ controllers will revert to a polled mode for IRQF_TRIGGER_LOW, which kills performance.

So, the sensible course of action seems to be to remove the default IRQF_TRIGGER_FALLING in the device tree parsing, and provide a device tree parameter for the flags. If you agree, I will sort this out at my end, you don't need to send a patch.

I have to leave it in in the case where there is neither static platform data, or device tree node, because that is used for some systems, but that shouldn't affect either of you.

In this case board code should take care of setting up the interrupt properly and the driver should simply use 0 as flags in request_irq(). By the way, doesn't generic DT infrastructure already allow specifying interrupt triggers and sets them up properly?

Quoted 9 lines · Sekhar Nori

Quoted 7 lines · Stephen Warren

On the Tegra systems I have, IRQF_TRIGGER_FALLING is the correct (or at least a valid) choice. That's probably because the Atmel IRQ signal is routed to our GPIO controller, which is also an IRQ controller, and then "forwarded" up the chain to the GIC, with the polarity the GIC expects.

If IRQ_TRIGGER_FALLING doesn't work everywhere, then we'll need to add some kind of DT property to configure the polarity of the IRQ output.

Quoted 6 lines

Yeah, I think so too.

Nick,

If you are going to rebase your branch, will you be able to fold in the patch in my previous e-mail? Else, I can send a more formal patch to you.

Either IRQF_TRIGGER_FALLING or IRQF_TRIGGER_LOW will work with these chips (it isn't a question of polarity but whether it's edge- or level- triggered). There isn't a sensible default. Atmel prefer IRQF_TRIGGER_LOW, however I've seen some IRQ controllers will revert to a polled mode for IRQF_TRIGGER_LOW, which kills performance.

So, the sensible course of action seems to be to remove the default IRQF_TRIGGER_FALLING in the device tree parsing, and provide a device tree parameter for the flags. If you agree, I will sort this out at my end, you don't need to send a patch.

I have to leave it in in the case where there is neither static platform data, or device tree node, because that is used for some systems, but that shouldn't affect either of you.

BTW, I do have a set of patches ready to send, once this change is made.