sdhci: fix sd/emmc clear transfer mode issue

PATCH New Vincent Wan 3 participants 5 messages Sep 18, 2014 – Nov 4, 2014

Subsystems (2)

MMC, SD and SDIO Secure digital host controller interface (SDHCI) driver

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Vincent Wan

author

2014-09-18 04:11 UTC #0 lore raw

PATCH 1/1 sdhci: fix sd/emmc clear transfer mode issue

This patch is to fix AMD SD/eMMC host controller issue. We have seen this DMA false trigger after the following sequence:

1.The first command has data transfer and driver enable DMA. 2.Driver did not clear transfer mode register, and send second command. 3.The second command has a response with busy state.

for example: cmd8 -> cmd6

Signed-off-by Wan Zongshun <[email protected]>

Signed-off-by Vincent Wan <[email protected]>

---
 drivers/mmc/host/sdhci-pci.c | 26 ++++++++++++++++++++++++++
 drivers/mmc/host/sdhci.c     |  3 +++
 include/linux/mmc/sdhci.h    |  2 ++
 3 files changed, 31 insertions(+)

drivers/mmc/host/sdhci-pci.c +26 -0

index 52c42fc..68ea2f2 100644
@@ -622,6 +622,22 @@ static const struct sdhci_pci_fixes sdhci_rtsx = {
 	.probe_slot	= rtsx_probe_slot,
 };
 
+static int amd_probe(struct sdhci_pci_chip *chip)
+{
+	struct pci_dev	*smbus_dev;
+	smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
+			PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL);
+
+	if (smbus_dev && (smbus_dev->revision < 0x51))
+		chip->quirks2 |= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD;
+
+	return 0;
+}
+
+static const struct sdhci_pci_fixes sdhci_amd = {
+	.probe		= amd_probe,
+};
+
 static const struct pci_device_id pci_ids[] = {
 	{
 		.vendor		= PCI_VENDOR_ID_RICOH,

@@ -991,6 +1007,16 @@ static const struct pci_device_id pci_ids[] = {
 		.driver_data	= (kernel_ulong_t)&sdhci_o2,
 	},
 
+	{
+		.vendor		= PCI_VENDOR_ID_AMD,
+		.device		= PCI_ANY_ID,
+		.class		= PCI_CLASS_SYSTEM_SDHCI << 8,
+		.class_mask	= 0xFFFF00,
+		.subvendor	= PCI_ANY_ID,
+		.subdevice	= PCI_ANY_ID,
+		.driver_data	= (kernel_ulong_t)&sdhci_amd,
+	},
+
 	{	/* Generic SD host controller */
 		PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
 	},

drivers/mmc/host/sdhci.c +3 -0

index 47055f3..b9e0bc7 100644
@@ -879,6 +879,9 @@ static void sdhci_set_transfer_mode(struct sdhci_host *host,
 	u16 mode;
 	struct mmc_data *data = cmd->data;
 
+	if (host->quirks2 & SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD)
+		sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE);
+
 	if (data == NULL) {
 		/* clear Auto CMD settings for no data CMDs */
 		mode = sdhci_readw(host, SDHCI_TRANSFER_MODE);

include/linux/mmc/sdhci.h +2 -0

index 08abe99..6ba5dab 100644
@@ -98,6 +98,8 @@ struct sdhci_host {
 #define SDHCI_QUIRK2_BROKEN_HS200			(1<<6)
 /* Controller does not support DDR50 */
 #define SDHCI_QUIRK2_BROKEN_DDR50			(1<<7)
+/* need clear transfer mode register before send cmd */
+#define SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD	(1<<8)
 
 	int irq;		/* Device IRQ */
 	void __iomem *ioaddr;	/* Mapped address */

Signature · 1 line

1.8.1.2

Vincent Wan

author

2014-10-30 05:02 UTC #1 lore raw

PATCH 1/1 mmc: Add a quirk for AMD SDHC transfer mode register need to be cleared for cmd without data

SDHC controller in AMD chipsets require SDHC transfer mode register to be cleared for commands without data. The issue was uncovered during testing eMMC cards on KB/ML based platforms.

Signed-off-by Vincent Wan <[email protected]>

Signed-off-by Arindam Nath <[email protected]>

Tested-by Vikram B <[email protected]>

Tested-by Raghavendra Swamy <[email protected]>

---
 drivers/mmc/host/sdhci-pci.c | 27 +++++++++++++++++++++++++++
 drivers/mmc/host/sdhci.c     | 11 ++++++++---
 include/linux/mmc/sdhci.h    |  2 ++
 3 files changed, 37 insertions(+), 3 deletions(-)

drivers/mmc/host/sdhci-pci.c +27 -0

index 6119297..8f5c998 100644
@@ -645,6 +645,23 @@ static const struct sdhci_pci_fixes sdhci_rtsx = {
 	.probe_slot	= rtsx_probe_slot,
 };
 
+static int amd_probe(struct sdhci_pci_chip *chip)
+{
+	struct pci_dev	*smbus_dev;
+
+	smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
+			PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL);
+
+	if (smbus_dev && (smbus_dev->revision < 0x51))
+		chip->quirks2 |= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD;
+
+	return 0;
+}
+
+static const struct sdhci_pci_fixes sdhci_amd = {
+	.probe		= amd_probe,
+};
+
 static const struct pci_device_id pci_ids[] = {
 	{
 		.vendor		= PCI_VENDOR_ID_RICOH,

@@ -1045,6 +1062,16 @@ static const struct pci_device_id pci_ids[] = {
 		.driver_data	= (kernel_ulong_t)&sdhci_o2,
 	},
 
+	{
+		.vendor		= PCI_VENDOR_ID_AMD,
+		.device		= PCI_ANY_ID,
+		.class		= PCI_CLASS_SYSTEM_SDHCI << 8,
+		.class_mask	= 0xFFFF00,
+		.subvendor	= PCI_ANY_ID,
+		.subdevice	= PCI_ANY_ID,
+		.driver_data	= (kernel_ulong_t)&sdhci_amd,
+	},
+
 	{	/* Generic SD host controller */
 		PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
 	},

drivers/mmc/host/sdhci.c +8 -3

index ada1a3e..8085f26 100644
@@ -889,10 +889,15 @@ static void sdhci_set_transfer_mode(struct sdhci_host *host,
 	struct mmc_data *data = cmd->data;
 
 	if (data == NULL) {
-		/* clear Auto CMD settings for no data CMDs */
-		mode = sdhci_readw(host, SDHCI_TRANSFER_MODE);
-		sdhci_writew(host, mode & ~(SDHCI_TRNS_AUTO_CMD12 |
+		if (host->quirks2 &
+			SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD) {
+			sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE);
+		} else {
+			/* clear Auto CMD settings for no data CMDs */
+			mode = sdhci_readw(host, SDHCI_TRANSFER_MODE);
+			sdhci_writew(host, mode & ~(SDHCI_TRNS_AUTO_CMD12 |
 				SDHCI_TRNS_AUTO_CMD23), SDHCI_TRANSFER_MODE);
+		}
 		return;
 	}

include/linux/mmc/sdhci.h +0 -0

index dba793e..0a287aa 100644
@@ -100,6 +100,8 @@ struct sdhci_host {
 #define SDHCI_QUIRK2_BROKEN_DDR50			(1<<7)
 /* Stop command (CMD12) can set Transfer Complete when not using

MMC_RSP_BUSY */
#define SDHCI_QUIRK2_STOP_WITH_TC (1<<8)
+/* need clear transfer mode register before send cmd */
+#define SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD (1<<9)

int irq; /* Device IRQ */
void __iomem *ioaddr; /* Mapped address */

Signature · 1 line

1.8.1.2

Wan ZongShun

2014-11-04 02:24 UTC #2 lore raw

Re: [PATCH] mmc: Add a quirk for AMD SDHC transfer mode register need to be cleared for cmd without data

Hi Ulf,

How about this patch?

Thanks!
Vincent Wan.

2014-10-30 12:06 GMT+08:00 Vincent Wan <[email protected]>:

Quoted 103 lines

SDHC controller in AMD chipsets require SDHC transfer mode register to be cleared for commands without data. The issue was uncovered during testing eMMC cards on KB/ML based platforms.

Signed-off-by Vincent Wan <[email protected]>

Signed-off-by Arindam Nath <[email protected]>

Tested-by Vikram B <[email protected]>

Tested-by Raghavendra Swamy <[email protected]>

---
 drivers/mmc/host/sdhci-pci.c | 27 +++++++++++++++++++++++++++
 drivers/mmc/host/sdhci.c     | 11 ++++++++---
 include/linux/mmc/sdhci.h    |  2 ++
 3 files changed, 37 insertions(+), 3 deletions(-)

drivers/mmc/host/sdhci-pci.c +17 -0

index 6119297..8f5c998 100644
@@ -645,6 +645,23 @@ static const struct sdhci_pci_fixes sdhci_rtsx = {
        .probe_slot     = rtsx_probe_slot,
 };
 
+static int amd_probe(struct sdhci_pci_chip *chip)
+{
+       struct pci_dev  *smbus_dev;
+
+       smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
+                       PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL);
+
+       if (smbus_dev && (smbus_dev->revision < 0x51))
+               chip->quirks2 |=
 SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD;
+
+       return 0;
+}
+
+static const struct sdhci_pci_fixes sdhci_amd = {
+       .probe          = amd_probe,
+};
+
 static const struct pci_device_id pci_ids[] = {
        {

.vendor = PCI_VENDOR_ID_RICOH,

drivers/mmc/host/sdhci-pci.c +10 -0

@@ -1045,6 +1062,16 @@ static const struct pci_device_id pci_ids[] = {
                .driver_data    = (kernel_ulong_t)&sdhci_o2,
        },
 
+       {
+               .vendor         = PCI_VENDOR_ID_AMD,
+               .device         = PCI_ANY_ID,
+               .class          = PCI_CLASS_SYSTEM_SDHCI << 8,
+               .class_mask     = 0xFFFF00,
+               .subvendor      = PCI_ANY_ID,
+               .subdevice      = PCI_ANY_ID,
+               .driver_data    = (kernel_ulong_t)&sdhci_amd,
+       },
+
        {       /* Generic SD host controller */
                PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
        },

drivers/mmc/host/sdhci.c +8 -3

index ada1a3e..8085f26 100644
@@ -889,10 +889,15 @@ static void sdhci_set_transfer_mode(struct sdhci_host
 *host,
        struct mmc_data *data = cmd->data;
 
        if (data == NULL) {
-               /* clear Auto CMD settings for no data CMDs */
-               mode = sdhci_readw(host, SDHCI_TRANSFER_MODE);
-               sdhci_writew(host, mode & ~(SDHCI_TRNS_AUTO_CMD12 |
+               if (host->quirks2 &
+                       SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD) {
+                       sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE);
+               } else {
+                       /* clear Auto CMD settings for no data CMDs */
+                       mode = sdhci_readw(host, SDHCI_TRANSFER_MODE);
+                       sdhci_writew(host, mode & ~(SDHCI_TRNS_AUTO_CMD12 |
                                SDHCI_TRNS_AUTO_CMD23),
 SDHCI_TRANSFER_MODE);
+               }
                return;

include/linux/mmc/sdhci.h +0 -0

index dba793e..0a287aa 100644
@@ -100,6 +100,8 @@ struct sdhci_host {
 #define SDHCI_QUIRK2_BROKEN_DDR50                      (1<<7)
 /* Stop command (CMD12) can set Transfer Complete when not using

MMC_RSP_BUSY */
#define SDHCI_QUIRK2_STOP_WITH_TC (1<<8)

include/linux/mmc/sdhci.h +2 -1

+/* need clear transfer mode register before send cmd */
+#define SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD (1<<9)
 
        int irq;                /* Device IRQ */
        void __iomem *ioaddr;   /* Mapped address */
--

1.8.1.2

Signature · 2 lines

Wan ZongShun.
www.mcuos.com

Vincent Wan

author

2014-11-04 07:37 UTC #4 lore raw

Re: [PATCH] mmc: Add a quirk for AMD SDHC transfer mode register need to be cleared for cmd without data

In reply to Ulf Hansson

Quoted 10 lines · Ulf Hansson

Quoted 8 lines · Vincent Wan
SDHC controller in AMD chipsets require SDHC transfer mode register to be cleared for commands without data. The issue was uncovered during testing eMMC cards on KB/ML based platforms.
Signed-off-by Vincent Wan <[email protected]>
Signed-off-by Arindam Nath <[email protected]>
Tested-by Vikram B <[email protected]>
Tested-by Raghavendra Swamy <[email protected]>

Quoted 9 lines

Hi Vincent,
This looks good to me, but the patch has checkpatch errors.
Could you check at your side and re-send?
Kind regards
Uffe

Hi Ulf,

My email tool causes this issue, so I have already sent patch v2 to you.

Thanks!
Vincent Wan.

Quoted 95 lines

---
  drivers/mmc/host/sdhci-pci.c | 27 +++++++++++++++++++++++++++
  drivers/mmc/host/sdhci.c     | 11 ++++++++---
  include/linux/mmc/sdhci.h    |  2 ++
  3 files changed, 37 insertions(+), 3 deletions(-)

drivers/mmc/host/sdhci-pci.c +17 -0

index 6119297..8f5c998 100644
@@ -645,6 +645,23 @@ static const struct sdhci_pci_fixes sdhci_rtsx = {
         .probe_slot     = rtsx_probe_slot,
  };
 
+static int amd_probe(struct sdhci_pci_chip *chip)
+{
+       struct pci_dev  *smbus_dev;
+
+       smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
+                       PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL);
+
+       if (smbus_dev && (smbus_dev->revision < 0x51))
+               chip->quirks2 |=
 SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD;
+
+       return 0;
+}
+
+static const struct sdhci_pci_fixes sdhci_amd = {
+       .probe          = amd_probe,
+};
+
  static const struct pci_device_id pci_ids[] = {
         {

.vendor = PCI_VENDOR_ID_RICOH,

drivers/mmc/host/sdhci-pci.c +10 -0

@@ -1045,6 +1062,16 @@ static const struct pci_device_id pci_ids[] = {
                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
         },
 
+       {
+               .vendor         = PCI_VENDOR_ID_AMD,
+               .device         = PCI_ANY_ID,
+               .class          = PCI_CLASS_SYSTEM_SDHCI << 8,
+               .class_mask     = 0xFFFF00,
+               .subvendor      = PCI_ANY_ID,
+               .subdevice      = PCI_ANY_ID,
+               .driver_data    = (kernel_ulong_t)&sdhci_amd,
+       },
+
         {       /* Generic SD host controller */
                 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
         },

drivers/mmc/host/sdhci.c +8 -3

index ada1a3e..8085f26 100644
@@ -889,10 +889,15 @@ static void sdhci_set_transfer_mode(struct sdhci_host
 *host,
         struct mmc_data *data = cmd->data;
 
         if (data == NULL) {
-               /* clear Auto CMD settings for no data CMDs */
-               mode = sdhci_readw(host, SDHCI_TRANSFER_MODE);
-               sdhci_writew(host, mode & ~(SDHCI_TRNS_AUTO_CMD12 |
+               if (host->quirks2 &
+                       SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD) {
+                       sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE);
+               } else {
+                       /* clear Auto CMD settings for no data CMDs */
+                       mode = sdhci_readw(host, SDHCI_TRANSFER_MODE);
+                       sdhci_writew(host, mode & ~(SDHCI_TRNS_AUTO_CMD12 |
                                 SDHCI_TRNS_AUTO_CMD23),
 SDHCI_TRANSFER_MODE);
+               }
                 return;

include/linux/mmc/sdhci.h +0 -0

index dba793e..0a287aa 100644
@@ -100,6 +100,8 @@ struct sdhci_host {
  #define SDHCI_QUIRK2_BROKEN_DDR50                      (1<<7)
  /* Stop command (CMD12) can set Transfer Complete when not using

MMC_RSP_BUSY */
#define SDHCI_QUIRK2_STOP_WITH_TC (1<<8)

include/linux/mmc/sdhci.h +2 -1

+/* need clear transfer mode register before send cmd */
+#define SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD (1<<9)
 
         int irq;                /* Device IRQ */
         void __iomem *ioaddr;   /* Mapped address */
--

1.8.1.2

Ulf Hansson

2014-11-04 07:51 UTC #3 lore raw

Re: [PATCH] mmc: Add a quirk for AMD SDHC transfer mode register need to be cleared for cmd without data

In reply to Vincent Wan

Quoted 8 lines · Vincent Wan

SDHC controller in AMD chipsets require SDHC transfer mode register to be cleared for commands without data. The issue was uncovered during testing eMMC cards on KB/ML based platforms.
Signed-off-by Vincent Wan <[email protected]>
Signed-off-by Arindam Nath <[email protected]>
Tested-by Vikram B <[email protected]>
Tested-by Raghavendra Swamy <[email protected]>

Hi Vincent,

This looks good to me, but the patch has checkpatch errors.

Could you check at your side and re-send?

Kind regards
Uffe

Quoted 95 lines

---
 drivers/mmc/host/sdhci-pci.c | 27 +++++++++++++++++++++++++++
 drivers/mmc/host/sdhci.c     | 11 ++++++++---
 include/linux/mmc/sdhci.h    |  2 ++
 3 files changed, 37 insertions(+), 3 deletions(-)

drivers/mmc/host/sdhci-pci.c +17 -0

index 6119297..8f5c998 100644
@@ -645,6 +645,23 @@ static const struct sdhci_pci_fixes sdhci_rtsx = {
        .probe_slot     = rtsx_probe_slot,
 };
 
+static int amd_probe(struct sdhci_pci_chip *chip)
+{
+       struct pci_dev  *smbus_dev;
+
+       smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
+                       PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL);
+
+       if (smbus_dev && (smbus_dev->revision < 0x51))
+               chip->quirks2 |=
 SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD;
+
+       return 0;
+}
+
+static const struct sdhci_pci_fixes sdhci_amd = {
+       .probe          = amd_probe,
+};
+
 static const struct pci_device_id pci_ids[] = {
        {

.vendor = PCI_VENDOR_ID_RICOH,

drivers/mmc/host/sdhci-pci.c +10 -0

@@ -1045,6 +1062,16 @@ static const struct pci_device_id pci_ids[] = {
                .driver_data    = (kernel_ulong_t)&sdhci_o2,
        },
 
+       {
+               .vendor         = PCI_VENDOR_ID_AMD,
+               .device         = PCI_ANY_ID,
+               .class          = PCI_CLASS_SYSTEM_SDHCI << 8,
+               .class_mask     = 0xFFFF00,
+               .subvendor      = PCI_ANY_ID,
+               .subdevice      = PCI_ANY_ID,
+               .driver_data    = (kernel_ulong_t)&sdhci_amd,
+       },
+
        {       /* Generic SD host controller */
                PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
        },

drivers/mmc/host/sdhci.c +8 -3

index ada1a3e..8085f26 100644
@@ -889,10 +889,15 @@ static void sdhci_set_transfer_mode(struct sdhci_host
 *host,
        struct mmc_data *data = cmd->data;
 
        if (data == NULL) {
-               /* clear Auto CMD settings for no data CMDs */
-               mode = sdhci_readw(host, SDHCI_TRANSFER_MODE);
-               sdhci_writew(host, mode & ~(SDHCI_TRNS_AUTO_CMD12 |
+               if (host->quirks2 &
+                       SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD) {
+                       sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE);
+               } else {
+                       /* clear Auto CMD settings for no data CMDs */
+                       mode = sdhci_readw(host, SDHCI_TRANSFER_MODE);
+                       sdhci_writew(host, mode & ~(SDHCI_TRNS_AUTO_CMD12 |
                                SDHCI_TRNS_AUTO_CMD23),
 SDHCI_TRANSFER_MODE);
+               }
                return;

include/linux/mmc/sdhci.h +0 -0

index dba793e..0a287aa 100644
@@ -100,6 +100,8 @@ struct sdhci_host {
 #define SDHCI_QUIRK2_BROKEN_DDR50                      (1<<7)
 /* Stop command (CMD12) can set Transfer Complete when not using

MMC_RSP_BUSY */
#define SDHCI_QUIRK2_STOP_WITH_TC (1<<8)

include/linux/mmc/sdhci.h +2 -1

+/* need clear transfer mode register before send cmd */
+#define SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD (1<<9)
 
        int irq;                /* Device IRQ */
        void __iomem *ioaddr;   /* Mapped address */
--

1.8.1.2