drm/msm: Don't split an IB at the end of ring buffer
Subsystems (4)
PATCH 1/1 drm/msm: Don't split an IB at the end of ring buffer
Splitting the command sequence for an IB1 submission at the end of the ring buffer can hang the GPU. To fix this, if there isn't enough contiguous space at the end to fit the full command sequence, insert NOPs at the end, and write the sequence at the start, as space becomes available.
--- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 45 ++++++++++++++++++++++++++++++--- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 8 +++--- 2 files changed, 46 insertions(+), 7 deletions(-)
(quoted diff) +0 -0
b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index 1fe7c8d..51901df 100644
drivers/gpu/drm/msm/adreno/adreno_gpu.c +42 -3
52 lines not on this page · raw message
(quoted diff) +0 -0
b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index 3fa06b3..47ba8f5 100644
drivers/gpu/drm/msm/adreno/adreno_gpu.h +2 -2
@@ -247,7 +247,7 @@ void adreno_idle(struct msm_gpu *gpu);void adreno_show (struct msm_gpu *gpu,struct seq_file *m);#endif void adreno_dump (struct msm_gpu *gpu); -void adreno_wait_ring (struct msm_gpu *gpu,uint32_t ndwords); +void adreno_wait_ring_contiguous (struct msm_gpu *gpu,uint32_t ndwords);int adreno_gpu_init (struct drm_device *drm,struct platform_device *pdev,struct adreno_gpu *gpu,const struct adreno_gpu_funcs *funcs);
@@ -259,7 +259,7 @@ void adreno_gpu_cleanup(struct adreno_gpu *gpu);static inline void OUT_PKT0 (struct msm_ringbuffer *ring,uint16_t regindx,uint16_t cnt) { -adreno_wait_ring (ring->gpu, cnt+1 ); +adreno_wait_ring_contiguous (ring->gpu, cnt+1 );OUT_RING (ring,CP_TYPE0_PKT | ((cnt-1 ) <<16 ) | (regindx &0x7FFF )); }
@@ -267,14 +267,14 @@ OUT_PKT0(struct msm_ringbuffer *ring, uint16_t
regindx, uint16_t cnt)
static inline void
OUT_PKT2(struct msm_ringbuffer *ring)
{
- adreno_wait_ring(ring->gpu, 1);
+ adreno_wait_ring_contiguous(ring->gpu, 1);
OUT_RING(ring, CP_TYPE2_PKT);
}
static inline void
OUT_PKT3(struct msm_ringbuffer *ring, uint8_t opcode, uint16_t cnt) {
- adreno_wait_ring(ring->gpu, cnt+1);
+ adreno_wait_ring_contiguous(ring->gpu, cnt+1);
OUT_RING(ring, CP_TYPE3_PKT | ((cnt-1) << 16) | ((opcode & 0xFF) << 8));
}
Signature · 6 lines
1.8.5.2 -- Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project