VPU on iMX51 babbage board

PATCH Pierluigi Passaro 3 participants 5 messages Dec 10, 2014 – Dec 12, 2014

Subsystems (3)

Device tree bindings Media (V4L/DVB) Arm i.MX and Layerscape

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Pierluigi Passaro

author

2014-12-10 22:01 UTC #0 lore raw

Hi all,
I'm trying to use VPU code driver on iMX51 with kernel 3.18, following these steps:
- disabled DVI interface
- enabled LCD interface
- configured and enabled VPU
- copied iMX51 vpu firmware without header and renamed v4l-coda7541-imx53.bin in /lib/firmware

Attached you can find the patch and the defconfig I used.

The boot process hangs after loading the firmware at the first attempt of writing in VPU address space in the function coda_write of file driver/media/platform/coda/coda-common.c

Is there anything preventing the coda driver to work with iMX51? Could anyone provide any suggestion on how investigate the problem?

Thanks
Regards
Pierluigi

arch/arm/boot/dts/imx51-babbage.dts +5 -1

index 56569ce..e8b372b 100644
@@ -44,6 +44,7 @@
 		interface-pix-fmt = "rgb24";
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_ipu_disp1>;
+		status = "disabled";
 		display-timings {
 			native-mode = <&timing0>;
 			timing0: dvi {

@@ -71,7 +72,6 @@
 		interface-pix-fmt = "rgb565";
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_ipu_disp2>;
-		status = "disabled";
 		display-timings {
 			native-mode = <&timing1>;
 			timing1: claawvga {

@@ -338,6 +338,10 @@
 	status = "okay";
 };
 
+&vpu {
+	status = "okay";
+};
+
 &i2c1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_i2c1>;

arch/arm/boot/dts/imx51.dtsi +36 -1

index 92660e1..ce82b1f 100644
@@ -143,9 +143,17 @@
 			};
 
 			ipu_di1: port@3 {
+				#address-cells = <1>;
+				#size-cells = <0>;
 				reg = <3>;
 
-				ipu_di1_disp1: endpoint {
+				ipu_di1_disp1: endpoint@0 {
+					reg = <0>;
+				};
+
+				ipu_di1_tve: endpoint@2 {
+					reg = <2>;
+					remote-endpoint = <&tve_in>;
 				};
 			};
 		};

@@ -578,6 +586,33 @@
 				clock-names = "ipg", "ahb", "ptp";
 				status = "disabled";
 			};
+
+			tve: tve@83ff0000 {
+				compatible = "fsl,imx53-tve";
+				reg = <0x83ff0000 0x1000>;
+				interrupts = <92>;
+				clocks = <&clks IMX5_CLK_TVE_GATE>,
+				         <&clks IMX5_CLK_IPU_DI1_SEL>;
+				clock-names = "tve", "di1_sel";
+				status = "disabled";
+
+				port {
+					tve_in: endpoint {
+						remote-endpoint = <&ipu_di1_tve>;
+					};
+				};
+			};
+
+			vpu: vpu@83ff4000 {
+				compatible = "fsl,imx53-vpu";
+				reg = <0x83ff4000 0x1000>;
+				interrupts = <9>;
+				clocks = <&clks IMX5_CLK_VPU_REFERENCE_GATE>,
+				         <&clks IMX5_CLK_VPU_GATE>;
+				clock-names = "per", "ahb";
+				resets = <&src 1>;
+				iram = <&iram>;
+			};
 		};
 	};
 };

CONFIG_KERNEL_LZO=y
CONFIG_SYSVIPC=y
CONFIG_FHANDLE=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_LOG_BUF_SHIFT=18
CONFIG_CGROUPS=y
CONFIG_RELAY=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
CONFIG_PERF_EVENTS=y
# CONFIG_SLUB_DEBUG is not set
# CONFIG_COMPAT_BRK is not set
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SRCVERSION_ALL=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_ARCH_MULTI_V6=y
CONFIG_ARCH_MXC=y
CONFIG_MACH_MX31LILLY=y
CONFIG_MACH_MX31LITE=y
CONFIG_MACH_PCM037=y
CONFIG_MACH_PCM037_EET=y
CONFIG_MACH_MX31_3DS=y
CONFIG_MACH_MX31MOBOARD=y
CONFIG_MACH_QONG=y
CONFIG_MACH_ARMADILLO5X0=y
CONFIG_MACH_KZM_ARM11_01=y
CONFIG_MACH_IMX31_DT=y
CONFIG_MACH_IMX35_DT=y
CONFIG_MACH_PCM043=y
CONFIG_MACH_MX35_3DS=y
CONFIG_MACH_VPR200=y
CONFIG_SOC_IMX50=y
CONFIG_SOC_IMX51=y
CONFIG_SOC_IMX53=y
CONFIG_SOC_IMX6Q=y
CONFIG_SOC_IMX6SL=y
CONFIG_SOC_IMX6SX=y
CONFIG_SOC_VF610=y
CONFIG_PCI=y
CONFIG_PCI_IMX6=y
CONFIG_SMP=y
CONFIG_VMSPLIT_2G=y
CONFIG_PREEMPT_VOLUNTARY=y
CONFIG_AEABI=y
CONFIG_HIGHMEM=y
CONFIG_CMA=y
CONFIG_CMDLINE="noinitrd console=ttymxc0,115200"
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
CONFIG_ARM_IMX6Q_CPUFREQ=y
CONFIG_VFP=y
CONFIG_NEON=y
CONFIG_BINFMT_MISC=m
CONFIG_PM_RUNTIME=y
CONFIG_PM_DEBUG=y
CONFIG_PM_TEST_SUSPEND=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
CONFIG_IPV6=y
CONFIG_NETFILTER=y
CONFIG_CAN=y
CONFIG_CAN_FLEXCAN=y
CONFIG_CFG80211=y
CONFIG_MAC80211=y
CONFIG_RFKILL=y
CONFIG_RFKILL_INPUT=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_STANDALONE is not set
CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
CONFIG_DMA_CMA=y
CONFIG_IMX_WEIM=y
CONFIG_CONNECTOR=y
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_PHYSMAP_OF=y
CONFIG_MTD_DATAFLASH=y
CONFIG_MTD_M25P80=y
CONFIG_MTD_SST25L=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_GPMI_NAND=y
CONFIG_MTD_NAND_MXC=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_UBI=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=65536
CONFIG_EEPROM_AT24=y
CONFIG_EEPROM_AT25=y
# CONFIG_SCSI_PROC_FS is not set
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_CONSTANTS=y
CONFIG_SCSI_LOGGING=y
CONFIG_SCSI_SCAN_ASYNC=y
# CONFIG_SCSI_LOWLEVEL is not set
CONFIG_ATA=y
CONFIG_SATA_AHCI_PLATFORM=y
CONFIG_AHCI_IMX=y
CONFIG_PATA_IMX=y
CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_BROADCOM is not set
CONFIG_CS89x0=y
CONFIG_CS89x0_PLATFORM=y
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_MICROCHIP is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_SEEQ is not set
CONFIG_SMC91X=y
CONFIG_SMC911X=y
CONFIG_SMSC911X=y
# CONFIG_NET_VENDOR_STMICRO is not set
CONFIG_AT803X_PHY=y
CONFIG_BRCMFMAC=m
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
CONFIG_KEYBOARD_GPIO=y
CONFIG_KEYBOARD_IMX=y
CONFIG_MOUSE_PS2=m
CONFIG_MOUSE_PS2_ELANTECH=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_EGALAX=y
CONFIG_TOUCHSCREEN_MC13783=y
CONFIG_TOUCHSCREEN_TSC2007=y
CONFIG_TOUCHSCREEN_STMPE=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_MMA8450=y
CONFIG_SERIO_SERPORT=m
# CONFIG_LEGACY_PTYS is not set
# CONFIG_DEVKMEM is not set
CONFIG_SERIAL_IMX=y
CONFIG_SERIAL_IMX_CONSOLE=y
CONFIG_SERIAL_FSL_LPUART=y
CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
CONFIG_HW_RANDOM=y
# CONFIG_I2C_COMPAT is not set
CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_HELPER_AUTO is not set
CONFIG_I2C_ALGOPCF=m
CONFIG_I2C_ALGOPCA=m
CONFIG_I2C_IMX=y
CONFIG_SPI=y
CONFIG_SPI_IMX=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_MC9S08DZ60=y
CONFIG_GPIO_STMPE=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_IMX2_WDT=y
CONFIG_MFD_DA9052_I2C=y
CONFIG_MFD_MC13XXX_SPI=y
CONFIG_MFD_MC13XXX_I2C=y
CONFIG_MFD_STMPE=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_ANATOP=y
CONFIG_REGULATOR_DA9052=y
CONFIG_REGULATOR_GPIO=y
CONFIG_REGULATOR_MC13783=y
CONFIG_REGULATOR_MC13892=y
CONFIG_REGULATOR_PFUZE100=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_MEDIA_RC_SUPPORT=y
CONFIG_RC_DEVICES=y
CONFIG_IR_GPIO_CIR=y
CONFIG_V4L_PLATFORM_DRIVERS=y
CONFIG_SOC_CAMERA=y
CONFIG_VIDEO_MX3=y
CONFIG_V4L_MEM2MEM_DRIVERS=y
CONFIG_VIDEO_CODA=y
CONFIG_SOC_CAMERA_OV2640=y
CONFIG_IMX_IPUV3_CORE=y
CONFIG_DRM=y
CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_LCD_L4F00242T03=y
CONFIG_LCD_PLATFORM=y
CONFIG_BACKLIGHT_PWM=y
CONFIG_BACKLIGHT_GPIO=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_LOGO=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_SOC=y
CONFIG_SND_IMX_SOC=y
CONFIG_SND_SOC_PHYCORE_AC97=y
CONFIG_SND_SOC_EUKREA_TLV320=y
CONFIG_SND_SOC_IMX_WM8962=y
CONFIG_SND_SOC_IMX_SGTL5000=y
CONFIG_SND_SOC_IMX_SPDIF=y
CONFIG_SND_SOC_IMX_MC13783=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_MXC=y
CONFIG_USB_STORAGE=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_UDC=y
CONFIG_USB_CHIPIDEA_HOST=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_USB_MXS_PHY=y
CONFIG_USB_GADGET=y
CONFIG_USB_ETH=m
CONFIG_USB_MASS_STORAGE=m
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_ESDHC_IMX=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_ONESHOT=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_INTF_DEV_UIE_EMUL=y
CONFIG_RTC_DRV_PCF8563=y
CONFIG_RTC_DRV_MC13XXX=y
CONFIG_RTC_DRV_MXC=y
CONFIG_RTC_DRV_SNVS=y
CONFIG_DMADEVICES=y
CONFIG_IMX_SDMA=y
CONFIG_MXS_DMA=y
CONFIG_FSL_EDMA=y
CONFIG_STAGING=y
CONFIG_DRM_IMX=y
CONFIG_DRM_IMX_FB_HELPER=y
CONFIG_DRM_IMX_PARALLEL_DISPLAY=y
CONFIG_DRM_IMX_TVE=y
CONFIG_DRM_IMX_LDB=y
CONFIG_DRM_IMX_IPUV3=y
CONFIG_DRM_IMX_HDMI=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_PWM=y
CONFIG_PWM_IMX=y
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
CONFIG_EXT2_FS_SECURITY=y
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
CONFIG_QUOTA=y
CONFIG_QUOTA_NETLINK_INTERFACE=y
# CONFIG_PRINT_QUOTA_WARNING is not set
CONFIG_AUTOFS4_FS=y
CONFIG_FUSE_FS=y
CONFIG_ISO9660_FS=m
CONFIG_JOLIET=y
CONFIG_ZISOFS=y
CONFIG_UDF_FS=m
CONFIG_MSDOS_FS=m
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_UBIFS_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_DEFAULT="cp437"
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ASCII=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_ISO8859_15=m
CONFIG_NLS_UTF8=y
CONFIG_PRINTK_TIME=y
CONFIG_DEBUG_FS=y
CONFIG_MAGIC_SYSRQ=y
# CONFIG_SCHED_DEBUG is not set
CONFIG_PROVE_LOCKING=y
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_FTRACE is not set
# CONFIG_ARM_UNWIND is not set
CONFIG_SECURITYFS=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_HW is not set
CONFIG_CRC_CCITT=m
CONFIG_CRC_T10DIF=y
CONFIG_CRC7=m
CONFIG_LIBCRC32C=m
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y

Fabio Estevam

reviewer

2014-12-11 00:04 UTC #1 lore raw

Quoted 9 lines · Pierluigi Passaro

Hi all,
I'm trying to use VPU code driver on iMX51 with kernel 3.18, following these steps:
- disabled DVI interface
- enabled LCD interface
- configured and enabled VPU
- copied iMX51 vpu firmware without header and renamed v4l-coda7541-imx53.bin in /lib/firmware

Quoted 8 lines

Attached you can find the patch and the defconfig I used.
The boot process hangs after loading the firmware at the first attempt of writing in VPU address space in the function coda_write of file driver/media/platform/coda/coda-common.c
Is there anything preventing the coda driver to work with iMX51? Could anyone provide any suggestion on how investigate the problem?

I have only tested the coda driver on mx6, but looking at the mx51.dtsi you would need this:

arch/arm/boot/dts/imx51.dtsi +13 -0

@@ -121,6 +121,7 @@
         iram: iram@1ffe0000 {
             compatible = "mmio-sram";
             reg = <0x1ffe0000 0x20000>;
+            clocks = <&clks IMX5_CLK_OCRAM>;
         };
 
         ipu: ipu@40000000 {

@@ -584,6 +585,18 @@
                 clock-names = "ipg", "ahb", "ptp";
                 status = "disabled";
             };
+
+            vpu: vpu@83ff4000 {
+                compatible = "fsl,imx53-vpu";
+                reg = <0x83ff4000 0x1000>;
+                interrupts = <9>;
+                clocks = <&clks IMX5_CLK_VPU_REFERENCE_GATE>,
+                         <&clks IMX5_CLK_VPU_GATE>;
+                clock-names = "per", "ahb";
+                resets = <&src 1>;
+                iram = <&iram>;
+            };
         };
+
     };
 };

Also, not sure if all the required coda patches are available in 3.18, so I tried it on linux-next 20141210 on a imx51-babbage (I had to disable USB, otherwise linux-next will hang on this board):

[    1.368454] coda 83ff4000.vpu: Initialized CODA7541.
[    1.373572] coda 83ff4000.vpu: Firmware version: 1.4.50
[    1.396695] coda 83ff4000.vpu: codec registered as /dev/video[0-3]

Also, no sure if we need to distinguish mx51 versus mx53 in the coda driver.

Adding Philipp in case he can comment.

Regards,

Fabio Estevam

Philipp Zabel

2014-12-11 14:03 UTC #2 lore raw

Am Mittwoch, den 10.12.2014, 22:04 -0200 schrieb Fabio Estevam:

Quoted 34 lines

Quoted 9 lines · Pierluigi Passaro
Hi all,
I'm trying to use VPU code driver on iMX51 with kernel 3.18, following these steps:
- disabled DVI interface
- enabled LCD interface
- configured and enabled VPU
- copied iMX51 vpu firmware without header and renamed v4l-coda7541-imx53.bin in /lib/firmware
Quoted 8 lines
Attached you can find the patch and the defconfig I used.
The boot process hangs after loading the firmware at the first attempt of writing in VPU address space in the function coda_write of file driver/media/platform/coda/coda-common.c
Is there anything preventing the coda driver to work with iMX51? Could anyone provide any suggestion on how investigate the problem?
I have only tested the coda driver on mx6, but looking at the mx51.dtsi you would need this:
arch/arm/boot/dts/imx51.dtsi +1 -0
@@ -121,6 +121,7 @@
         iram: iram@1ffe0000 {
             compatible = "mmio-sram";
             reg = <0x1ffe0000 0x20000>;
+            clocks = <&clks IMX5_CLK_OCRAM>;
         };
 
         ipu: ipu@40000000 {

arch/arm/boot/dts/imx51.dtsi line 590

Quoted 6 lines

arch/arm/boot/dts/imx51.dtsi +3 -0

@@ -584,6 +585,18 @@
                 clock-names = "ipg", "ahb", "ptp";
                 status = "disabled";
             };
+
+            vpu: vpu@83ff4000 {
+                compatible = "fsl,imx53-vpu";

This should be "fsl,imx51-vpu", and add a "cnm,codahx14".

According to the old imx-vpu-lib code and the vpu_fw_imx51.bin firmware file, the i.MX51 has a CodaHx14 (0xF00A) as opposed to the i.MX53's Coda7541 (0xF012).

Quoted 17 lines

arch/arm/boot/dts/imx51.dtsi +9 -0
+                reg = <0x83ff4000 0x1000>;
+                interrupts = <9>;
+                clocks = <&clks IMX5_CLK_VPU_REFERENCE_GATE>,
+                         <&clks IMX5_CLK_VPU_GATE>;
+                clock-names = "per", "ahb";
+                resets = <&src 1>;
+                iram = <&iram>;
+            };
         };
+
     };
 };
Also, not sure if all the required coda patches are available in 3.18, so I tried it on linux-next 20141210 on a imx51-babbage (I had to disable USB, otherwise linux-next will hang on this board):

Quoted 7 lines

[    1.368454] coda 83ff4000.vpu: Initialized CODA7541.
[    1.373572] coda 83ff4000.vpu: Firmware version: 1.4.50
[    1.396695] coda 83ff4000.vpu: codec registered as /dev/video[0-3]
Also, no sure if we need to distinguish mx51 versus mx53 in the coda driver.
Adding Philipp in case he can comment.

Yes, the i.MX51 and i.MX53 firmware files are different. So at least an entry for i.MX51 with the correct firmware file name has to be added.

regards
Philipp

Pierluigi Passaro

author

2014-12-12 09:15 UTC #3 lore raw

Quoted 42 lines · Philipp Zabel

Am Mittwoch, den 10.12.2014, 22:04 -0200 schrieb Fabio Estevam:
Quoted 33 lines
Quoted 9 lines · Pierluigi Passaro
Hi all,
I'm trying to use VPU code driver on iMX51 with kernel 3.18, following these steps:
- disabled DVI interface
- enabled LCD interface
- configured and enabled VPU
- copied iMX51 vpu firmware without header and renamed v4l-coda7541-imx53.bin in /lib/firmware
Quoted 8 lines
Attached you can find the patch and the defconfig I used.
The boot process hangs after loading the firmware at the first attempt of writing in VPU address space in the function coda_write of file driver/media/platform/coda/coda-common.c
Is there anything preventing the coda driver to work with iMX51? Could anyone provide any suggestion on how investigate the problem?
I have only tested the coda driver on mx6, but looking at the mx51.dtsi you would need this:
arch/arm/boot/dts/imx51.dtsi +1 -0
@@ -121,6 +121,7 @@
          iram: iram@1ffe0000 {
              compatible = "mmio-sram";
              reg = <0x1ffe0000 0x20000>;
+            clocks = <&clks IMX5_CLK_OCRAM>;
          };
 
          ipu: ipu@40000000 {
arch/arm/boot/dts/imx51.dtsi line 590
Quoted 6 lines
arch/arm/boot/dts/imx51.dtsi +3 -0
@@ -584,6 +585,18 @@
                  clock-names = "ipg", "ahb", "ptp";
                  status = "disabled";
              };
+
+            vpu: vpu@83ff4000 {
+                compatible = "fsl,imx53-vpu";
This should be "fsl,imx51-vpu", and add a "cnm,codahx14".

Quoted 4 lines

According to the old imx-vpu-lib code and the vpu_fw_imx51.bin firmware file, the i.MX51 has a CodaHx14 (0xF00A) as opposed to the i.MX53's Coda7541 (0xF012).

Thanks for the hint, I'm now going through the old imx-vpu-lib to understand the CodaHX14 behaviour.
In old imx-vpu-lib, file vpu_util.c, there is a comment that make me doubtful: "i.MX51 has no secondary AXI memory, but use on chip RAM". As far as I understood, the portion of coda driver affected from this comment should be around the function coda_setup_iram in coda-bit.c. How am I supposed to manage this information?
Have I to avoid to use iram for iMX51 (and return on !dev->iram.vaddr) or go through the function without managing any CodaHX14 specific behaviour?

Quoted 21 lines

arch/arm/boot/dts/imx51.dtsi +9 -0

+                reg = <0x83ff4000 0x1000>;
+                interrupts = <9>;
+                clocks = <&clks IMX5_CLK_VPU_REFERENCE_GATE>,
+                         <&clks IMX5_CLK_VPU_GATE>;
+                clock-names = "per", "ahb";
+                resets = <&src 1>;
+                iram = <&iram>;
+            };
          };
+
      };
  };

Also, not sure if all the required coda patches are available in 3.18, so I tried it on linux-next 20141210 on a imx51-babbage (I had to disable USB, otherwise linux-next will hang on this board):

[    1.368454] coda 83ff4000.vpu: Initialized CODA7541.
[    1.373572] coda 83ff4000.vpu: Firmware version: 1.4.50
[    1.396695] coda 83ff4000.vpu: codec registered as /dev/video[0-3]

Quoted 8 lines

Quoted 3 lines
Also, no sure if we need to distinguish mx51 versus mx53 in the coda driver.
Adding Philipp in case he can comment.
Yes, the i.MX51 and i.MX53 firmware files are different. So at least an entry for i.MX51 with the correct firmware file name has to be added.
regards
Philipp

Thanks
Regards
Pierluigi

Philipp Zabel

2014-12-12 16:58 UTC #4 lore raw

Am Freitag, den 12.12.2014, 10:15 +0100 schrieb Pierluigi Passaro:

Quoted 47 lines · Philipp Zabel

Quoted 42 lines
Am Mittwoch, den 10.12.2014, 22:04 -0200 schrieb Fabio Estevam:
Quoted 33 lines
Quoted 9 lines · Pierluigi Passaro
Hi all,
I'm trying to use VPU code driver on iMX51 with kernel 3.18, following these steps:
- disabled DVI interface
- enabled LCD interface
- configured and enabled VPU
- copied iMX51 vpu firmware without header and renamed v4l-coda7541-imx53.bin in /lib/firmware
Quoted 8 lines
Attached you can find the patch and the defconfig I used.
The boot process hangs after loading the firmware at the first attempt of writing in VPU address space in the function coda_write of file driver/media/platform/coda/coda-common.c
Is there anything preventing the coda driver to work with iMX51? Could anyone provide any suggestion on how investigate the problem?
I have only tested the coda driver on mx6, but looking at the mx51.dtsi you would need this:
arch/arm/boot/dts/imx51.dtsi +1 -0
@@ -121,6 +121,7 @@
          iram: iram@1ffe0000 {
              compatible = "mmio-sram";
              reg = <0x1ffe0000 0x20000>;
+            clocks = <&clks IMX5_CLK_OCRAM>;
          };
 
          ipu: ipu@40000000 {
arch/arm/boot/dts/imx51.dtsi line 590
Quoted 6 lines
arch/arm/boot/dts/imx51.dtsi +3 -0
@@ -584,6 +585,18 @@
                  clock-names = "ipg", "ahb", "ptp";
                  status = "disabled";
              };
+
+            vpu: vpu@83ff4000 {
+                compatible = "fsl,imx53-vpu";
This should be "fsl,imx51-vpu", and add a "cnm,codahx14".
Quoted 4 lines
According to the old imx-vpu-lib code and the vpu_fw_imx51.bin firmware file, the i.MX51 has a CodaHx14 (0xF00A) as opposed to the i.MX53's Coda7541 (0xF012).

Quoted 9 lines

Thanks for the hint, I'm now going through the old imx-vpu-lib to understand the CodaHX14 behaviour.
In old imx-vpu-lib, file vpu_util.c, there is a comment that make me
doubtful: "i.MX51 has no secondary AXI memory, but use on chip RAM". As far as I understood, the portion of coda driver affected from this comment should be around the function coda_setup_iram in coda-bit.c. How am I supposed to manage this information?
Have I to avoid to use iram for iMX51 (and return on !dev->iram.vaddr) or go through the function without managing any CodaHX14 specific behaviour?

I think for CodaHx14 on i.MX51 the CODA7_USE_HOST_xyz_ENABLE bits should be set in coda_setup_iram, but the CODA7_USE_xyz_ENABLE should not.

regards
Philipp