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at91: smartweb board fails with current HEAD

U-Boot Heiko Schocher 5 participants 6 messages Jun 20, 2017 – Jul 6, 2017

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Arm (32-bit) Arm/Microchip (AT91) SoC support
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Heiko Schocher

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#0 lore raw

Hello Wenyou,

since your patch:

commit f8b7fff1d5c5297d290acab1e398bd410b0c2e68

Author: Wenyou Yang <[email protected]>
Date:   Fri Apr 14 15:01:28 2017 +0800

serial: atmel_usart: Add clk support

smartweb board fails booting (and I fear at last all other at91 based siemens boards also). Reverting your patch and U-Boot boots fine again.

First problem is, that I need now a bigger MALLOC_F_LEN space, but the value is for SPL and U-Boot ... but in SPL I cannot increase this value, as I have only 4k init ram.

So I need to configure a lower value in SPL as in U-Boot ... this is not possible at the moment... or?

Second problem: init of the uart seems to go now wrong, I have to add this patch:

pollux:u-boot-at91sam9g45 hs [master] $ git diff

arch/arm/dts/at91sam9260-smartweb.dts +2 -0
index faed763..e59781b 100644
@@ -18,6 +18,7 @@
         compatible = "atmel,at91sam9260", "atmel,at91sam9";
 
         chosen {
+               u-boot,dm-pre-reloc;
                 stdout-path = &dbgu;
         };
 

@@ -48,6 +49,7 @@
                         };
 
                         dbgu: serial at fffff200 {
+                               u-boot,dm-pre-reloc;
                                 status = "okay";
                         };
configs/smartweb_defconfig +3 -0
index 48c8781..a769fc5 100644
@@ -7,6 +7,7 @@ CONFIG_TARGET_SMARTWEB=y
  CONFIG_SPL_GPIO_SUPPORT=y
  CONFIG_SPL_LIBCOMMON_SUPPORT=y
  CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
  CONFIG_SPL_NAND_SUPPORT=y
  CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb"
  CONFIG_FIT=y

@@ -33,6 +34,8 @@ CONFIG_CMD_FAT=y
  # CONFIG_DOS_PARTITION is not set
  CONFIG_OF_CONTROL=y
  CONFIG_OF_EMBED=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
  CONFIG_DFU_NAND=y
  # CONFIG_MMC is not set
  CONFIG_USB=y

May the other (none atmel) at91 based boards needs similiar fixes?

Any hint is welcome.

bye,
Heiko

Signature · 2 lines
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
#1 lore raw
Quoted 22 lines

-----Original Message-----
From: Heiko Schocher [mailto:hs at denx.de]
Sent: 2017年6月20日 22:05
To: Wenyou Yang - A41535 <[email protected]>
Cc: u-boot at lists.denx.de; Andreas Bießmann <[email protected]>
Subject: at91: smartweb board fails with current HEAD

Hello Wenyou,

since your patch:

commit f8b7fff1d5c5297d290acab1e398bd410b0c2e68

Author: Wenyou Yang <[email protected]>
Date:   Fri Apr 14 15:01:28 2017 +0800

serial: atmel_usart: Add clk support

smartweb board fails booting (and I fear at last all other at91 based siemens boards also). Reverting your patch and U-Boot boots fine again.

Quoted 6 lines

First problem is, that I need now a bigger MALLOC_F_LEN space, but the value is for SPL and U-Boot ... but in SPL I cannot increase this value, as I have only 4k init ram.

So I need to configure a lower value in SPL as in U-Boot ... this is not possible at the moment... or?

After supporting the driver model and device tree, the size of SPL is beyond 4K. SPL is not suitable in 4K internal SRAM

Quoted 47 lines

Second problem: init of the uart seems to go now wrong, I have to add this patch:

pollux:u-boot-at91sam9g45 hs [master] $ git diff diff --git a/arch/arm/dts/at91sam9260-smartweb.dts b/arch/arm/dts/at91sam9260- smartweb.dts
index faed763..e59781b 100644

arch/arm/dts/at91sam9260-smartweb.dts +2 -0
@@ -18,6 +18,7 @@
         compatible = "atmel,at91sam9260", "atmel,at91sam9";
 
         chosen {
+               u-boot,dm-pre-reloc;
                 stdout-path = &dbgu;
         };
 

@@ -48,6 +49,7 @@
                         };
 
                         dbgu: serial at fffff200 {
+                               u-boot,dm-pre-reloc;
                                 status = "okay";
                         };
configs/smartweb_defconfig index renamed from configs/smartweb_defconfig +0 -0

48c8781..a769fc5 100644

configs/smartweb_defconfig +3 -0
@@ -7,6 +7,7 @@ CONFIG_TARGET_SMARTWEB=y
  CONFIG_SPL_GPIO_SUPPORT=y
  CONFIG_SPL_LIBCOMMON_SUPPORT=y
  CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
  CONFIG_SPL_NAND_SUPPORT=y
  CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb"
  CONFIG_FIT=y

@@ -33,6 +34,8 @@ CONFIG_CMD_FAT=y
  # CONFIG_DOS_PARTITION is not set
  CONFIG_OF_CONTROL=y
  CONFIG_OF_EMBED=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
  CONFIG_DFU_NAND=y
  # CONFIG_MMC is not set
  CONFIG_USB=y
Quoted 1 line

May the other (none atmel) at91 based boards needs similiar fixes?

Yes, needs similar fixes.

Quoted 8 lines

Any hint is welcome.

bye,
Heiko
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

Best Regards,
Wenyou Yang

author
#2 lore raw

Hello Wenyou,

Am 21.06.2017 um 02:52 schrieb Wenyou.Yang at microchip.com:

Quoted 26 lines
Quoted 26 lines

-----Original Message-----
From: Heiko Schocher [mailto:hs at denx.de]
Sent: 2017年6月20日 22:05
To: Wenyou Yang - A41535 <[email protected]>
Cc: u-boot at lists.denx.de; Andreas Bießmann <[email protected]>
Subject: at91: smartweb board fails with current HEAD

Hello Wenyou,

since your patch:

commit f8b7fff1d5c5297d290acab1e398bd410b0c2e68

Author: Wenyou Yang <[email protected]>
Date:   Fri Apr 14 15:01:28 2017 +0800

serial: atmel_usart: Add clk support

smartweb board fails booting (and I fear at last all other at91 based siemens boards also). Reverting your patch and U-Boot boots fine again.

First problem is, that I need now a bigger MALLOC_F_LEN space, but the value is for SPL and U-Boot ... but in SPL I cannot increase this value, as I have only 4k init ram.

Quoted 5 lines
Quoted 2 lines

So I need to configure a lower value in SPL as in U-Boot ... this is not possible at the moment... or?

After supporting the driver model and device tree, the size of SPL is beyond 4K. SPL is not suitable in 4K internal SRAM

Hmm... no?

I have running a SPL (without DM/DTS support of course) from current mainline source on the board.
Only problem is, that we need different MALLOC_F_LEN space in SPL and U-Boot now!

added Simon Glass and Tom Rini, may I oversee some obvious config and/or they have an idea?

Quoted 46 lines
Quoted 46 lines

Second problem: init of the uart seems to go now wrong, I have to add this patch:

pollux:u-boot-at91sam9g45 hs [master] $ git diff diff --git a/arch/arm/dts/at91sam9260-smartweb.dts b/arch/arm/dts/at91sam9260- smartweb.dts
index faed763..e59781b 100644

arch/arm/dts/at91sam9260-smartweb.dts +2 -0
@@ -18,6 +18,7 @@
          compatible = "atmel,at91sam9260", "atmel,at91sam9";
 
          chosen {
+               u-boot,dm-pre-reloc;
                  stdout-path = &dbgu;
          };
 

@@ -48,6 +49,7 @@
                          };
 
                          dbgu: serial at fffff200 {
+                               u-boot,dm-pre-reloc;
                                  status = "okay";
                          };
configs/smartweb_defconfig index renamed from configs/smartweb_defconfig +0 -0

48c8781..a769fc5 100644

configs/smartweb_defconfig +3 -0
@@ -7,6 +7,7 @@ CONFIG_TARGET_SMARTWEB=y
   CONFIG_SPL_GPIO_SUPPORT=y
   CONFIG_SPL_LIBCOMMON_SUPPORT=y
   CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
   CONFIG_SPL_NAND_SUPPORT=y
   CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb"
   CONFIG_FIT=y

@@ -33,6 +34,8 @@ CONFIG_CMD_FAT=y
   # CONFIG_DOS_PARTITION is not set
   CONFIG_OF_CONTROL=y
   CONFIG_OF_EMBED=y
+CONFIG_CLK=y
+CONFIG_CLK_AT91=y
   CONFIG_DFU_NAND=y
   # CONFIG_MMC is not set
   CONFIG_USB=y
Quoted 3 lines
Quoted 1 line

May the other (none atmel) at91 based boards needs similiar fixes?

Yes, needs similar fixes.

:-(

So your patch broke all none atmel at91 boards?

Just trying on the at91 based corvus board, same problem, but the same fixes did not yet help ... need more debug time here ... The taurus board is currently down, after fixing the smartweb and corvus boards, I hope to get it running again, but I think, same problem.

BTW: This is again a good example how important it is to use automated tests, may with tbot [1] I only detected this, because I have running automated weekly U-Boot mainline tests. I think we have a lot of (not only at91) dead/untested boards in code ...

bye,
Heiko
[1] https://github.com/hsdenx/tbot

     https://tbot.tools/
Signature · 2 lines
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
#3 lore raw

Hi Heiko,

Quoted 45 lines · Heiko Schocher

Hello Wenyou,

Am 21.06.2017 um 02:52 schrieb Wenyou.Yang at microchip.com:

Quoted 30 lines
Quoted 30 lines

-----Original Message-----
From: Heiko Schocher [mailto:hs at denx.de]
Sent: 2017年6月20日 22:05
To: Wenyou Yang - A41535 <[email protected]>
Cc: u-boot at lists.denx.de; Andreas Bießmann <[email protected]>
Subject: at91: smartweb board fails with current HEAD

Hello Wenyou,

since your patch:

commit f8b7fff1d5c5297d290acab1e398bd410b0c2e68

Author: Wenyou Yang <[email protected]>
Date:   Fri Apr 14 15:01:28 2017 +0800

serial: atmel_usart: Add clk support

smartweb board fails booting (and I fear at last all other at91 based siemens
boards also). Reverting your patch and U-Boot boots fine again.

First problem is, that I need now a bigger MALLOC_F_LEN space, but the value is
for SPL and U-Boot ... but in SPL I cannot increase this value, as I have only 4k
init ram.

Quoted 8 lines
Quoted 3 lines

So I need to configure a lower value in SPL as in U-Boot ... this is not possible at
the moment... or?

After supporting the driver model and device tree, the size of SPL is beyond 4K.
SPL is not suitable in 4K internal SRAM

Hmm... no?

Quoted 8 lines

I have running a SPL (without DM/DTS support of course) from current mainline
source on the board.
Only problem is, that we need different MALLOC_F_LEN space in SPL and U-Boot now!

added Simon Glass and Tom Rini, may I oversee some obvious config and/or they have an idea?

I think it would be possible to add CONFIG_SPL_MALLOC_F_LEN as a new Kconfig option. It could default to the same value as the main version.

Regards,
Simon

[...]

#4 lore raw
In reply to Wenyou.Yang at microchip.com

Dear Wenyou,

Quoted 3 lines · In message <F9F4555C4E01D7469D37975B62D0EFBB60A0D3@CHN-SV-EXMX07.mchp-main.com>…

After supporting the driver model and device tree, the size of SPL is beyond 4K. SPL is not suitable in 4K internal SRAM

If you are aware of this situation, you should not post patches that break a number of existing boards.

Instead, we should search for a compromise.

We will have to do this now. But that should have been done before upstreaming this code.

Thanks.

Wolfgang Denk

Signature · 4 lines
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Parkinson's Law:  Work expands to fill the time alloted it.
#5 lore raw

Hello Wolfgang,

Quoted 9 lines · Wolfgang Denk

Dear Wenyou,

Quoted 2 lines · In message <F9F4555C4E01D7469D37975B62D0EFBB60A0D3@CHN-SV-EXMX07.mchp-main.com>…

After supporting the driver model and device tree, the size of SPL is beyond 4K. SPL is not suitable in 4K internal SRAM

If you are aware of this situation, you should not post patches that break a number of existing boards.

Instead, we should search for a compromise.

It is my fault, I learned the lesson, I will more careful while posting patches.

Thank you for your reminder.

Quoted 6 lines

We will have to do this now. But that should have been done before upstreaming this code.

Thanks.

Wolfgang Denk

Best Regards,
Wenyou Yang