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Flash erase wait time

DISCUSSION Adil Hafeez 2 participants 3 messages Aug 26, 2005 Memory technology devices (MTD)

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#0 lore raw

Hi,

I am using a custom mips board that includes 8 MB Am29LV641D flash chip. This chip is 16-bit, has 128 sectors of 64k each.

This flash is memory mapped and starts at address 1c40:0000. I can read the flash using dd utility. But I cannot erase flash. Erase operation using 'eraseall' utility doesnt take more than 6 seconds to finish and erases only first two blocks i.e. 128k. Whereas, full flash erase from our custom developed flash utlity takes 60 seconds to erase flash.

Then after hacking into cmd cfi commad set. The erase issue was fixed by adding a while loop for checking polarity bit in do_erase_oneblock function.

while (!sectorDone) {
    unsigned volatile short *flash_addr = adr + map->map_priv_1;
    if( (*flash_addr) & 0x0080 )
        sectorDone = 1;
}

Was it really required to double check the polarity bit, or there are some timeout timer issues with my mips port ?

- Adil

Index: drivers/mtd/chips/cfi_cmdset_0002.c
===================================================================
RCS file: /home/embedded/linux-2.4.20_palmchip/drivers/mtd/chips/cfi_cmdset_0002.c,v retrieving revision 1.1
diff -r1.1 cfi_cmdset_0002.c
240c240
< cfi->fast_prog = 0;
---

Quoted 1 line
              cfi->fast_prog = 1;

897a898

Quoted 1 line

975a977,989

Quoted 4 lines
    {
    int sectorDone = 0;
    while (!sectorDone) {
        unsigned volatile short *flash_addr = adr + map->map_priv_1;
Quoted 9 lines
        if( (*flash_addr) & 0x0080 )  {
                sectorDone = 1;
        }
        else {
        }

    }
    }

1125a1140

Quoted 1 line
#1 lore raw
Quoted 2 lines · Adil Hafeez

Was it really required to double check the polarity bit, or there are some timeout timer issues with my mips port ?

1. We have no idea, which version of cfi_cmset_0002.c you are using. Please provide the $Id string on top of the file. The kernel version and the applied patches on top of this kernel.

2. If you send patches, read linux/Documentation/SubmittingPatches first

3 . From your patch:

file: /home/embedded/linux-2.4.20_palmchip/drivers/mtd/chips/cfi_cmdset_0002.c,v

Please read
http://www.linux-mtd.infradead.org/source.html#kernelversions

tglx

#2 lore raw

Thanks, Thomas.

I am using 2.4.20 kernel, with Linux MTD framework backported from 2.4.31.

The $id flash in cfi_cmdset_0002.c file is:

$Id: cfi_cmdset_0002.c,v 1.62 2003/01/24 23:30:13 dwmw2 Exp $

Adil

Quoted 21 lines · Thomas Gleixner
Quoted 2 lines · Adil Hafeez

Was it really required to double check the polarity bit, or there are some timeout timer issues with my mips port ?

1. We have no idea, which version of cfi_cmset_0002.c you are using. Please provide the $Id string on top of the file. The kernel version and the applied patches on top of this kernel.

2. If you send patches, read linux/Documentation/SubmittingPatches first

3 . From your patch:

file: /home/embedded/linux-2.4.20_palmchip/drivers/mtd/chips/cfi_cmdset_0002.c,v

Please read
http://www.linux-mtd.infradead.org/source.html#kernelversions

tglx